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authorLinus Torvalds <torvalds@linux-foundation.org>2008-04-21 18:37:47 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-21 18:37:47 -0400
commitb1af9ccce9cff5b48c37424dbdbb3aa9021915db (patch)
treecce75cb4406c7ed412c334fa632dd1d185d2dced
parentcc216c5d429892872f70f76975e243aef7ad9db1 (diff)
parent440fc172ae333c52c458401fe059afcc6e91eebf (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (27 commits) sh: Fix up L2 cache probe. sh: Fix up SH-4A part probe. sh: Add support for SH7723 CPU subtype. sh: Fix up SH7763 build. sh: Add migor_ts support to MigoR sh: Add rs5c732b RTC support to MigoR sh: Add I2C support to MigoR sh: Add I2C platform data to sh7722 sh: MigoR NAND flash support using gen_flash sh: MigoR NOR flash support using physmap-flash sh: Fix up mach-types formatting from merge damage. sh: r7780rp: Hook up the I2C and SMBus platform devices. sh: Use phyical addresses for MigoR smc91x resources sh: Use physical addresses for sh7722 USBF resources sh: Add MigoR header file Fix sh_keysc double free sh: Fix up __access_ok() check for nommu. sh: Allow optimized clear/copy page routines to be used on SH-2. sh: Hook up the rest of the SH7770 serial ports. sh: Add support for Solution Engine SH7721 board ...
Diffstat
-rw-r--r--arch/sh/Kconfig30
-rw-r--r--arch/sh/Kconfig.debug13
-rw-r--r--arch/sh/Makefile1
-rw-r--r--arch/sh/boards/renesas/migor/setup.c197
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780mp.c39
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c42
-rw-r--r--arch/sh/boards/se/7721/Makefile1
-rw-r--r--arch/sh/boards/se/7721/irq.c45
-rw-r--r--arch/sh/boards/se/7721/setup.c99
-rw-r--r--arch/sh/boards/se/7722/setup.c41
-rw-r--r--arch/sh/configs/se7721_defconfig1085
-rw-r--r--arch/sh/kernel/cf-enabler.c15
-rw-r--r--arch/sh/kernel/cpu/sh2a/Makefile7
-rw-r--r--arch/sh/kernel/cpu/sh2a/probe.c3
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-mxg.c168
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c33
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile2
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c28
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c300
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c10
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c37
-rw-r--r--arch/sh/kernel/setup.c15
-rw-r--r--arch/sh/lib/clear_page.S6
-rw-r--r--arch/sh/lib/copy_page.S6
-rw-r--r--arch/sh/mm/cache-debugfs.c4
-rw-r--r--arch/sh/mm/pmb.c2
-rw-r--r--arch/sh/tools/mach-types5
-rw-r--r--drivers/input/keyboard/Kconfig9
-rw-r--r--drivers/input/keyboard/Makefile1
-rw-r--r--drivers/input/keyboard/sh_keysc.c280
-rw-r--r--drivers/rtc/rtc-sh.c296
-rw-r--r--drivers/serial/sh-sci.c7
-rw-r--r--drivers/serial/sh-sci.h60
-rw-r--r--include/asm-sh/bugs.h2
-rw-r--r--include/asm-sh/cpu-sh4/freq.h6
-rw-r--r--include/asm-sh/cpu-sh4/rtc.h5
-rw-r--r--include/asm-sh/migor.h58
-rw-r--r--include/asm-sh/processor.h5
-rw-r--r--include/asm-sh/r7780rp.h22
-rw-r--r--include/asm-sh/se7721.h70
-rw-r--r--include/asm-sh/se7722.h2
-rw-r--r--include/asm-sh/sh_keysc.h13
-rw-r--r--include/asm-sh/system.h2
-rw-r--r--include/asm-sh/uaccess_32.h5
44 files changed, 2858 insertions, 219 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 8d2cd1de5726..6a679c3e15e8 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -167,6 +167,12 @@ config CPU_SUBTYPE_SH7263
167 select CPU_SH2A 167 select CPU_SH2A
168 select CPU_HAS_FPU 168 select CPU_HAS_FPU
169 169
170config CPU_SUBTYPE_MXG
171 bool "Support MX-G processor"
172 select CPU_SH2A
173 help
174 Select MX-G if running on an R8A03022BG part.
175
170# SH-3 Processor Support 176# SH-3 Processor Support
171 177
172config CPU_SUBTYPE_SH7705 178config CPU_SUBTYPE_SH7705
@@ -270,6 +276,15 @@ config CPU_SUBTYPE_SH4_202
270 276
271# SH-4A Processor Support 277# SH-4A Processor Support
272 278
279config CPU_SUBTYPE_SH7723
280 bool "Support SH7723 processor"
281 select CPU_SH4A
282 select CPU_SHX2
283 select ARCH_SPARSEMEM_ENABLE
284 select SYS_SUPPORTS_NUMA
285 help
286 Select SH7723 if you have an SH-MobileR2 CPU.
287
273config CPU_SUBTYPE_SH7763 288config CPU_SUBTYPE_SH7763
274 bool "Support SH7763 processor" 289 bool "Support SH7763 processor"
275 select CPU_SH4A 290 select CPU_SH4A
@@ -366,6 +381,14 @@ config SH_7619_SOLUTION_ENGINE
366 Select 7619 SolutionEngine if configuring for a Hitachi SH7619 381 Select 7619 SolutionEngine if configuring for a Hitachi SH7619
367 evaluation board. 382 evaluation board.
368 383
384config SH_7721_SOLUTION_ENGINE
385 bool "SolutionEngine7721"
386 select SOLUTION_ENGINE
387 depends on CPU_SUBTYPE_SH7721
388 help
389 Select 7721 SolutionEngine if configuring for a Hitachi SH7721
390 evaluation board.
391
369config SH_7722_SOLUTION_ENGINE 392config SH_7722_SOLUTION_ENGINE
370 bool "SolutionEngine7722" 393 bool "SolutionEngine7722"
371 select SOLUTION_ENGINE 394 select SOLUTION_ENGINE
@@ -560,7 +583,7 @@ config SH_TMU
560config SH_CMT 583config SH_CMT
561 def_bool y 584 def_bool y
562 prompt "CMT timer support" 585 prompt "CMT timer support"
563 depends on CPU_SH2 586 depends on CPU_SH2 && !CPU_SUBTYPE_MXG
564 help 587 help
565 This enables the use of the CMT as the system timer. 588 This enables the use of the CMT as the system timer.
566 589
@@ -578,6 +601,7 @@ config SH_TIMER_IRQ
578 default "86" if CPU_SUBTYPE_SH7619 601 default "86" if CPU_SUBTYPE_SH7619
579 default "140" if CPU_SUBTYPE_SH7206 602 default "140" if CPU_SUBTYPE_SH7206
580 default "142" if CPU_SUBTYPE_SH7203 603 default "142" if CPU_SUBTYPE_SH7203
604 default "238" if CPU_SUBTYPE_MXG
581 default "16" 605 default "16"
582 606
583config SH_PCLK_FREQ 607config SH_PCLK_FREQ
@@ -585,10 +609,10 @@ config SH_PCLK_FREQ
585 default "27000000" if CPU_SUBTYPE_SH7343 609 default "27000000" if CPU_SUBTYPE_SH7343
586 default "31250000" if CPU_SUBTYPE_SH7619 610 default "31250000" if CPU_SUBTYPE_SH7619
587 default "32000000" if CPU_SUBTYPE_SH7722 611 default "32000000" if CPU_SUBTYPE_SH7722
588 default "33333333" if CPU_SUBTYPE_SH7770 || \ 612 default "33333333" if CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7723 || \
589 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ 613 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
590 CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \ 614 CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
591 CPU_SUBTYPE_SH7263 615 CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG
592 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 616 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
593 default "66000000" if CPU_SUBTYPE_SH4_202 617 default "66000000" if CPU_SUBTYPE_SH4_202
594 default "50000000" 618 default "50000000"
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 5dcb74b947a9..d9d28f9dd0db 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -29,16 +29,17 @@ config EARLY_SCIF_CONSOLE
29config EARLY_SCIF_CONSOLE_PORT 29config EARLY_SCIF_CONSOLE_PORT
30 hex 30 hex
31 depends on EARLY_SCIF_CONSOLE 31 depends on EARLY_SCIF_CONSOLE
32 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763
33 default "0xffe00000" if CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366
34 default "0xffea0000" if CPU_SUBTYPE_SH7785
35 default "0xfffe8000" if CPU_SUBTYPE_SH7203
36 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
37 default "0xf8420000" if CPU_SUBTYPE_SH7619
38 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705 32 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705
39 default "0xa4430000" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721 33 default "0xa4430000" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721
34 default "0xf8420000" if CPU_SUBTYPE_SH7619
35 default "0xff804000" if CPU_SUBTYPE_MXG
40 default "0xffc30000" if CPU_SUBTYPE_SHX3 36 default "0xffc30000" if CPU_SUBTYPE_SHX3
37 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \
38 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366
41 default "0xffe80000" if CPU_SH4 39 default "0xffe80000" if CPU_SH4
40 default "0xffea0000" if CPU_SUBTYPE_SH7785
41 default "0xfffe8000" if CPU_SUBTYPE_SH7203
42 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
42 default "0x00000000" 43 default "0x00000000"
43 44
44config EARLY_PRINTK 45config EARLY_PRINTK
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index cffc92b1bf2e..bb06f83e6239 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -107,6 +107,7 @@ machdir-$(CONFIG_SH_7722_SOLUTION_ENGINE) += se/7722
107machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) += se/7751 107machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) += se/7751
108machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) += se/7780 108machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) += se/7780
109machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343 109machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343
110machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721
110machdir-$(CONFIG_SH_HP6XX) += hp6xx 111machdir-$(CONFIG_SH_HP6XX) += hp6xx
111machdir-$(CONFIG_SH_DREAMCAST) += dreamcast 112machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
112machdir-$(CONFIG_SH_MPC1211) += mpc1211 113machdir-$(CONFIG_SH_MPC1211) += mpc1211
diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c
index 21ab8c8fb590..00d52a20d8a5 100644
--- a/arch/sh/boards/renesas/migor/setup.c
+++ b/arch/sh/boards/renesas/migor/setup.c
@@ -10,8 +10,14 @@
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/input.h>
14#include <linux/mtd/physmap.h>
15#include <linux/mtd/nand.h>
16#include <linux/i2c.h>
13#include <asm/machvec.h> 17#include <asm/machvec.h>
14#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/sh_keysc.h>
20#include <asm/migor.h>
15 21
16/* Address IRQ Size Bus Description 22/* Address IRQ Size Bus Description
17 * 0x00000000 64MB 16 NOR Flash (SP29PL256N) 23 * 0x00000000 64MB 16 NOR Flash (SP29PL256N)
@@ -23,9 +29,9 @@
23 29
24static struct resource smc91x_eth_resources[] = { 30static struct resource smc91x_eth_resources[] = {
25 [0] = { 31 [0] = {
26 .name = "smc91x-regs" , 32 .name = "SMC91C111" ,
27 .start = P2SEGADDR(0x10000300), 33 .start = 0x10000300,
28 .end = P2SEGADDR(0x1000030f), 34 .end = 0x1000030f,
29 .flags = IORESOURCE_MEM, 35 .flags = IORESOURCE_MEM,
30 }, 36 },
31 [1] = { 37 [1] = {
@@ -40,19 +46,202 @@ static struct platform_device smc91x_eth_device = {
40 .resource = smc91x_eth_resources, 46 .resource = smc91x_eth_resources,
41}; 47};
42 48
49static struct sh_keysc_info sh_keysc_info = {
50 .mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
51 .scan_timing = 3,
52 .delay = 5,
53 .keycodes = {
54 0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
55 0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
56 0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
57 0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
58 0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
59 },
60};
61
62static struct resource sh_keysc_resources[] = {
63 [0] = {
64 .start = 0x044b0000,
65 .end = 0x044b000f,
66 .flags = IORESOURCE_MEM,
67 },
68 [1] = {
69 .start = 79,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct platform_device sh_keysc_device = {
75 .name = "sh_keysc",
76 .num_resources = ARRAY_SIZE(sh_keysc_resources),
77 .resource = sh_keysc_resources,
78 .dev = {
79 .platform_data = &sh_keysc_info,
80 },
81};
82
83static struct mtd_partition migor_nor_flash_partitions[] =
84{
85 {
86 .name = "uboot",
87 .offset = 0,
88 .size = (1 * 1024 * 1024),
89 .mask_flags = MTD_WRITEABLE, /* Read-only */
90 },
91 {
92 .name = "rootfs",
93 .offset = MTDPART_OFS_APPEND,
94 .size = (15 * 1024 * 1024),
95 },
96 {
97 .name = "other",
98 .offset = MTDPART_OFS_APPEND,
99 .size = MTDPART_SIZ_FULL,
100 },
101};
102
103static struct physmap_flash_data migor_nor_flash_data = {
104 .width = 2,
105 .parts = migor_nor_flash_partitions,
106 .nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
107};
108
109static struct resource migor_nor_flash_resources[] = {
110 [0] = {
111 .name = "NOR Flash",
112 .start = 0x00000000,
113 .end = 0x03ffffff,
114 .flags = IORESOURCE_MEM,
115 }
116};
117
118static struct platform_device migor_nor_flash_device = {
119 .name = "physmap-flash",
120 .resource = migor_nor_flash_resources,
121 .num_resources = ARRAY_SIZE(migor_nor_flash_resources),
122 .dev = {
123 .platform_data = &migor_nor_flash_data,
124 },
125};
126
127static struct mtd_partition migor_nand_flash_partitions[] = {
128 {
129 .name = "nanddata1",
130 .offset = 0x0,
131 .size = 512 * 1024 * 1024,
132 },
133 {
134 .name = "nanddata2",
135 .offset = MTDPART_OFS_APPEND,
136 .size = 512 * 1024 * 1024,
137 },
138};
139
140static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
141 unsigned int ctrl)
142{
143 struct nand_chip *chip = mtd->priv;
144
145 if (cmd == NAND_CMD_NONE)
146 return;
147
148 if (ctrl & NAND_CLE)
149 writeb(cmd, chip->IO_ADDR_W + 0x00400000);
150 else if (ctrl & NAND_ALE)
151 writeb(cmd, chip->IO_ADDR_W + 0x00800000);
152 else
153 writeb(cmd, chip->IO_ADDR_W);
154}
155
156static int migor_nand_flash_ready(struct mtd_info *mtd)
157{
158 return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */
159}
160
161struct platform_nand_data migor_nand_flash_data = {
162 .chip = {
163 .nr_chips = 1,
164 .partitions = migor_nand_flash_partitions,
165 .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
166 .chip_delay = 20,
167 .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
168 },
169 .ctrl = {
170 .dev_ready = migor_nand_flash_ready,
171 .cmd_ctrl = migor_nand_flash_cmd_ctl,
172 },
173};
174
175static struct resource migor_nand_flash_resources[] = {
176 [0] = {
177 .name = "NAND Flash",
178 .start = 0x18000000,
179 .end = 0x18ffffff,
180 .flags = IORESOURCE_MEM,
181 },
182};
183
184static struct platform_device migor_nand_flash_device = {
185 .name = "gen_nand",
186 .resource = migor_nand_flash_resources,
187 .num_resources = ARRAY_SIZE(migor_nand_flash_resources),
188 .dev = {
189 .platform_data = &migor_nand_flash_data,
190 }
191};
192
43static struct platform_device *migor_devices[] __initdata = { 193static struct platform_device *migor_devices[] __initdata = {
44 &smc91x_eth_device, 194 &smc91x_eth_device,
195 &sh_keysc_device,
196 &migor_nor_flash_device,
197 &migor_nand_flash_device,
198};
199
200static struct i2c_board_info __initdata migor_i2c_devices[] = {
201 {
202 I2C_BOARD_INFO("rtc-rs5c372", 0x32),
203 .type = "rs5c372b",
204 },
205 {
206 I2C_BOARD_INFO("migor_ts", 0x51),
207 .irq = 38, /* IRQ6 */
208 },
45}; 209};
46 210
47static int __init migor_devices_setup(void) 211static int __init migor_devices_setup(void)
48{ 212{
213 i2c_register_board_info(0, migor_i2c_devices,
214 ARRAY_SIZE(migor_i2c_devices));
215
49 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); 216 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
50} 217}
51__initcall(migor_devices_setup); 218__initcall(migor_devices_setup);
52 219
53static void __init migor_setup(char **cmdline_p) 220static void __init migor_setup(char **cmdline_p)
54{ 221{
55 ctrl_outw(0x1000, 0xa4050110); /* Enable IRQ0 in PJCR */ 222 /* SMC91C111 - Enable IRQ0 */
223 ctrl_outw(ctrl_inw(PORT_PJCR) & ~0x0003, PORT_PJCR);
224
225 /* KEYSC */
226 ctrl_outw(ctrl_inw(PORT_PYCR) & ~0x0fff, PORT_PYCR);
227 ctrl_outw(ctrl_inw(PORT_PZCR) & ~0x0ff0, PORT_PZCR);
228 ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA);
229 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
230 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
231 ctrl_outl(ctrl_inl(MSTPCR2) & ~0x00004000, MSTPCR2);
232
233 /* NAND Flash */
234 ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
235 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200,
236 BSC_CS6ABCR);
237
238 /* I2C */
239 ctrl_outl(ctrl_inl(MSTPCR1) & ~0x00000200, MSTPCR1);
240
241 /* Touch Panel - Enable IRQ6 */
242 ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR);
243 ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA);
244 ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC);
56} 245}
57 246
58static struct sh_machine_vector mv_migor __initmv = { 247static struct sh_machine_vector mv_migor __initmv = {
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
index 1f8f073f27be..68f0ad1b637d 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
@@ -18,31 +18,44 @@ enum {
18 UNUSED = 0, 18 UNUSED = 0,
19 19
20 /* board specific interrupt sources */ 20 /* board specific interrupt sources */
21 AX88796, /* Ethernet controller */ 21 CF, /* Compact Flash */
22 CF, /* Compact Flash */ 22 TP, /* Touch panel */
23 PSW, /* Push Switch */ 23 SCIF1, /* FPGA SCIF1 */
24 EXT1, /* EXT1n IRQ */ 24 SCIF0, /* FPGA SCIF0 */
25 EXT4, /* EXT4n IRQ */ 25 SMBUS, /* SMBUS */
26 RTC, /* RTC Alarm */
27 AX88796, /* Ethernet controller */
28 PSW, /* Push Switch */
29
30 /* external bus connector */
31 EXT1, EXT2, EXT4, EXT5, EXT6,
26}; 32};
27 33
28static struct intc_vect vectors[] __initdata = { 34static struct intc_vect vectors[] __initdata = {
29 INTC_IRQ(CF, IRQ_CF), 35 INTC_IRQ(CF, IRQ_CF),
30 INTC_IRQ(PSW, IRQ_PSW), 36 INTC_IRQ(TP, IRQ_TP),
37 INTC_IRQ(SCIF1, IRQ_SCIF1),
38 INTC_IRQ(SCIF0, IRQ_SCIF0),
39 INTC_IRQ(SMBUS, IRQ_SMBUS),
40 INTC_IRQ(RTC, IRQ_RTC),
31 INTC_IRQ(AX88796, IRQ_AX88796), 41 INTC_IRQ(AX88796, IRQ_AX88796),
32 INTC_IRQ(EXT1, IRQ_EXT1), 42 INTC_IRQ(PSW, IRQ_PSW),
33 INTC_IRQ(EXT4, IRQ_EXT4), 43
44 INTC_IRQ(EXT1, IRQ_EXT1), INTC_IRQ(EXT2, IRQ_EXT2),
45 INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5),
46 INTC_IRQ(EXT6, IRQ_EXT6),
34}; 47};
35 48
36static struct intc_mask_reg mask_registers[] __initdata = { 49static struct intc_mask_reg mask_registers[] __initdata = {
37 { 0xa4000000, 0, 16, /* IRLMSK */ 50 { 0xa4000000, 0, 16, /* IRLMSK */
38 { 0, 0, 0, 0, CF, 0, 0, 0, 51 { SCIF0, SCIF1, RTC, 0, CF, 0, TP, SMBUS,
39 0, 0, 0, EXT4, 0, EXT1, PSW, AX88796 } }, 52 0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } },
40}; 53};
41 54
42static unsigned char irl2irq[HL_NR_IRL] __initdata = { 55static unsigned char irl2irq[HL_NR_IRL] __initdata = {
43 0, IRQ_CF, 0, 0, 56 0, IRQ_CF, IRQ_TP, IRQ_SCIF1,
44 0, 0, 0, 0, 57 IRQ_SCIF0, IRQ_SMBUS, IRQ_RTC, IRQ_EXT6,
45 0, IRQ_EXT4, 0, IRQ_EXT1, 58 IRQ_EXT5, IRQ_EXT4, IRQ_EXT2, IRQ_EXT1,
46 0, IRQ_AX88796, IRQ_PSW, 59 0, IRQ_AX88796, IRQ_PSW,
47}; 60};
48 61
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index 2f68bea7890c..a5c5e9236501 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -4,7 +4,7 @@
4 * Renesas Solutions Highlander Support. 4 * Renesas Solutions Highlander Support.
5 * 5 *
6 * Copyright (C) 2002 Atom Create Engineering Co., Ltd. 6 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
7 * Copyright (C) 2005 - 2007 Paul Mundt 7 * Copyright (C) 2005 - 2008 Paul Mundt
8 * 8 *
9 * This contains support for the R7780RP-1, R7780MP, and R7785RP 9 * This contains support for the R7780RP-1, R7780MP, and R7785RP
10 * Highlander modules. 10 * Highlander modules.
@@ -17,6 +17,7 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/ata_platform.h> 18#include <linux/ata_platform.h>
19#include <linux/types.h> 19#include <linux/types.h>
20#include <linux/i2c.h>
20#include <net/ax88796.h> 21#include <net/ax88796.h>
21#include <asm/machvec.h> 22#include <asm/machvec.h>
22#include <asm/r7780rp.h> 23#include <asm/r7780rp.h>
@@ -176,11 +177,38 @@ static struct platform_device ax88796_device = {
176 .resource = ax88796_resources, 177 .resource = ax88796_resources,
177}; 178};
178 179
180static struct resource smbus_resources[] = {
181 [0] = {
182 .start = PA_SMCR,
183 .end = PA_SMCR + 0x100 - 1,
184 .flags = IORESOURCE_MEM,
185 },
186 [1] = {
187 .start = IRQ_SMBUS,
188 .end = IRQ_SMBUS,
189 .flags = IORESOURCE_IRQ,
190 },
191};
192
193static struct platform_device smbus_device = {
194 .name = "i2c-highlander",
195 .id = 0,
196 .num_resources = ARRAY_SIZE(smbus_resources),
197 .resource = smbus_resources,
198};
199
200static struct i2c_board_info __initdata highlander_i2c_devices[] = {
201 {
202 I2C_BOARD_INFO("rtc-rs5c372", 0x32),
203 .type = "r2025sd",
204 },
205};
179 206
180static struct platform_device *r7780rp_devices[] __initdata = { 207static struct platform_device *r7780rp_devices[] __initdata = {
181 &r8a66597_usb_host_device, 208 &r8a66597_usb_host_device,
182 &m66592_usb_peripheral_device, 209 &m66592_usb_peripheral_device,
183 &heartbeat_device, 210 &heartbeat_device,
211 &smbus_device,
184#ifndef CONFIG_SH_R7780RP 212#ifndef CONFIG_SH_R7780RP
185 &ax88796_device, 213 &ax88796_device,
186#endif 214#endif
@@ -199,12 +227,20 @@ static struct trapped_io cf_trapped_io = {
199 227
200static int __init r7780rp_devices_setup(void) 228static int __init r7780rp_devices_setup(void)
201{ 229{
230 int ret = 0;
231
202#ifndef CONFIG_SH_R7780RP 232#ifndef CONFIG_SH_R7780RP
203 if (register_trapped_io(&cf_trapped_io) == 0) 233 if (register_trapped_io(&cf_trapped_io) == 0)
204 platform_device_register(&cf_ide_device); 234 ret |= platform_device_register(&cf_ide_device);
205#endif 235#endif
206 return platform_add_devices(r7780rp_devices, 236
237 ret |= platform_add_devices(r7780rp_devices,
207 ARRAY_SIZE(r7780rp_devices)); 238 ARRAY_SIZE(r7780rp_devices));
239
240 ret |= i2c_register_board_info(0, highlander_i2c_devices,
241 ARRAY_SIZE(highlander_i2c_devices));
242
243 return ret;
208} 244}
209device_initcall(r7780rp_devices_setup); 245device_initcall(r7780rp_devices_setup);
210 246
diff --git a/arch/sh/boards/se/7721/Makefile b/arch/sh/boards/se/7721/Makefile
new file mode 100644
index 000000000000..7f09030980b3
--- /dev/null
+++ b/arch/sh/boards/se/7721/Makefile
@@ -0,0 +1 @@
obj-y := setup.o irq.o
diff --git a/arch/sh/boards/se/7721/irq.c b/arch/sh/boards/se/7721/irq.c
new file mode 100644
index 000000000000..c4fdd622bf8b
--- /dev/null
+++ b/arch/sh/boards/se/7721/irq.c
@@ -0,0 +1,45 @@
1/*
2 * linux/arch/sh/boards/se/7721/irq.c
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/irq.h>
12#include <linux/interrupt.h>
13#include <linux/io.h>
14#include <asm/se7721.h>
15
16enum {
17 UNUSED = 0,
18
19 /* board specific interrupt sources */
20 MRSHPC,
21};
22
23static struct intc_vect vectors[] __initdata = {
24 INTC_IRQ(MRSHPC, MRSHPC_IRQ0),
25};
26
27static struct intc_prio_reg prio_registers[] __initdata = {
28 { FPGA_ILSR6, 0, 8, 4, /* IRLMSK */
29 { 0, MRSHPC } },
30};
31
32static DECLARE_INTC_DESC(intc_desc, "SE7721", vectors,
33 NULL, NULL, prio_registers, NULL);
34
35/*
36 * Initialize IRQ setting
37 */
38void __init init_se7721_IRQ(void)
39{
40 /* PPCR */
41 ctrl_outw(ctrl_inw(0xa4050118) & ~0x00ff, 0xa4050118);
42
43 register_intc_controller(&intc_desc);
44 intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0);
45}
diff --git a/arch/sh/boards/se/7721/setup.c b/arch/sh/boards/se/7721/setup.c
new file mode 100644
index 000000000000..1be3e92752f7
--- /dev/null
+++ b/arch/sh/boards/se/7721/setup.c
@@ -0,0 +1,99 @@
1/*
2 * linux/arch/sh/boards/se/7721/setup.c
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 *
6 * Hitachi UL SolutionEngine 7721 Support.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 *
12 */
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <asm/machvec.h>
16#include <asm/se7721.h>
17#include <asm/io.h>
18#include <asm/heartbeat.h>
19
20static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
21
22static struct heartbeat_data heartbeat_data = {
23 .bit_pos = heartbeat_bit_pos,
24 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
25 .regsize = 16,
26};
27
28static struct resource heartbeat_resources[] = {
29 [0] = {
30 .start = PA_LED,
31 .end = PA_LED,
32 .flags = IORESOURCE_MEM,
33 },
34};
35
36static struct platform_device heartbeat_device = {
37 .name = "heartbeat",
38 .id = -1,
39 .dev = {
40 .platform_data = &heartbeat_data,
41 },
42 .num_resources = ARRAY_SIZE(heartbeat_resources),
43 .resource = heartbeat_resources,
44};
45
46static struct resource cf_ide_resources[] = {
47 [0] = {
48 .start = PA_MRSHPC_IO + 0x1f0,
49 .end = PA_MRSHPC_IO + 0x1f0 + 8 ,
50 .flags = IORESOURCE_IO,
51 },
52 [1] = {
53 .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
54 .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
55 .flags = IORESOURCE_IO,
56 },
57 [2] = {
58 .start = MRSHPC_IRQ0,
59 .flags = IORESOURCE_IRQ,
60 },
61};
62
63static struct platform_device cf_ide_device = {
64 .name = "pata_platform",
65 .id = -1,
66 .num_resources = ARRAY_SIZE(cf_ide_resources),
67 .resource = cf_ide_resources,
68};
69
70static struct platform_device *se7721_devices[] __initdata = {
71 &cf_ide_device,
72 &heartbeat_device
73};
74
75static int __init se7721_devices_setup(void)
76{
77 return platform_add_devices(se7721_devices,
78 ARRAY_SIZE(se7721_devices));
79}
80device_initcall(se7721_devices_setup);
81
82static void __init se7721_setup(char **cmdline_p)
83{
84 /* for USB */
85 ctrl_outw(0x0000, 0xA405010C); /* PGCR */
86 ctrl_outw(0x0000, 0xA405010E); /* PHCR */
87 ctrl_outw(0x00AA, 0xA4050118); /* PPCR */
88 ctrl_outw(0x0000, 0xA4050124); /* PSELA */
89}
90
91/*
92 * The Machine Vector
93 */
94struct sh_machine_vector mv_se7721 __initmv = {
95 .mv_name = "Solution Engine 7721",
96 .mv_setup = se7721_setup,
97 .mv_nr_irqs = 109,
98 .mv_init_irq = init_se7721_IRQ,
99};
diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c
index b1a3d9d0172f..33f6ee71f848 100644
--- a/arch/sh/boards/se/7722/setup.c
+++ b/arch/sh/boards/se/7722/setup.c
@@ -13,10 +13,12 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
16#include <linux/input.h>
16#include <asm/machvec.h> 17#include <asm/machvec.h>
17#include <asm/se7722.h> 18#include <asm/se7722.h>
18#include <asm/io.h> 19#include <asm/io.h>
19#include <asm/heartbeat.h> 20#include <asm/heartbeat.h>
21#include <asm/sh_keysc.h>
20 22
21/* Heartbeat */ 23/* Heartbeat */
22static struct heartbeat_data heartbeat_data = { 24static struct heartbeat_data heartbeat_data = {
@@ -92,10 +94,47 @@ static struct platform_device cf_ide_device = {
92 .resource = cf_ide_resources, 94 .resource = cf_ide_resources,
93}; 95};
94 96
97static struct sh_keysc_info sh_keysc_info = {
98 .mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */
99 .scan_timing = 3,
100 .delay = 5,
101 .keycodes = { /* SW1 -> SW30 */
102 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
103 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
104 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
105 KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T,
106 KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y,
107 KEY_Z,
108 KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */
109 },
110};
111
112static struct resource sh_keysc_resources[] = {
113 [0] = {
114 .start = 0x044b0000,
115 .end = 0x044b000f,
116 .flags = IORESOURCE_MEM,
117 },
118 [1] = {
119 .start = 79,
120 .flags = IORESOURCE_IRQ,
121 },
122};
123
124static struct platform_device sh_keysc_device = {
125 .name = "sh_keysc",
126 .num_resources = ARRAY_SIZE(sh_keysc_resources),
127 .resource = sh_keysc_resources,
128 .dev = {
129 .platform_data = &sh_keysc_info,
130 },
131};
132
95static struct platform_device *se7722_devices[] __initdata = { 133static struct platform_device *se7722_devices[] __initdata = {
96 &heartbeat_device, 134 &heartbeat_device,
97 &smc91x_eth_device, 135 &smc91x_eth_device,
98 &cf_ide_device, 136 &cf_ide_device,
137 &sh_keysc_device,
99}; 138};
100 139
101static int __init se7722_devices_setup(void) 140static int __init se7722_devices_setup(void)
@@ -136,6 +175,8 @@ static void __init se7722_setup(char **cmdline_p)
136 ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */ 175 ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */
137 ctrl_outw(0x0000, PORT_PYCR); 176 ctrl_outw(0x0000, PORT_PYCR);
138 ctrl_outw(0x0000, PORT_PZCR); 177 ctrl_outw(0x0000, PORT_PZCR);
178 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
179 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
139} 180}
140 181
141/* 182/*
diff --git a/arch/sh/configs/se7721_defconfig b/arch/sh/configs/se7721_defconfig
new file mode 100644
index 000000000000..f3d4ca0caa46
--- /dev/null
+++ b/arch/sh/configs/se7721_defconfig
@@ -0,0 +1,1085 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.25-rc5
4# Fri Mar 21 12:05:31 2008
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9CONFIG_GENERIC_FIND_NEXT_BIT=y
10CONFIG_GENERIC_HWEIGHT=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_GENERIC_IRQ_PROBE=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_TIME=y
15CONFIG_GENERIC_CLOCKEVENTS=y
16CONFIG_STACKTRACE_SUPPORT=y
17CONFIG_LOCKDEP_SUPPORT=y
18# CONFIG_ARCH_HAS_ILOG2_U32 is not set
19# CONFIG_ARCH_HAS_ILOG2_U64 is not set
20CONFIG_ARCH_NO_VIRT_TO_BUS=y
21CONFIG_ARCH_SUPPORTS_AOUT=y
22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
23
24#
25# General setup
26#
27CONFIG_EXPERIMENTAL=y
28CONFIG_BROKEN_ON_SMP=y
29CONFIG_INIT_ENV_ARG_LIMIT=32
30CONFIG_LOCALVERSION=""
31# CONFIG_LOCALVERSION_AUTO is not set
32# CONFIG_SWAP is not set
33CONFIG_SYSVIPC=y
34CONFIG_SYSVIPC_SYSCTL=y
35CONFIG_POSIX_MQUEUE=y
36CONFIG_BSD_PROCESS_ACCT=y
37# CONFIG_BSD_PROCESS_ACCT_V3 is not set
38# CONFIG_TASKSTATS is not set
39# CONFIG_AUDIT is not set
40# CONFIG_IKCONFIG is not set
41CONFIG_LOG_BUF_SHIFT=14
42# CONFIG_CGROUPS is not set
43CONFIG_GROUP_SCHED=y
44CONFIG_FAIR_GROUP_SCHED=y
45# CONFIG_RT_GROUP_SCHED is not set
46CONFIG_USER_SCHED=y
47# CONFIG_CGROUP_SCHED is not set
48CONFIG_SYSFS_DEPRECATED=y
49CONFIG_SYSFS_DEPRECATED_V2=y
50# CONFIG_RELAY is not set
51# CONFIG_NAMESPACES is not set
52# CONFIG_BLK_DEV_INITRD is not set
53# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
54CONFIG_SYSCTL=y
55CONFIG_EMBEDDED=y
56CONFIG_UID16=y
57CONFIG_SYSCTL_SYSCALL=y
58CONFIG_KALLSYMS=y
59CONFIG_KALLSYMS_ALL=y
60# CONFIG_KALLSYMS_EXTRA_PASS is not set
61CONFIG_HOTPLUG=y
62CONFIG_PRINTK=y
63# CONFIG_BUG is not set
64CONFIG_ELF_CORE=y
65CONFIG_COMPAT_BRK=y
66# CONFIG_BASE_FULL is not set
67CONFIG_FUTEX=y
68CONFIG_ANON_INODES=y
69CONFIG_EPOLL=y
70CONFIG_SIGNALFD=y
71CONFIG_TIMERFD=y
72CONFIG_EVENTFD=y
73# CONFIG_SHMEM is not set
74CONFIG_VM_EVENT_COUNTERS=y
75CONFIG_SLAB=y
76# CONFIG_SLUB is not set
77# CONFIG_SLOB is not set
78# CONFIG_PROFILING is not set
79# CONFIG_MARKERS is not set
80CONFIG_HAVE_OPROFILE=y
81# CONFIG_HAVE_KPROBES is not set
82# CONFIG_HAVE_KRETPROBES is not set
83CONFIG_PROC_PAGE_MONITOR=y
84CONFIG_SLABINFO=y
85CONFIG_RT_MUTEXES=y
86CONFIG_TINY_SHMEM=y
87CONFIG_BASE_SMALL=1
88CONFIG_MODULES=y
89# CONFIG_MODULE_UNLOAD is not set
90# CONFIG_MODVERSIONS is not set
91# CONFIG_MODULE_SRCVERSION_ALL is not set
92# CONFIG_KMOD is not set
93CONFIG_BLOCK=y
94# CONFIG_LBD is not set
95# CONFIG_BLK_DEV_IO_TRACE is not set
96# CONFIG_LSF is not set
97# CONFIG_BLK_DEV_BSG is not set
98
99#
100# IO Schedulers
101#
102CONFIG_IOSCHED_NOOP=y
103# CONFIG_IOSCHED_AS is not set
104# CONFIG_IOSCHED_DEADLINE is not set
105# CONFIG_IOSCHED_CFQ is not set
106# CONFIG_DEFAULT_AS is not set
107# CONFIG_DEFAULT_DEADLINE is not set
108# CONFIG_DEFAULT_CFQ is not set
109CONFIG_DEFAULT_NOOP=y
110CONFIG_DEFAULT_IOSCHED="noop"
111CONFIG_CLASSIC_RCU=y
112
113#
114# System type
115#
116CONFIG_CPU_SH3=y
117# CONFIG_CPU_SUBTYPE_SH7619 is not set
118# CONFIG_CPU_SUBTYPE_SH7203 is not set
119# CONFIG_CPU_SUBTYPE_SH7206 is not set
120# CONFIG_CPU_SUBTYPE_SH7263 is not set
121# CONFIG_CPU_SUBTYPE_MXG is not set
122# CONFIG_CPU_SUBTYPE_SH7705 is not set
123# CONFIG_CPU_SUBTYPE_SH7706 is not set
124# CONFIG_CPU_SUBTYPE_SH7707 is not set
125# CONFIG_CPU_SUBTYPE_SH7708 is not set
126# CONFIG_CPU_SUBTYPE_SH7709 is not set
127# CONFIG_CPU_SUBTYPE_SH7710 is not set
128# CONFIG_CPU_SUBTYPE_SH7712 is not set
129# CONFIG_CPU_SUBTYPE_SH7720 is not set
130CONFIG_CPU_SUBTYPE_SH7721=y
131# CONFIG_CPU_SUBTYPE_SH7750 is not set
132# CONFIG_CPU_SUBTYPE_SH7091 is not set
133# CONFIG_CPU_SUBTYPE_SH7750R is not set
134# CONFIG_CPU_SUBTYPE_SH7750S is not set
135# CONFIG_CPU_SUBTYPE_SH7751 is not set
136# CONFIG_CPU_SUBTYPE_SH7751R is not set
137# CONFIG_CPU_SUBTYPE_SH7760 is not set
138# CONFIG_CPU_SUBTYPE_SH4_202 is not set
139# CONFIG_CPU_SUBTYPE_SH7763 is not set
140# CONFIG_CPU_SUBTYPE_SH7770 is not set
141# CONFIG_CPU_SUBTYPE_SH7780 is not set
142# CONFIG_CPU_SUBTYPE_SH7785 is not set
143# CONFIG_CPU_SUBTYPE_SHX3 is not set
144# CONFIG_CPU_SUBTYPE_SH7343 is not set
145# CONFIG_CPU_SUBTYPE_SH7722 is not set
146# CONFIG_CPU_SUBTYPE_SH7366 is not set
147# CONFIG_CPU_SUBTYPE_SH5_101 is not set
148# CONFIG_CPU_SUBTYPE_SH5_103 is not set
149
150#
151# Memory management options
152#
153CONFIG_QUICKLIST=y
154CONFIG_MMU=y
155CONFIG_PAGE_OFFSET=0x80000000
156CONFIG_MEMORY_START=0x0c000000
157CONFIG_MEMORY_SIZE=0x02000000
158CONFIG_29BIT=y
159CONFIG_VSYSCALL=y
160CONFIG_ARCH_FLATMEM_ENABLE=y
161CONFIG_ARCH_SPARSEMEM_ENABLE=y
162CONFIG_ARCH_SPARSEMEM_DEFAULT=y
163CONFIG_MAX_ACTIVE_REGIONS=1
164CONFIG_ARCH_POPULATES_NODE_MAP=y
165CONFIG_ARCH_SELECT_MEMORY_MODEL=y
166CONFIG_PAGE_SIZE_4KB=y
167# CONFIG_PAGE_SIZE_8KB is not set
168# CONFIG_PAGE_SIZE_64KB is not set
169CONFIG_SELECT_MEMORY_MODEL=y
170CONFIG_FLATMEM_MANUAL=y
171# CONFIG_DISCONTIGMEM_MANUAL is not set
172# CONFIG_SPARSEMEM_MANUAL is not set
173CONFIG_FLATMEM=y
174CONFIG_FLAT_NODE_MEM_MAP=y
175CONFIG_SPARSEMEM_STATIC=y
176# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
177CONFIG_SPLIT_PTLOCK_CPUS=4
178# CONFIG_RESOURCES_64BIT is not set
179CONFIG_ZONE_DMA_FLAG=0
180CONFIG_NR_QUICK=2
181
182#
183# Cache configuration
184#
185# CONFIG_SH_DIRECT_MAPPED is not set
186CONFIG_CACHE_WRITEBACK=y
187# CONFIG_CACHE_WRITETHROUGH is not set
188# CONFIG_CACHE_OFF is not set
189
190#
191# Processor features
192#
193CONFIG_CPU_LITTLE_ENDIAN=y
194# CONFIG_CPU_BIG_ENDIAN is not set
195# CONFIG_SH_FPU_EMU is not set
196# CONFIG_SH_DSP is not set
197# CONFIG_SH_ADC is not set
198CONFIG_CPU_HAS_INTEVT=y
199CONFIG_CPU_HAS_SR_RB=y
200CONFIG_CPU_HAS_DSP=y
201
202#
203# Board support
204#
205CONFIG_SOLUTION_ENGINE=y
206CONFIG_SH_7721_SOLUTION_ENGINE=y
207
208#
209# Timer and clock configuration
210#
211CONFIG_SH_TMU=y
212CONFIG_SH_TIMER_IRQ=16
213CONFIG_SH_PCLK_FREQ=33333333
214# CONFIG_TICK_ONESHOT is not set
215# CONFIG_NO_HZ is not set
216# CONFIG_HIGH_RES_TIMERS is not set
217CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
218
219#
220# CPU Frequency scaling
221#
222# CONFIG_CPU_FREQ is not set
223
224#
225# DMA support
226#
227# CONFIG_SH_DMA is not set
228
229#
230# Companion Chips
231#
232
233#
234# Additional SuperH Device Drivers
235#
236CONFIG_HEARTBEAT=y
237# CONFIG_PUSH_SWITCH is not set
238
239#
240# Kernel features
241#
242# CONFIG_HZ_100 is not set
243CONFIG_HZ_250=y
244# CONFIG_HZ_300 is not set
245# CONFIG_HZ_1000 is not set
246CONFIG_HZ=250
247# CONFIG_SCHED_HRTICK is not set
248# CONFIG_KEXEC is not set
249# CONFIG_CRASH_DUMP is not set
250# CONFIG_PREEMPT_NONE is not set
251CONFIG_PREEMPT_VOLUNTARY=y
252# CONFIG_PREEMPT is not set
253CONFIG_GUSA=y
254# CONFIG_GUSA_RB is not set
255
256#
257# Boot options
258#
259CONFIG_ZERO_PAGE_OFFSET=0x00001000
260CONFIG_BOOT_LINK_OFFSET=0x00800000
261CONFIG_CMDLINE_BOOL=y
262CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda2"
263
264#
265# Bus options
266#
267CONFIG_CF_ENABLER=y
268# CONFIG_CF_AREA5 is not set
269CONFIG_CF_AREA6=y
270CONFIG_CF_BASE_ADDR=0xb8000000
271# CONFIG_ARCH_SUPPORTS_MSI is not set
272# CONFIG_PCCARD is not set
273
274#
275# Executable file formats
276#
277CONFIG_BINFMT_ELF=y
278# CONFIG_BINFMT_MISC is not set
279
280#
281# Networking
282#
283CONFIG_NET=y
284
285#
286# Networking options
287#
288CONFIG_PACKET=y
289CONFIG_PACKET_MMAP=y
290CONFIG_UNIX=y
291CONFIG_XFRM=y
292# CONFIG_XFRM_USER is not set
293# CONFIG_XFRM_SUB_POLICY is not set
294# CONFIG_XFRM_MIGRATE is not set
295# CONFIG_XFRM_STATISTICS is not set
296CONFIG_NET_KEY=y
297# CONFIG_NET_KEY_MIGRATE is not set
298CONFIG_INET=y
299CONFIG_IP_MULTICAST=y
300CONFIG_IP_ADVANCED_ROUTER=y
301CONFIG_ASK_IP_FIB_HASH=y
302# CONFIG_IP_FIB_TRIE is not set
303CONFIG_IP_FIB_HASH=y
304CONFIG_IP_MULTIPLE_TABLES=y
305CONFIG_IP_ROUTE_MULTIPATH=y
306CONFIG_IP_ROUTE_VERBOSE=y
307CONFIG_IP_PNP=y
308CONFIG_IP_PNP_DHCP=y
309# CONFIG_IP_PNP_BOOTP is not set
310# CONFIG_IP_PNP_RARP is not set
311# CONFIG_NET_IPIP is not set
312# CONFIG_NET_IPGRE is not set
313CONFIG_IP_MROUTE=y
314CONFIG_IP_PIMSM_V1=y
315CONFIG_IP_PIMSM_V2=y
316# CONFIG_ARPD is not set
317CONFIG_SYN_COOKIES=y
318CONFIG_INET_AH=y
319CONFIG_INET_ESP=y
320CONFIG_INET_IPCOMP=y
321CONFIG_INET_XFRM_TUNNEL=y
322CONFIG_INET_TUNNEL=y
323CONFIG_INET_XFRM_MODE_TRANSPORT=y
324CONFIG_INET_XFRM_MODE_TUNNEL=y
325CONFIG_INET_XFRM_MODE_BEET=y
326# CONFIG_INET_LRO is not set
327# CONFIG_INET_DIAG is not set
328# CONFIG_TCP_CONG_ADVANCED is not set
329CONFIG_TCP_CONG_CUBIC=y
330CONFIG_DEFAULT_TCP_CONG="cubic"
331# CONFIG_TCP_MD5SIG is not set
332# CONFIG_IPV6 is not set
333# CONFIG_INET6_XFRM_TUNNEL is not set
334# CONFIG_INET6_TUNNEL is not set
335# CONFIG_NETWORK_SECMARK is not set
336# CONFIG_NETFILTER is not set
337# CONFIG_IP_DCCP is not set
338# CONFIG_IP_SCTP is not set
339# CONFIG_TIPC is not set
340# CONFIG_ATM is not set
341# CONFIG_BRIDGE is not set
342# CONFIG_VLAN_8021Q is not set
343# CONFIG_DECNET is not set
344# CONFIG_LLC2 is not set
345# CONFIG_IPX is not set
346# CONFIG_ATALK is not set
347# CONFIG_X25 is not set
348# CONFIG_LAPB is not set
349# CONFIG_ECONET is not set
350# CONFIG_WAN_ROUTER is not set
351CONFIG_NET_SCHED=y
352
353#
354# Queueing/Scheduling
355#
356CONFIG_NET_SCH_CBQ=y
357CONFIG_NET_SCH_HTB=y
358CONFIG_NET_SCH_HFSC=y
359CONFIG_NET_SCH_PRIO=y
360# CONFIG_NET_SCH_RR is not set
361CONFIG_NET_SCH_RED=y
362CONFIG_NET_SCH_SFQ=y
363CONFIG_NET_SCH_TEQL=y
364CONFIG_NET_SCH_TBF=y
365CONFIG_NET_SCH_GRED=y
366CONFIG_NET_SCH_DSMARK=y
367CONFIG_NET_SCH_NETEM=y
368
369#
370# Classification
371#
372CONFIG_NET_CLS=y
373# CONFIG_NET_CLS_BASIC is not set
374CONFIG_NET_CLS_TCINDEX=y
375CONFIG_NET_CLS_ROUTE4=y
376CONFIG_NET_CLS_ROUTE=y
377CONFIG_NET_CLS_FW=y
378# CONFIG_NET_CLS_U32 is not set
379# CONFIG_NET_CLS_RSVP is not set
380# CONFIG_NET_CLS_RSVP6 is not set
381# CONFIG_NET_CLS_FLOW is not set
382# CONFIG_NET_EMATCH is not set
383# CONFIG_NET_CLS_ACT is not set
384CONFIG_NET_CLS_IND=y
385CONFIG_NET_SCH_FIFO=y
386
387#
388# Network testing
389#
390# CONFIG_NET_PKTGEN is not set
391# CONFIG_HAMRADIO is not set
392# CONFIG_CAN is not set
393# CONFIG_IRDA is not set
394# CONFIG_BT is not set
395# CONFIG_AF_RXRPC is not set
396CONFIG_FIB_RULES=y
397
398#
399# Wireless
400#
401# CONFIG_CFG80211 is not set
402# CONFIG_WIRELESS_EXT is not set
403# CONFIG_MAC80211 is not set
404# CONFIG_IEEE80211 is not set
405# CONFIG_RFKILL is not set
406# CONFIG_NET_9P is not set
407
408#
409# Device Drivers
410#
411
412#
413# Generic Driver Options
414#
415CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
416CONFIG_STANDALONE=y
417CONFIG_PREVENT_FIRMWARE_BUILD=y
418CONFIG_FW_LOADER=y
419# CONFIG_DEBUG_DRIVER is not set
420# CONFIG_DEBUG_DEVRES is not set
421# CONFIG_SYS_HYPERVISOR is not set
422# CONFIG_CONNECTOR is not set
423CONFIG_MTD=y
424# CONFIG_MTD_DEBUG is not set
425CONFIG_MTD_CONCAT=y
426CONFIG_MTD_PARTITIONS=y
427# CONFIG_MTD_REDBOOT_PARTS is not set
428# CONFIG_MTD_CMDLINE_PARTS is not set
429
430#
431# User Modules And Translation Layers
432#
433CONFIG_MTD_CHAR=y
434CONFIG_MTD_BLKDEVS=y
435CONFIG_MTD_BLOCK=y
436# CONFIG_FTL is not set
437# CONFIG_NFTL is not set
438# CONFIG_INFTL is not set
439# CONFIG_RFD_FTL is not set
440# CONFIG_SSFDC is not set
441# CONFIG_MTD_OOPS is not set
442
443#
444# RAM/ROM/Flash chip drivers
445#
446CONFIG_MTD_CFI=y
447# CONFIG_MTD_JEDECPROBE is not set
448CONFIG_MTD_GEN_PROBE=y
449# CONFIG_MTD_CFI_ADV_OPTIONS is not set
450CONFIG_MTD_MAP_BANK_WIDTH_1=y
451CONFIG_MTD_MAP_BANK_WIDTH_2=y
452CONFIG_MTD_MAP_BANK_WIDTH_4=y
453# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
454# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
455# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
456CONFIG_MTD_CFI_I1=y
457CONFIG_MTD_CFI_I2=y
458# CONFIG_MTD_CFI_I4 is not set
459# CONFIG_MTD_CFI_I8 is not set
460# CONFIG_MTD_CFI_INTELEXT is not set
461CONFIG_MTD_CFI_AMDSTD=y
462# CONFIG_MTD_CFI_STAA is not set
463CONFIG_MTD_CFI_UTIL=y
464# CONFIG_MTD_RAM is not set
465# CONFIG_MTD_ROM is not set
466# CONFIG_MTD_ABSENT is not set
467
468#
469# Mapping drivers for chip access
470#
471# CONFIG_MTD_COMPLEX_MAPPINGS is not set
472# CONFIG_MTD_PHYSMAP is not set
473# CONFIG_MTD_PLATRAM is not set
474
475#
476# Self-contained MTD device drivers
477#
478# CONFIG_MTD_SLRAM is not set
479# CONFIG_MTD_PHRAM is not set
480# CONFIG_MTD_MTDRAM is not set
481# CONFIG_MTD_BLOCK2MTD is not set
482
483#
484# Disk-On-Chip Device Drivers
485#
486# CONFIG_MTD_DOC2000 is not set
487# CONFIG_MTD_DOC2001 is not set
488# CONFIG_MTD_DOC2001PLUS is not set
489# CONFIG_MTD_NAND is not set
490# CONFIG_MTD_ONENAND is not set
491
492#
493# UBI - Unsorted block images
494#
495# CONFIG_MTD_UBI is not set
496# CONFIG_PARPORT is not set
497CONFIG_BLK_DEV=y
498# CONFIG_BLK_DEV_COW_COMMON is not set
499# CONFIG_BLK_DEV_LOOP is not set
500# CONFIG_BLK_DEV_NBD is not set
501# CONFIG_BLK_DEV_UB is not set
502# CONFIG_BLK_DEV_RAM is not set
503# CONFIG_CDROM_PKTCDVD is not set
504# CONFIG_ATA_OVER_ETH is not set
505CONFIG_MISC_DEVICES=y
506# CONFIG_EEPROM_93CX6 is not set
507# CONFIG_ENCLOSURE_SERVICES is not set
508CONFIG_HAVE_IDE=y
509# CONFIG_IDE is not set
510
511#
512# SCSI device support
513#
514# CONFIG_RAID_ATTRS is not set
515CONFIG_SCSI=y
516CONFIG_SCSI_DMA=y
517# CONFIG_SCSI_TGT is not set
518# CONFIG_SCSI_NETLINK is not set
519CONFIG_SCSI_PROC_FS=y
520
521#
522# SCSI support type (disk, tape, CD-ROM)
523#
524CONFIG_BLK_DEV_SD=y
525# CONFIG_CHR_DEV_ST is not set
526# CONFIG_CHR_DEV_OSST is not set
527# CONFIG_BLK_DEV_SR is not set
528# CONFIG_CHR_DEV_SG is not set
529# CONFIG_CHR_DEV_SCH is not set
530
531#
532# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
533#
534CONFIG_SCSI_MULTI_LUN=y
535# CONFIG_SCSI_CONSTANTS is not set
536# CONFIG_SCSI_LOGGING is not set
537# CONFIG_SCSI_SCAN_ASYNC is not set
538CONFIG_SCSI_WAIT_SCAN=m
539
540#
541# SCSI Transports
542#
543# CONFIG_SCSI_SPI_ATTRS is not set
544# CONFIG_SCSI_FC_ATTRS is not set
545# CONFIG_SCSI_ISCSI_ATTRS is not set
546# CONFIG_SCSI_SAS_LIBSAS is not set
547# CONFIG_SCSI_SRP_ATTRS is not set
548# CONFIG_SCSI_LOWLEVEL is not set
549CONFIG_ATA=y
550# CONFIG_ATA_NONSTANDARD is not set
551# CONFIG_SATA_MV is not set
552CONFIG_PATA_PLATFORM=y
553# CONFIG_MD is not set
554CONFIG_NETDEVICES=y
555# CONFIG_NETDEVICES_MULTIQUEUE is not set
556# CONFIG_DUMMY is not set
557# CONFIG_BONDING is not set
558# CONFIG_MACVLAN is not set
559# CONFIG_EQUALIZER is not set
560# CONFIG_TUN is not set
561# CONFIG_VETH is not set
562# CONFIG_NET_ETHERNET is not set
563CONFIG_NETDEV_1000=y
564# CONFIG_E1000E_ENABLED is not set
565CONFIG_NETDEV_10000=y
566
567#
568# Wireless LAN
569#
570# CONFIG_WLAN_PRE80211 is not set
571# CONFIG_WLAN_80211 is not set
572
573#
574# USB Network Adapters
575#
576# CONFIG_USB_CATC is not set
577# CONFIG_USB_KAWETH is not set
578# CONFIG_USB_PEGASUS is not set
579# CONFIG_USB_RTL8150 is not set
580# CONFIG_USB_USBNET is not set
581# CONFIG_WAN is not set
582# CONFIG_PPP is not set
583# CONFIG_SLIP is not set
584# CONFIG_NETCONSOLE is not set
585# CONFIG_NETPOLL is not set
586# CONFIG_NET_POLL_CONTROLLER is not set
587# CONFIG_ISDN is not set
588# CONFIG_PHONE is not set
589
590#
591# Input device support
592#
593CONFIG_INPUT=y
594# CONFIG_INPUT_FF_MEMLESS is not set
595# CONFIG_INPUT_POLLDEV is not set
596
597#
598# Userland interfaces
599#
600CONFIG_INPUT_MOUSEDEV=y
601CONFIG_INPUT_MOUSEDEV_PSAUX=y
602CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
603CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
604# CONFIG_INPUT_JOYDEV is not set
605CONFIG_INPUT_EVDEV=y
606# CONFIG_INPUT_EVBUG is not set
607
608#
609# Input Device Drivers
610#
611CONFIG_INPUT_KEYBOARD=y
612# CONFIG_KEYBOARD_ATKBD is not set
613# CONFIG_KEYBOARD_SUNKBD is not set
614# CONFIG_KEYBOARD_LKKBD is not set
615# CONFIG_KEYBOARD_XTKBD is not set
616# CONFIG_KEYBOARD_NEWTON is not set
617# CONFIG_KEYBOARD_STOWAWAY is not set
618# CONFIG_KEYBOARD_SH_KEYSC is not set
619CONFIG_INPUT_MOUSE=y
620# CONFIG_MOUSE_PS2 is not set
621# CONFIG_MOUSE_SERIAL is not set
622# CONFIG_MOUSE_APPLETOUCH is not set
623# CONFIG_MOUSE_VSXXXAA is not set
624# CONFIG_INPUT_JOYSTICK is not set
625# CONFIG_INPUT_TABLET is not set
626# CONFIG_INPUT_TOUCHSCREEN is not set
627# CONFIG_INPUT_MISC is not set
628
629#
630# Hardware I/O ports
631#
632# CONFIG_SERIO is not set
633# CONFIG_GAMEPORT is not set
634
635#
636# Character devices
637#
638# CONFIG_VT is not set
639# CONFIG_SERIAL_NONSTANDARD is not set
640
641#
642# Serial drivers
643#
644# CONFIG_SERIAL_8250 is not set
645
646#
647# Non-8250 serial port support
648#
649CONFIG_SERIAL_SH_SCI=y
650CONFIG_SERIAL_SH_SCI_NR_UARTS=2
651CONFIG_SERIAL_SH_SCI_CONSOLE=y
652CONFIG_SERIAL_CORE=y
653CONFIG_SERIAL_CORE_CONSOLE=y
654CONFIG_UNIX98_PTYS=y
655# CONFIG_LEGACY_PTYS is not set
656# CONFIG_IPMI_HANDLER is not set
657# CONFIG_HW_RANDOM is not set
658# CONFIG_R3964 is not set
659# CONFIG_RAW_DRIVER is not set
660# CONFIG_TCG_TPM is not set
661# CONFIG_I2C is not set
662
663#
664# SPI support
665#
666# CONFIG_SPI is not set
667# CONFIG_SPI_MASTER is not set
668# CONFIG_W1 is not set
669# CONFIG_POWER_SUPPLY is not set
670# CONFIG_HWMON is not set
671CONFIG_THERMAL=y
672# CONFIG_WATCHDOG is not set
673
674#
675# Sonics Silicon Backplane
676#
677CONFIG_SSB_POSSIBLE=y
678# CONFIG_SSB is not set
679
680#
681# Multifunction device drivers
682#
683# CONFIG_MFD_SM501 is not set
684
685#
686# Multimedia devices
687#
688# CONFIG_VIDEO_DEV is not set
689# CONFIG_DVB_CORE is not set
690# CONFIG_DAB is not set
691
692#
693# Graphics support
694#
695# CONFIG_VGASTATE is not set
696# CONFIG_VIDEO_OUTPUT_CONTROL is not set
697# CONFIG_FB is not set
698# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
699
700#
701# Display device support
702#
703# CONFIG_DISPLAY_SUPPORT is not set
704
705#
706# Sound
707#
708# CONFIG_SOUND is not set
709CONFIG_HID_SUPPORT=y
710CONFIG_HID=y
711# CONFIG_HID_DEBUG is not set
712# CONFIG_HIDRAW is not set
713
714#
715# USB Input Devices
716#
717CONFIG_USB_HID=y
718# CONFIG_USB_HIDINPUT_POWERBOOK is not set
719# CONFIG_HID_FF is not set
720# CONFIG_USB_HIDDEV is not set
721CONFIG_USB_SUPPORT=y
722CONFIG_USB_ARCH_HAS_HCD=y
723CONFIG_USB_ARCH_HAS_OHCI=y
724# CONFIG_USB_ARCH_HAS_EHCI is not set
725CONFIG_USB=y
726# CONFIG_USB_DEBUG is not set
727# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
728
729#
730# Miscellaneous USB options
731#
732# CONFIG_USB_DEVICEFS is not set
733CONFIG_USB_DEVICE_CLASS=y
734# CONFIG_USB_DYNAMIC_MINORS is not set
735# CONFIG_USB_OTG is not set
736
737#
738# USB Host Controller Drivers
739#
740# CONFIG_USB_ISP116X_HCD is not set
741CONFIG_USB_OHCI_HCD=y
742# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
743# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
744CONFIG_USB_OHCI_LITTLE_ENDIAN=y
745# CONFIG_USB_SL811_HCD is not set
746# CONFIG_USB_R8A66597_HCD is not set
747
748#
749# USB Device Class drivers
750#
751# CONFIG_USB_ACM is not set
752# CONFIG_USB_PRINTER is not set
753
754#
755# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
756#
757
758#
759# may also be needed; see USB_STORAGE Help for more information
760#
761CONFIG_USB_STORAGE=y
762# CONFIG_USB_STORAGE_DEBUG is not set
763# CONFIG_USB_STORAGE_DATAFAB is not set
764# CONFIG_USB_STORAGE_FREECOM is not set
765# CONFIG_USB_STORAGE_ISD200 is not set
766# CONFIG_USB_STORAGE_DPCM is not set
767# CONFIG_USB_STORAGE_USBAT is not set
768# CONFIG_USB_STORAGE_SDDR09 is not set
769# CONFIG_USB_STORAGE_SDDR55 is not set
770# CONFIG_USB_STORAGE_JUMPSHOT is not set
771# CONFIG_USB_STORAGE_ALAUDA is not set
772# CONFIG_USB_STORAGE_ONETOUCH is not set
773# CONFIG_USB_STORAGE_KARMA is not set
774# CONFIG_USB_LIBUSUAL is not set
775
776#
777# USB Imaging devices
778#
779# CONFIG_USB_MDC800 is not set
780# CONFIG_USB_MICROTEK is not set
781CONFIG_USB_MON=y
782
783#
784# USB port drivers
785#
786# CONFIG_USB_SERIAL is not set
787
788#
789# USB Miscellaneous drivers
790#
791# CONFIG_USB_EMI62 is not set
792# CONFIG_USB_EMI26 is not set
793# CONFIG_USB_ADUTUX is not set
794# CONFIG_USB_AUERSWALD is not set
795# CONFIG_USB_RIO500 is not set
796# CONFIG_USB_LEGOTOWER is not set
797# CONFIG_USB_LCD is not set
798# CONFIG_USB_BERRY_CHARGE is not set
799# CONFIG_USB_LED is not set
800# CONFIG_USB_CYPRESS_CY7C63 is not set
801# CONFIG_USB_CYTHERM is not set
802# CONFIG_USB_PHIDGET is not set
803# CONFIG_USB_IDMOUSE is not set
804# CONFIG_USB_FTDI_ELAN is not set
805# CONFIG_USB_APPLEDISPLAY is not set
806# CONFIG_USB_LD is not set
807# CONFIG_USB_TRANCEVIBRATOR is not set
808# CONFIG_USB_IOWARRIOR is not set
809# CONFIG_USB_GADGET is not set
810# CONFIG_MMC is not set
811# CONFIG_MEMSTICK is not set
812CONFIG_NEW_LEDS=y
813CONFIG_LEDS_CLASS=y
814
815#
816# LED drivers
817#
818
819#
820# LED Triggers
821#
822CONFIG_LEDS_TRIGGERS=y
823# CONFIG_LEDS_TRIGGER_TIMER is not set
824# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
825# CONFIG_RTC_CLASS is not set
826
827#
828# Userspace I/O
829#
830# CONFIG_UIO is not set
831
832#
833# File systems
834#
835CONFIG_EXT2_FS=y
836CONFIG_EXT2_FS_XATTR=y
837CONFIG_EXT2_FS_POSIX_ACL=y
838CONFIG_EXT2_FS_SECURITY=y
839# CONFIG_EXT2_FS_XIP is not set
840CONFIG_EXT3_FS=y
841CONFIG_EXT3_FS_XATTR=y
842# CONFIG_EXT3_FS_POSIX_ACL is not set
843# CONFIG_EXT3_FS_SECURITY is not set
844# CONFIG_EXT4DEV_FS is not set
845CONFIG_JBD=y
846CONFIG_FS_MBCACHE=y
847# CONFIG_REISERFS_FS is not set
848# CONFIG_JFS_FS is not set
849CONFIG_FS_POSIX_ACL=y
850# CONFIG_XFS_FS is not set
851# CONFIG_GFS2_FS is not set
852# CONFIG_OCFS2_FS is not set
853# CONFIG_DNOTIFY is not set
854# CONFIG_INOTIFY is not set
855# CONFIG_QUOTA is not set
856# CONFIG_AUTOFS_FS is not set
857# CONFIG_AUTOFS4_FS is not set
858# CONFIG_FUSE_FS is not set
859
860#
861# CD-ROM/DVD Filesystems
862#
863# CONFIG_ISO9660_FS is not set
864# CONFIG_UDF_FS is not set
865
866#
867# DOS/FAT/NT Filesystems
868#
869CONFIG_FAT_FS=y
870CONFIG_MSDOS_FS=y
871CONFIG_VFAT_FS=y
872CONFIG_FAT_DEFAULT_CODEPAGE=437
873CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
874# CONFIG_NTFS_FS is not set
875
876#
877# Pseudo filesystems
878#
879CONFIG_PROC_FS=y
880# CONFIG_PROC_KCORE is not set
881CONFIG_PROC_SYSCTL=y
882CONFIG_SYSFS=y
883CONFIG_TMPFS=y
884# CONFIG_TMPFS_POSIX_ACL is not set
885# CONFIG_HUGETLBFS is not set
886# CONFIG_HUGETLB_PAGE is not set
887# CONFIG_CONFIGFS_FS is not set
888
889#
890# Miscellaneous filesystems
891#
892# CONFIG_ADFS_FS is not set
893# CONFIG_AFFS_FS is not set
894# CONFIG_HFS_FS is not set
895# CONFIG_HFSPLUS_FS is not set
896# CONFIG_BEFS_FS is not set
897# CONFIG_BFS_FS is not set
898# CONFIG_EFS_FS is not set
899CONFIG_JFFS2_FS=y
900CONFIG_JFFS2_FS_DEBUG=0
901CONFIG_JFFS2_FS_WRITEBUFFER=y
902# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
903# CONFIG_JFFS2_SUMMARY is not set
904# CONFIG_JFFS2_FS_XATTR is not set
905# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
906CONFIG_JFFS2_ZLIB=y
907# CONFIG_JFFS2_LZO is not set
908CONFIG_JFFS2_RTIME=y
909# CONFIG_JFFS2_RUBIN is not set
910CONFIG_CRAMFS=y
911# CONFIG_VXFS_FS is not set
912# CONFIG_MINIX_FS is not set
913# CONFIG_HPFS_FS is not set
914# CONFIG_QNX4FS_FS is not set
915# CONFIG_ROMFS_FS is not set
916# CONFIG_SYSV_FS is not set
917# CONFIG_UFS_FS is not set
918# CONFIG_NETWORK_FILESYSTEMS is not set
919
920#
921# Partition Types
922#
923# CONFIG_PARTITION_ADVANCED is not set
924CONFIG_MSDOS_PARTITION=y
925CONFIG_NLS=y
926CONFIG_NLS_DEFAULT="iso8859-1"
927CONFIG_NLS_CODEPAGE_437=y
928# CONFIG_NLS_CODEPAGE_737 is not set
929# CONFIG_NLS_CODEPAGE_775 is not set
930# CONFIG_NLS_CODEPAGE_850 is not set
931# CONFIG_NLS_CODEPAGE_852 is not set
932# CONFIG_NLS_CODEPAGE_855 is not set
933# CONFIG_NLS_CODEPAGE_857 is not set
934# CONFIG_NLS_CODEPAGE_860 is not set
935# CONFIG_NLS_CODEPAGE_861 is not set
936# CONFIG_NLS_CODEPAGE_862 is not set
937# CONFIG_NLS_CODEPAGE_863 is not set
938# CONFIG_NLS_CODEPAGE_864 is not set
939# CONFIG_NLS_CODEPAGE_865 is not set
940# CONFIG_NLS_CODEPAGE_866 is not set
941# CONFIG_NLS_CODEPAGE_869 is not set
942# CONFIG_NLS_CODEPAGE_936 is not set
943# CONFIG_NLS_CODEPAGE_950 is not set
944CONFIG_NLS_CODEPAGE_932=y
945# CONFIG_NLS_CODEPAGE_949 is not set
946# CONFIG_NLS_CODEPAGE_874 is not set
947# CONFIG_NLS_ISO8859_8 is not set
948# CONFIG_NLS_CODEPAGE_1250 is not set
949# CONFIG_NLS_CODEPAGE_1251 is not set
950# CONFIG_NLS_ASCII is not set
951CONFIG_NLS_ISO8859_1=y
952# CONFIG_NLS_ISO8859_2 is not set
953# CONFIG_NLS_ISO8859_3 is not set
954# CONFIG_NLS_ISO8859_4 is not set
955# CONFIG_NLS_ISO8859_5 is not set
956# CONFIG_NLS_ISO8859_6 is not set
957# CONFIG_NLS_ISO8859_7 is not set
958# CONFIG_NLS_ISO8859_9 is not set
959# CONFIG_NLS_ISO8859_13 is not set
960# CONFIG_NLS_ISO8859_14 is not set
961# CONFIG_NLS_ISO8859_15 is not set
962# CONFIG_NLS_KOI8_R is not set
963# CONFIG_NLS_KOI8_U is not set
964# CONFIG_NLS_UTF8 is not set
965# CONFIG_DLM is not set
966
967#
968# Kernel hacking
969#
970CONFIG_TRACE_IRQFLAGS_SUPPORT=y
971# CONFIG_PRINTK_TIME is not set
972CONFIG_ENABLE_WARN_DEPRECATED=y
973CONFIG_ENABLE_MUST_CHECK=y
974# CONFIG_MAGIC_SYSRQ is not set
975# CONFIG_UNUSED_SYMBOLS is not set
976# CONFIG_DEBUG_FS is not set
977# CONFIG_HEADERS_CHECK is not set
978CONFIG_DEBUG_KERNEL=y
979# CONFIG_DEBUG_SHIRQ is not set
980# CONFIG_DETECT_SOFTLOCKUP is not set
981CONFIG_SCHED_DEBUG=y
982# CONFIG_SCHEDSTATS is not set
983# CONFIG_TIMER_STATS is not set
984# CONFIG_DEBUG_SLAB is not set
985# CONFIG_DEBUG_RT_MUTEXES is not set
986# CONFIG_RT_MUTEX_TESTER is not set
987# CONFIG_DEBUG_SPINLOCK is not set
988# CONFIG_DEBUG_MUTEXES is not set
989# CONFIG_DEBUG_LOCK_ALLOC is not set
990# CONFIG_PROVE_LOCKING is not set
991# CONFIG_LOCK_STAT is not set
992# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
993# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
994# CONFIG_DEBUG_KOBJECT is not set
995CONFIG_DEBUG_INFO=y
996# CONFIG_DEBUG_VM is not set
997# CONFIG_DEBUG_LIST is not set
998# CONFIG_DEBUG_SG is not set
999CONFIG_FRAME_POINTER=y
1000# CONFIG_BOOT_PRINTK_DELAY is not set
1001# CONFIG_RCU_TORTURE_TEST is not set
1002# CONFIG_BACKTRACE_SELF_TEST is not set
1003# CONFIG_FAULT_INJECTION is not set
1004# CONFIG_SAMPLES is not set
1005# CONFIG_SH_STANDARD_BIOS is not set
1006# CONFIG_EARLY_SCIF_CONSOLE is not set
1007# CONFIG_DEBUG_BOOTMEM is not set
1008# CONFIG_DEBUG_STACKOVERFLOW is not set
1009# CONFIG_DEBUG_STACK_USAGE is not set
1010# CONFIG_4KSTACKS is not set
1011# CONFIG_IRQSTACKS is not set
1012# CONFIG_SH_KGDB is not set
1013
1014#
1015# Security options
1016#
1017# CONFIG_KEYS is not set
1018# CONFIG_SECURITY is not set
1019# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1020CONFIG_CRYPTO=y
1021CONFIG_CRYPTO_ALGAPI=y
1022CONFIG_CRYPTO_AEAD=y
1023CONFIG_CRYPTO_BLKCIPHER=y
1024# CONFIG_CRYPTO_SEQIV is not set
1025CONFIG_CRYPTO_HASH=y
1026CONFIG_CRYPTO_MANAGER=y
1027CONFIG_CRYPTO_HMAC=y
1028# CONFIG_CRYPTO_XCBC is not set
1029# CONFIG_CRYPTO_NULL is not set
1030# CONFIG_CRYPTO_MD4 is not set
1031CONFIG_CRYPTO_MD5=y
1032CONFIG_CRYPTO_SHA1=y
1033# CONFIG_CRYPTO_SHA256 is not set
1034# CONFIG_CRYPTO_SHA512 is not set
1035# CONFIG_CRYPTO_WP512 is not set
1036# CONFIG_CRYPTO_TGR192 is not set
1037# CONFIG_CRYPTO_GF128MUL is not set
1038# CONFIG_CRYPTO_ECB is not set
1039CONFIG_CRYPTO_CBC=y
1040# CONFIG_CRYPTO_PCBC is not set
1041# CONFIG_CRYPTO_LRW is not set
1042# CONFIG_CRYPTO_XTS is not set
1043# CONFIG_CRYPTO_CTR is not set
1044# CONFIG_CRYPTO_GCM is not set
1045# CONFIG_CRYPTO_CCM is not set
1046# CONFIG_CRYPTO_CRYPTD is not set
1047CONFIG_CRYPTO_DES=y
1048# CONFIG_CRYPTO_FCRYPT is not set
1049# CONFIG_CRYPTO_BLOWFISH is not set
1050# CONFIG_CRYPTO_TWOFISH is not set
1051# CONFIG_CRYPTO_SERPENT is not set
1052# CONFIG_CRYPTO_AES is not set
1053# CONFIG_CRYPTO_CAST5 is not set
1054# CONFIG_CRYPTO_CAST6 is not set
1055# CONFIG_CRYPTO_TEA is not set
1056# CONFIG_CRYPTO_ARC4 is not set
1057# CONFIG_CRYPTO_KHAZAD is not set
1058# CONFIG_CRYPTO_ANUBIS is not set
1059# CONFIG_CRYPTO_SEED is not set
1060# CONFIG_CRYPTO_SALSA20 is not set
1061CONFIG_CRYPTO_DEFLATE=y
1062# CONFIG_CRYPTO_MICHAEL_MIC is not set
1063# CONFIG_CRYPTO_CRC32C is not set
1064# CONFIG_CRYPTO_CAMELLIA is not set
1065# CONFIG_CRYPTO_TEST is not set
1066CONFIG_CRYPTO_AUTHENC=y
1067# CONFIG_CRYPTO_LZO is not set
1068CONFIG_CRYPTO_HW=y
1069
1070#
1071# Library routines
1072#
1073CONFIG_BITREVERSE=y
1074CONFIG_CRC_CCITT=y
1075# CONFIG_CRC16 is not set
1076# CONFIG_CRC_ITU_T is not set
1077CONFIG_CRC32=y
1078# CONFIG_CRC7 is not set
1079# CONFIG_LIBCRC32C is not set
1080CONFIG_ZLIB_INFLATE=y
1081CONFIG_ZLIB_DEFLATE=y
1082CONFIG_PLIST=y
1083CONFIG_HAS_IOMEM=y
1084CONFIG_HAS_IOPORT=y
1085CONFIG_HAS_DMA=y
diff --git a/arch/sh/kernel/cf-enabler.c b/arch/sh/kernel/cf-enabler.c
index 1c3b99642e1c..01ff4d05aab0 100644
--- a/arch/sh/kernel/cf-enabler.c
+++ b/arch/sh/kernel/cf-enabler.c
@@ -83,6 +83,8 @@ static int __init cf_init_default(void)
83#include <asm/se.h> 83#include <asm/se.h>
84#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE) 84#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
85#include <asm/se7722.h> 85#include <asm/se7722.h>
86#elif defined(CONFIG_SH_7721_SOLUTION_ENGINE)
87#include <asm/se7721.h>
86#endif 88#endif
87 89
88/* 90/*
@@ -99,7 +101,9 @@ static int __init cf_init_default(void)
99 * 0xB0600000 : I/O 101 * 0xB0600000 : I/O
100 */ 102 */
101 103
102#if defined(CONFIG_SH_SOLUTION_ENGINE) || defined(CONFIG_SH_7722_SOLUTION_ENGINE) 104#if defined(CONFIG_SH_SOLUTION_ENGINE) || \
105 defined(CONFIG_SH_7722_SOLUTION_ENGINE) || \
106 defined(CONFIG_SH_7721_SOLUTION_ENGINE)
103static int __init cf_init_se(void) 107static int __init cf_init_se(void)
104{ 108{
105 if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0) 109 if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0)
@@ -112,7 +116,7 @@ static int __init cf_init_se(void)
112 } 116 }
113 117
114 /* 118 /*
115 * PC-Card window open 119 * PC-Card window open
116 * flag == COMMON/ATTRIBUTE/IO 120 * flag == COMMON/ATTRIBUTE/IO
117 */ 121 */
118 /* common window open */ 122 /* common window open */
@@ -122,7 +126,7 @@ static int __init cf_init_se(void)
122 ctrl_outw(0x0b00, MRSHPC_MW0CR2); 126 ctrl_outw(0x0b00, MRSHPC_MW0CR2);
123 else 127 else
124 /* common mode & bus width 16bit SWAP = 0*/ 128 /* common mode & bus width 16bit SWAP = 0*/
125 ctrl_outw(0x0300, MRSHPC_MW0CR2); 129 ctrl_outw(0x0300, MRSHPC_MW0CR2);
126 130
127 /* attribute window open */ 131 /* attribute window open */
128 ctrl_outw(0x8a85, MRSHPC_MW1CR1); 132 ctrl_outw(0x8a85, MRSHPC_MW1CR1);
@@ -155,10 +159,9 @@ static int __init cf_init_se(void)
155 159
156int __init cf_init(void) 160int __init cf_init(void)
157{ 161{
158 if( mach_is_se() || mach_is_7722se() ){ 162 if (mach_is_se() || mach_is_7722se() || mach_is_7721se())
159 return cf_init_se(); 163 return cf_init_se();
160 } 164
161
162 return cf_init_default(); 165 return cf_init_default();
163} 166}
164 167
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile
index b279cdc3a233..7e2b90cfa7bf 100644
--- a/arch/sh/kernel/cpu/sh2a/Makefile
+++ b/arch/sh/kernel/cpu/sh2a/Makefile
@@ -8,6 +8,7 @@ common-y += $(addprefix ../sh2/, ex.o entry.o)
8 8
9obj-$(CONFIG_SH_FPU) += fpu.o 9obj-$(CONFIG_SH_FPU) += fpu.o
10 10
11obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o 12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o
14obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 6910e2664468..6e79132f6f30 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -29,6 +29,9 @@ int __init detect_cpu_and_cache_system(void)
29 boot_cpu_data.type = CPU_SH7206; 29 boot_cpu_data.type = CPU_SH7206;
30 /* While SH7206 has a DSP.. */ 30 /* While SH7206 has a DSP.. */
31 boot_cpu_data.flags |= CPU_HAS_DSP; 31 boot_cpu_data.flags |= CPU_HAS_DSP;
32#elif defined(CONFIG_CPU_SUBTYPE_MXG)
33 boot_cpu_data.type = CPU_MXG;
34 boot_cpu_data.flags |= CPU_HAS_DSP;
32#endif 35#endif
33 36
34 boot_cpu_data.dcache.ways = 4; 37 boot_cpu_data.dcache.ways = 4;
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
new file mode 100644
index 000000000000..e611d79fac4c
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -0,0 +1,168 @@
1/*
2 * Renesas MX-G (R8A03022BG) Setup
3 *
4 * Copyright (C) 2008 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <linux/serial_sci.h>
14
15enum {
16 UNUSED = 0,
17
18 /* interrupt sources */
19 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
20 IRQ8, IRQ9, IRQ10, IRQ11, IRQ12, IRQ13, IRQ14, IRQ15,
21
22 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
23
24 SINT8, SINT7, SINT6, SINT5, SINT4, SINT3, SINT2, SINT1,
25
26 SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
27 SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
28
29 MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
30 MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
31 MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
32 MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
33 MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
34 MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
35 MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
36
37 /* interrupt groups */
38 PINT, SCIF0, SCIF1,
39 MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5
40};
41
42static struct intc_vect vectors[] __initdata = {
43 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
44 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
45 INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
46 INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
47 INTC_IRQ(IRQ8, 72), INTC_IRQ(IRQ9, 73),
48 INTC_IRQ(IRQ10, 74), INTC_IRQ(IRQ11, 75),
49 INTC_IRQ(IRQ12, 76), INTC_IRQ(IRQ13, 77),
50 INTC_IRQ(IRQ14, 78), INTC_IRQ(IRQ15, 79),
51
52 INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
53 INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
54 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
55 INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
56
57 INTC_IRQ(SINT8, 94), INTC_IRQ(SINT7, 95),
58 INTC_IRQ(SINT6, 96), INTC_IRQ(SINT5, 97),
59 INTC_IRQ(SINT4, 98), INTC_IRQ(SINT3, 99),
60 INTC_IRQ(SINT2, 100), INTC_IRQ(SINT1, 101),
61
62 INTC_IRQ(SCIF0_RXI, 220), INTC_IRQ(SCIF0_TXI, 221),
63 INTC_IRQ(SCIF0_BRI, 222), INTC_IRQ(SCIF0_ERI, 223),
64 INTC_IRQ(SCIF1_RXI, 224), INTC_IRQ(SCIF1_TXI, 225),
65 INTC_IRQ(SCIF1_BRI, 226), INTC_IRQ(SCIF1_ERI, 227),
66
67 INTC_IRQ(MTU2_TGI0A, 228), INTC_IRQ(MTU2_TGI0B, 229),
68 INTC_IRQ(MTU2_TGI0C, 230), INTC_IRQ(MTU2_TGI0D, 231),
69 INTC_IRQ(MTU2_TCI0V, 232), INTC_IRQ(MTU2_TGI0E, 233),
70
71 INTC_IRQ(MTU2_TGI0F, 234), INTC_IRQ(MTU2_TGI1A, 235),
72 INTC_IRQ(MTU2_TGI1B, 236), INTC_IRQ(MTU2_TCI1V, 237),
73 INTC_IRQ(MTU2_TCI1U, 238), INTC_IRQ(MTU2_TGI2A, 239),
74
75 INTC_IRQ(MTU2_TGI2B, 240), INTC_IRQ(MTU2_TCI2V, 241),
76 INTC_IRQ(MTU2_TCI2U, 242), INTC_IRQ(MTU2_TGI3A, 243),
77
78 INTC_IRQ(MTU2_TGI3B, 244),
79 INTC_IRQ(MTU2_TGI3C, 245),
80
81 INTC_IRQ(MTU2_TGI3D, 246), INTC_IRQ(MTU2_TCI3V, 247),
82 INTC_IRQ(MTU2_TGI4A, 248), INTC_IRQ(MTU2_TGI4B, 249),
83 INTC_IRQ(MTU2_TGI4C, 250), INTC_IRQ(MTU2_TGI4D, 251),
84
85 INTC_IRQ(MTU2_TCI4V, 252), INTC_IRQ(MTU2_TGI5U, 253),
86 INTC_IRQ(MTU2_TGI5V, 254), INTC_IRQ(MTU2_TGI5W, 255),
87};
88
89static struct intc_group groups[] __initdata = {
90 INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
91 PINT4, PINT5, PINT6, PINT7),
92 INTC_GROUP(MTU2_GROUP1, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
93 MTU2_TCI0V, MTU2_TGI0E),
94 INTC_GROUP(MTU2_GROUP2, MTU2_TGI0F, MTU2_TGI1A, MTU2_TGI1B,
95 MTU2_TCI1V, MTU2_TCI1U, MTU2_TGI2A),
96 INTC_GROUP(MTU2_GROUP3, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
97 MTU2_TGI3A),
98 INTC_GROUP(MTU2_GROUP4, MTU2_TGI3D, MTU2_TCI3V, MTU2_TGI4A,
99 MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
100 INTC_GROUP(MTU2_GROUP5, MTU2_TCI4V, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
101 INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
102 INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
103};
104
105static struct intc_prio_reg prio_registers[] __initdata = {
106 { 0xfffd9418, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
107 { 0xfffd941a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
108 { 0xfffd941c, 0, 16, 4, /* IPR03 */ { IRQ8, IRQ9, IRQ10, IRQ11 } },
109 { 0xfffd941e, 0, 16, 4, /* IPR04 */ { IRQ12, IRQ13, IRQ14, IRQ15 } },
110 { 0xfffd9420, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } },
111 { 0xfffd9800, 0, 16, 4, /* IPR06 */ { } },
112 { 0xfffd9802, 0, 16, 4, /* IPR07 */ { } },
113 { 0xfffd9804, 0, 16, 4, /* IPR08 */ { } },
114 { 0xfffd9806, 0, 16, 4, /* IPR09 */ { } },
115 { 0xfffd9808, 0, 16, 4, /* IPR10 */ { } },
116 { 0xfffd980a, 0, 16, 4, /* IPR11 */ { } },
117 { 0xfffd980c, 0, 16, 4, /* IPR12 */ { } },
118 { 0xfffd980e, 0, 16, 4, /* IPR13 */ { } },
119 { 0xfffd9810, 0, 16, 4, /* IPR14 */ { 0, 0, 0, SCIF0 } },
120 { 0xfffd9812, 0, 16, 4, /* IPR15 */
121 { SCIF1, MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3 } },
122 { 0xfffd9814, 0, 16, 4, /* IPR16 */
123 { MTU2_TGI3B, MTU2_TGI3C, MTU2_GROUP4, MTU2_GROUP5 } },
124};
125
126static struct intc_mask_reg mask_registers[] __initdata = {
127 { 0xfffd9408, 0, 16, /* PINTER */
128 { 0, 0, 0, 0, 0, 0, 0, 0,
129 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
130};
131
132static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups,
133 mask_registers, prio_registers, NULL);
134
135static struct plat_sci_port sci_platform_data[] = {
136 {
137 .mapbase = 0xff804000,
138 .flags = UPF_BOOT_AUTOCONF,
139 .type = PORT_SCIF,
140 .irqs = { 223, 220, 221, 222 },
141 }, {
142 .flags = 0,
143 }
144};
145
146static struct platform_device sci_device = {
147 .name = "sh-sci",
148 .id = -1,
149 .dev = {
150 .platform_data = sci_platform_data,
151 },
152};
153
154static struct platform_device *mxg_devices[] __initdata = {
155 &sci_device,
156};
157
158static int __init mxg_devices_setup(void)
159{
160 return platform_add_devices(mxg_devices,
161 ARRAY_SIZE(mxg_devices));
162}
163__initcall(mxg_devices_setup);
164
165void __init plat_irq_setup(void)
166{
167 register_intc_controller(&intc_desc);
168}
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 9e89984c4f1d..ebceb0dadff5 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -53,7 +53,7 @@ int __init detect_cpu_and_cache_system(void)
53 /* 53 /*
54 * Setup some generic flags we can probe on SH-4A parts 54 * Setup some generic flags we can probe on SH-4A parts
55 */ 55 */
56 if (((pvr >> 16) & 0xff) == 0x10) { 56 if (((pvr >> 24) & 0xff) == 0x10) {
57 if ((cvr & 0x10000000) == 0) 57 if ((cvr & 0x10000000) == 0)
58 boot_cpu_data.flags |= CPU_HAS_DSP; 58 boot_cpu_data.flags |= CPU_HAS_DSP;
59 59
@@ -126,17 +126,22 @@ int __init detect_cpu_and_cache_system(void)
126 CPU_HAS_LLSC; 126 CPU_HAS_LLSC;
127 break; 127 break;
128 case 0x3008: 128 case 0x3008:
129 if (prr == 0xa0 || prr == 0xa1) { 129 boot_cpu_data.icache.ways = 4;
130 boot_cpu_data.type = CPU_SH7722; 130 boot_cpu_data.dcache.ways = 4;
131 boot_cpu_data.icache.ways = 4; 131 boot_cpu_data.flags |= CPU_HAS_LLSC;
132 boot_cpu_data.dcache.ways = 4; 132
133 boot_cpu_data.flags |= CPU_HAS_LLSC; 133 switch (prr) {
134 } 134 case 0x50:
135 else if (prr == 0x70) { 135 boot_cpu_data.type = CPU_SH7723;
136 boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_L2_CACHE;
137 break;
138 case 0x70:
136 boot_cpu_data.type = CPU_SH7366; 139 boot_cpu_data.type = CPU_SH7366;
137 boot_cpu_data.icache.ways = 4; 140 break;
138 boot_cpu_data.dcache.ways = 4; 141 case 0xa0:
139 boot_cpu_data.flags |= CPU_HAS_LLSC; 142 case 0xa1:
143 boot_cpu_data.type = CPU_SH7722;
144 break;
140 } 145 }
141 break; 146 break;
142 case 0x4000: /* 1st cut */ 147 case 0x4000: /* 1st cut */
@@ -215,6 +220,12 @@ int __init detect_cpu_and_cache_system(void)
215 * SH-4A's have an optional PIPT L2. 220 * SH-4A's have an optional PIPT L2.
216 */ 221 */
217 if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) { 222 if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) {
223 /* Bug if we can't decode the L2 info */
224 BUG_ON(!(cvr & 0xf));
225
226 /* Silicon and specifications have clearly never met.. */
227 cvr ^= 0xf;
228
218 /* 229 /*
219 * Size calculation is much more sensible 230 * Size calculation is much more sensible
220 * than it is for the L1. 231 * than it is for the L1.
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 5d890ac8e793..a880e7968750 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
9obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o 9obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o 10obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
11obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7723) += setup-sh7723.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7366) += setup-sh7366.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7366) += setup-sh7366.o
13obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o 14obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o
14 15
@@ -22,6 +23,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
22clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o 23clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
23clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o 24clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
24clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o 25clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
26clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7722.o
25clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o 27clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o
26clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o 28clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o
27 29
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index b98b4bc93ec9..069314037049 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -16,13 +16,12 @@
16 16
17static struct resource usbf_resources[] = { 17static struct resource usbf_resources[] = {
18 [0] = { 18 [0] = {
19 .name = "m66592_udc", 19 .name = "USBF",
20 .start = 0xA4480000, 20 .start = 0x04480000,
21 .end = 0xA44800FF, 21 .end = 0x044800FF,
22 .flags = IORESOURCE_MEM, 22 .flags = IORESOURCE_MEM,
23 }, 23 },
24 [1] = { 24 [1] = {
25 .name = "m66592_udc",
26 .start = 65, 25 .start = 65,
27 .end = 65, 26 .end = 65,
28 .flags = IORESOURCE_IRQ, 27 .flags = IORESOURCE_IRQ,
@@ -40,6 +39,26 @@ static struct platform_device usbf_device = {
40 .resource = usbf_resources, 39 .resource = usbf_resources,
41}; 40};
42 41
42static struct resource iic_resources[] = {
43 [0] = {
44 .name = "IIC",
45 .start = 0x04470000,
46 .end = 0x04470017,
47 .flags = IORESOURCE_MEM,
48 },
49 [1] = {
50 .start = 96,
51 .end = 99,
52 .flags = IORESOURCE_IRQ,
53 },
54};
55
56static struct platform_device iic_device = {
57 .name = "i2c-sh_mobile",
58 .num_resources = ARRAY_SIZE(iic_resources),
59 .resource = iic_resources,
60};
61
43static struct plat_sci_port sci_platform_data[] = { 62static struct plat_sci_port sci_platform_data[] = {
44 { 63 {
45 .mapbase = 0xffe00000, 64 .mapbase = 0xffe00000,
@@ -74,6 +93,7 @@ static struct platform_device sci_device = {
74 93
75static struct platform_device *sh7722_devices[] __initdata = { 94static struct platform_device *sh7722_devices[] __initdata = {
76 &usbf_device, 95 &usbf_device,
96 &iic_device,
77 &sci_device, 97 &sci_device,
78}; 98};
79 99
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
new file mode 100644
index 000000000000..16925cf28db8
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -0,0 +1,300 @@
1/*
2 * SH7723 Setup
3 *
4 * Copyright (C) 2008 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <linux/mm.h>
14#include <linux/serial_sci.h>
15#include <asm/mmzone.h>
16
17static struct plat_sci_port sci_platform_data[] = {
18 {
19 .mapbase = 0xa4e30000,
20 .flags = UPF_BOOT_AUTOCONF,
21 .type = PORT_SCI,
22 .irqs = { 56, 56, 56, 56 },
23 },{
24 .mapbase = 0xa4e40000,
25 .flags = UPF_BOOT_AUTOCONF,
26 .type = PORT_SCI,
27 .irqs = { 88, 88, 88, 88 },
28 },{
29 .mapbase = 0xa4e50000,
30 .flags = UPF_BOOT_AUTOCONF,
31 .type = PORT_SCI,
32 .irqs = { 109, 109, 109, 109 },
33 }, {
34 .flags = 0,
35 }
36};
37
38static struct platform_device sci_device = {
39 .name = "sh-sci",
40 .id = -1,
41 .dev = {
42 .platform_data = sci_platform_data,
43 },
44};
45
46static struct resource rtc_resources[] = {
47 [0] = {
48 .start = 0xa465fec0,
49 .end = 0xa465fec0 + 0x58 - 1,
50 .flags = IORESOURCE_IO,
51 },
52 [1] = {
53 /* Period IRQ */
54 .start = 69,
55 .flags = IORESOURCE_IRQ,
56 },
57 [2] = {
58 /* Carry IRQ */
59 .start = 70,
60 .flags = IORESOURCE_IRQ,
61 },
62 [3] = {
63 /* Alarm IRQ */
64 .start = 68,
65 .flags = IORESOURCE_IRQ,
66 },
67};
68
69static struct platform_device rtc_device = {
70 .name = "sh-rtc",
71 .id = -1,
72 .num_resources = ARRAY_SIZE(rtc_resources),
73 .resource = rtc_resources,
74};
75
76static struct platform_device *sh7723_devices[] __initdata = {
77 &sci_device,
78 &rtc_device,
79};
80
81static int __init sh7723_devices_setup(void)
82{
83 return platform_add_devices(sh7723_devices,
84 ARRAY_SIZE(sh7723_devices));
85}
86__initcall(sh7723_devices_setup);
87
88enum {
89 UNUSED=0,
90
91 /* interrupt sources */
92 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
93 HUDI,
94 DMAC1A_DEI0,DMAC1A_DEI1,DMAC1A_DEI2,DMAC1A_DEI3,
95 _2DG_TRI,_2DG_INI,_2DG_CEI,
96 DMAC0A_DEI0,DMAC0A_DEI1,DMAC0A_DEI2,DMAC0A_DEI3,
97 VIO_CEUI,VIO_BEUI,VIO_VEU2HI,VIO_VOUI,
98 SCIFA_SCIFA0,
99 VPU_VPUI,
100 TPU_TPUI,
101 ADC_ADI,
102 USB_USI0,
103 RTC_ATI,RTC_PRI,RTC_CUI,
104 DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR,
105 DMAC0B_DEI4,DMAC0B_DEI5,DMAC0B_DADERR,
106 KEYSC_KEYI,
107 SCIF_SCIF0,SCIF_SCIF1,SCIF_SCIF2,
108 MSIOF_MSIOFI0,MSIOF_MSIOFI1,
109 SCIFA_SCIFA1,
110 FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I,
111 I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI,
112 SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2,
113 CMT_CMTI,
114 TSIF_TSIFI,
115 SIU_SIUI,
116 SCIFA_SCIFA2,
117 TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2,
118 IRDA_IRDAI,
119 ATAPI_ATAPII,
120 SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2,
121 VEU2H1_VEU2HI,
122 LCDC_LCDCI,
123 TMU1_TUNI0,TMU1_TUNI1,TMU1_TUNI2,
124
125 /* interrupt groups */
126 DMAC1A, DMAC0A, VIO, DMAC0B, FLCTL, I2C, _2DG,
127 SDHI1, RTC, DMAC1B, SDHI0,
128};
129
130static struct intc_vect vectors[] __initdata = {
131 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
132 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
133 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
134 INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0),
135
136 INTC_VECT(DMAC1A_DEI0,0x700),
137 INTC_VECT(DMAC1A_DEI1,0x720),
138 INTC_VECT(DMAC1A_DEI2,0x740),
139 INTC_VECT(DMAC1A_DEI3,0x760),
140
141 INTC_VECT(_2DG_TRI, 0x780),
142 INTC_VECT(_2DG_INI, 0x7A0),
143 INTC_VECT(_2DG_CEI, 0x7C0),
144
145 INTC_VECT(DMAC0A_DEI0,0x800),
146 INTC_VECT(DMAC0A_DEI1,0x820),
147 INTC_VECT(DMAC0A_DEI2,0x840),
148 INTC_VECT(DMAC0A_DEI3,0x860),
149
150 INTC_VECT(VIO_CEUI,0x880),
151 INTC_VECT(VIO_BEUI,0x8A0),
152 INTC_VECT(VIO_VEU2HI,0x8C0),
153 INTC_VECT(VIO_VOUI,0x8E0),
154
155 INTC_VECT(SCIFA_SCIFA0,0x900),
156 INTC_VECT(VPU_VPUI,0x920),
157 INTC_VECT(TPU_TPUI,0x9A0),
158 INTC_VECT(ADC_ADI,0x9E0),
159 INTC_VECT(USB_USI0,0xA20),
160
161 INTC_VECT(RTC_ATI,0xA80),
162 INTC_VECT(RTC_PRI,0xAA0),
163 INTC_VECT(RTC_CUI,0xAC0),
164
165 INTC_VECT(DMAC1B_DEI4,0xB00),
166 INTC_VECT(DMAC1B_DEI5,0xB20),
167 INTC_VECT(DMAC1B_DADERR,0xB40),
168
169 INTC_VECT(DMAC0B_DEI4,0xB80),
170 INTC_VECT(DMAC0B_DEI5,0xBA0),
171 INTC_VECT(DMAC0B_DADERR,0xBC0),
172
173 INTC_VECT(KEYSC_KEYI,0xBE0),
174 INTC_VECT(SCIF_SCIF0,0xC00),
175 INTC_VECT(SCIF_SCIF1,0xC20),
176 INTC_VECT(SCIF_SCIF2,0xC40),
177 INTC_VECT(MSIOF_MSIOFI0,0xC80),
178 INTC_VECT(MSIOF_MSIOFI1,0xCA0),
179 INTC_VECT(SCIFA_SCIFA1,0xD00),
180
181 INTC_VECT(FLCTL_FLSTEI,0xD80),
182 INTC_VECT(FLCTL_FLTENDI,0xDA0),
183 INTC_VECT(FLCTL_FLTREQ0I,0xDC0),
184 INTC_VECT(FLCTL_FLTREQ1I,0xDE0),
185
186 INTC_VECT(I2C_ALI,0xE00),
187 INTC_VECT(I2C_TACKI,0xE20),
188 INTC_VECT(I2C_WAITI,0xE40),
189 INTC_VECT(I2C_DTEI,0xE60),
190
191 INTC_VECT(SDHI0_SDHII0,0xE80),
192 INTC_VECT(SDHI0_SDHII1,0xEA0),
193 INTC_VECT(SDHI0_SDHII2,0xEC0),
194
195 INTC_VECT(CMT_CMTI,0xF00),
196 INTC_VECT(TSIF_TSIFI,0xF20),
197 INTC_VECT(SIU_SIUI,0xF80),
198 INTC_VECT(SCIFA_SCIFA2,0xFA0),
199
200 INTC_VECT(TMU0_TUNI0,0x400),
201 INTC_VECT(TMU0_TUNI1,0x420),
202 INTC_VECT(TMU0_TUNI2,0x440),
203
204 INTC_VECT(IRDA_IRDAI,0x480),
205 INTC_VECT(ATAPI_ATAPII,0x4A0),
206
207 INTC_VECT(SDHI1_SDHII0,0x4E0),
208 INTC_VECT(SDHI1_SDHII1,0x500),
209 INTC_VECT(SDHI1_SDHII2,0x520),
210
211 INTC_VECT(VEU2H1_VEU2HI,0x560),
212 INTC_VECT(LCDC_LCDCI,0x580),
213
214 INTC_VECT(TMU1_TUNI0,0x920),
215 INTC_VECT(TMU1_TUNI1,0x940),
216 INTC_VECT(TMU1_TUNI2,0x960),
217
218};
219
220static struct intc_group groups[] __initdata = {
221 INTC_GROUP(DMAC1A,DMAC1A_DEI0,DMAC1A_DEI1,DMAC1A_DEI2,DMAC1A_DEI3),
222 INTC_GROUP(DMAC0A,DMAC0A_DEI0,DMAC0A_DEI1,DMAC0A_DEI2,DMAC0A_DEI3),
223 INTC_GROUP(VIO, VIO_CEUI,VIO_BEUI,VIO_VEU2HI,VIO_VOUI),
224 INTC_GROUP(DMAC0B, DMAC0B_DEI4,DMAC0B_DEI5,DMAC0B_DADERR),
225 INTC_GROUP(FLCTL,FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I),
226 INTC_GROUP(I2C,I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI),
227 INTC_GROUP(_2DG, _2DG_TRI,_2DG_INI,_2DG_CEI),
228 INTC_GROUP(SDHI1, SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2),
229 INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI),
230 INTC_GROUP(DMAC1B, DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR),
231 INTC_GROUP(SDHI0,SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2),
232};
233
234static struct intc_mask_reg mask_registers[] __initdata = {
235 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
236 { 0, TMU1_TUNI2,TMU1_TUNI1,TMU1_TUNI0,0,SDHI1_SDHII2,SDHI1_SDHII1,SDHI1_SDHII0} },
237 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
238 { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } },
239 { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
240 { 0, 0, 0, VPU_VPUI,0,0,0,SCIFA_SCIFA0 } },
241 { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */
242 { DMAC1A_DEI3,DMAC1A_DEI2,DMAC1A_DEI1,DMAC1A_DEI0,0,0,0,IRDA_IRDAI } },
243 { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */
244 { 0,TMU0_TUNI2,TMU0_TUNI1,TMU0_TUNI0,VEU2H1_VEU2HI,0,0,LCDC_LCDCI } },
245 { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */
246 { KEYSC_KEYI,DMAC0B_DADERR,DMAC0B_DEI5,DMAC0B_DEI4,0,SCIF_SCIF2,SCIF_SCIF1,SCIF_SCIF0 } },
247 { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */
248 { 0,0,0,SCIFA_SCIFA1,ADC_ADI,0,MSIOF_MSIOFI1,MSIOF_MSIOFI0 } },
249 { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */
250 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
251 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
252 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
253 { 0,SDHI0_SDHII2,SDHI0_SDHII1,SDHI0_SDHII0,0,0,SCIFA_SCIFA2,SIU_SIUI } },
254 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
255 { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } },
256 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
257 { 0, DMAC1B_DADERR,DMAC1B_DEI5,DMAC1B_DEI4,0,RTC_ATI,RTC_PRI,RTC_CUI } },
258 { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */
259 { 0,_2DG_CEI,_2DG_INI,_2DG_TRI,0,TPU_TPUI,0,TSIF_TSIFI } },
260 { 0xa40800b0, 0xa40800f0, 8, /* IMR12 / IMCR12 */
261 { 0,0,0,0,0,0,0,ATAPI_ATAPII } },
262 { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */
263 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
264};
265
266static struct intc_prio_reg prio_registers[] __initdata = {
267 { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2, IRDA_IRDAI } },
268 { 0xa4080004, 0, 16, 4, /* IPRB */ { VEU2H1_VEU2HI, LCDC_LCDCI, DMAC1A, 0} },
269 { 0xa4080008, 0, 16, 4, /* IPRC */ { TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2, 0} },
270 { 0xa408000c, 0, 16, 4, /* IPRD */ { } },
271 { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0A, VIO, SCIFA_SCIFA0, VPU_VPUI } },
272 { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC_KEYI, DMAC0B, USB_USI0, CMT_CMTI } },
273 { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF_SCIF0, SCIF_SCIF1, SCIF_SCIF2,0 } },
274 { 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF_MSIOFI0,MSIOF_MSIOFI1, FLCTL, I2C } },
275 { 0xa4080020, 0, 16, 4, /* IPRI */ { SCIFA_SCIFA1,0,TSIF_TSIFI,_2DG } },
276 { 0xa4080024, 0, 16, 4, /* IPRJ */ { ADC_ADI,0,SIU_SIUI,SDHI1 } },
277 { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC,DMAC1B,0,SDHI0 } },
278 { 0xa408002c, 0, 16, 4, /* IPRL */ { SCIFA_SCIFA2,0,TPU_TPUI,ATAPI_ATAPII } },
279 { 0xa4140010, 0, 32, 4, /* INTPRI00 */
280 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
281};
282
283static struct intc_sense_reg sense_registers[] __initdata = {
284 { 0xa414001c, 16, 2, /* ICR1 */
285 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
286};
287
288static DECLARE_INTC_DESC(intc_desc, "sh7723", vectors, groups,
289 mask_registers, prio_registers, sense_registers);
290
291void __init plat_irq_setup(void)
292{
293 register_intc_controller(&intc_desc);
294}
295
296void __init plat_mem_setup(void)
297{
298 /* Register the URAM space as Node 1 */
299 setup_bootmem_node(1, 0x055f0000, 0x05610000);
300}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 07c988dc9de6..ae2b22219f02 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -231,12 +231,6 @@ static struct intc_group groups[] __initdata = {
231 INTC_GROUP(GPIO, GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3), 231 INTC_GROUP(GPIO, GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3),
232}; 232};
233 233
234static struct intc_prio priorities[] __initdata = {
235 INTC_PRIO(SCIF0, 3),
236 INTC_PRIO(SCIF1, 3),
237 INTC_PRIO(SCIF2, 3),
238};
239
240static struct intc_mask_reg mask_registers[] __initdata = { 234static struct intc_mask_reg mask_registers[] __initdata = {
241 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ 235 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */
242 { 0, 0, 0, 0, 0, 0, GPIO, 0, 236 { 0, 0, 0, 0, 0, 0, GPIO, 0,
@@ -270,11 +264,10 @@ static struct intc_prio_reg prio_registers[] __initdata = {
270 { 0xffd400b4, 0, 32, 8, /* INT2PRI13 */ { 0, 0, STIF1, STIF0 } }, 264 { 0xffd400b4, 0, 32, 8, /* INT2PRI13 */ { 0, 0, STIF1, STIF0 } },
271}; 265};
272 266
273static DECLARE_INTC_DESC(intc_desc, "sh7763", vectors, groups, priorities, 267static DECLARE_INTC_DESC(intc_desc, "sh7763", vectors, groups,
274 mask_registers, prio_registers, NULL); 268 mask_registers, prio_registers, NULL);
275 269
276/* Support for external interrupt pins in IRQ mode */ 270/* Support for external interrupt pins in IRQ mode */
277
278static struct intc_vect irq_vectors[] __initdata = { 271static struct intc_vect irq_vectors[] __initdata = {
279 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), 272 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
280 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300), 273 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
@@ -302,7 +295,6 @@ static DECLARE_INTC_DESC(intc_irq_desc, "sh7763-irq", irq_vectors,
302 irq_sense_registers); 295 irq_sense_registers);
303 296
304/* External interrupt pins in IRL mode */ 297/* External interrupt pins in IRL mode */
305
306static struct intc_vect irl_vectors[] __initdata = { 298static struct intc_vect irl_vectors[] __initdata = {
307 INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220), 299 INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220),
308 INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260), 300 INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260),
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index b9cec48b1808..b73578ee295d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SH7770 Setup 2 * SH7770 Setup
3 * 3 *
4 * Copyright (C) 2006 Paul Mundt 4 * Copyright (C) 2006 - 2008 Paul Mundt
5 * 5 *
6 * This file is subject to the terms and conditions of the GNU General Public 6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 7 * License. See the file "COPYING" in the main directory of this archive
@@ -29,6 +29,41 @@ static struct plat_sci_port sci_platform_data[] = {
29 .type = PORT_SCIF, 29 .type = PORT_SCIF,
30 .irqs = { 63, 63, 63, 63 }, 30 .irqs = { 63, 63, 63, 63 },
31 }, { 31 }, {
32 .mapbase = 0xff926000,
33 .flags = UPF_BOOT_AUTOCONF,
34 .type = PORT_SCIF,
35 .irqs = { 64, 64, 64, 64 },
36 }, {
37 .mapbase = 0xff927000,
38 .flags = UPF_BOOT_AUTOCONF,
39 .type = PORT_SCIF,
40 .irqs = { 65, 65, 65, 65 },
41 }, {
42 .mapbase = 0xff928000,
43 .flags = UPF_BOOT_AUTOCONF,
44 .type = PORT_SCIF,
45 .irqs = { 66, 66, 66, 66 },
46 }, {
47 .mapbase = 0xff929000,
48 .flags = UPF_BOOT_AUTOCONF,
49 .type = PORT_SCIF,
50 .irqs = { 67, 67, 67, 67 },
51 }, {
52 .mapbase = 0xff92a000,
53 .flags = UPF_BOOT_AUTOCONF,
54 .type = PORT_SCIF,
55 .irqs = { 68, 68, 68, 68 },
56 }, {
57 .mapbase = 0xff92b000,
58 .flags = UPF_BOOT_AUTOCONF,
59 .type = PORT_SCIF,
60 .irqs = { 69, 69, 69, 69 },
61 }, {
62 .mapbase = 0xff92c000,
63 .flags = UPF_BOOT_AUTOCONF,
64 .type = PORT_SCIF,
65 .irqs = { 70, 70, 70, 70 },
66 }, {
32 .flags = 0, 67 .flags = 0,
33 } 68 }
34}; 69};
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index ff4f54a47c07..284f66f1ebbe 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -23,6 +23,8 @@
23#include <linux/kexec.h> 23#include <linux/kexec.h>
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/smp.h> 25#include <linux/smp.h>
26#include <linux/err.h>
27#include <linux/debugfs.h>
26#include <asm/uaccess.h> 28#include <asm/uaccess.h>
27#include <asm/io.h> 29#include <asm/io.h>
28#include <asm/page.h> 30#include <asm/page.h>
@@ -333,6 +335,7 @@ static const char *cpu_name[] = {
333 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", 335 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
334 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", 336 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
335 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", 337 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
338 [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723",
336 [CPU_SH7366] = "SH7366", [CPU_SH_NONE] = "Unknown" 339 [CPU_SH7366] = "SH7366", [CPU_SH_NONE] = "Unknown"
337}; 340};
338 341
@@ -443,3 +446,15 @@ const struct seq_operations cpuinfo_op = {
443 .show = show_cpuinfo, 446 .show = show_cpuinfo,
444}; 447};
445#endif /* CONFIG_PROC_FS */ 448#endif /* CONFIG_PROC_FS */
449
450struct dentry *sh_debugfs_root;
451
452static int __init sh_debugfs_init(void)
453{
454 sh_debugfs_root = debugfs_create_dir("sh", NULL);
455 if (IS_ERR(sh_debugfs_root))
456 return PTR_ERR(sh_debugfs_root);
457
458 return 0;
459}
460arch_initcall(sh_debugfs_init);
diff --git a/arch/sh/lib/clear_page.S b/arch/sh/lib/clear_page.S
index 3539123fe517..8342bfbde64c 100644
--- a/arch/sh/lib/clear_page.S
+++ b/arch/sh/lib/clear_page.S
@@ -27,11 +27,11 @@ ENTRY(clear_page)
27 mov #0,r0 27 mov #0,r0
28 ! 28 !
291: 291:
30#if defined(CONFIG_CPU_SH3) 30#if defined(CONFIG_CPU_SH4)
31 mov.l r0,@r4
32#elif defined(CONFIG_CPU_SH4)
33 movca.l r0,@r4 31 movca.l r0,@r4
34 mov r4,r1 32 mov r4,r1
33#else
34 mov.l r0,@r4
35#endif 35#endif
36 add #32,r4 36 add #32,r4
37 mov.l r0,@-r4 37 mov.l r0,@-r4
diff --git a/arch/sh/lib/copy_page.S b/arch/sh/lib/copy_page.S
index e002b91c8752..5d12e657be34 100644
--- a/arch/sh/lib/copy_page.S
+++ b/arch/sh/lib/copy_page.S
@@ -41,11 +41,11 @@ ENTRY(copy_page)
41 mov.l @r11+,r5 41 mov.l @r11+,r5
42 mov.l @r11+,r6 42 mov.l @r11+,r6
43 mov.l @r11+,r7 43 mov.l @r11+,r7
44#if defined(CONFIG_CPU_SH3) 44#if defined(CONFIG_CPU_SH4)
45 mov.l r0,@r10
46#elif defined(CONFIG_CPU_SH4)
47 movca.l r0,@r10 45 movca.l r0,@r10
48 mov r10,r0 46 mov r10,r0
47#else
48 mov.l r0,@r10
49#endif 49#endif
50 add #32,r10 50 add #32,r10
51 mov.l r7,@-r10 51 mov.l r7,@-r10
diff --git a/arch/sh/mm/cache-debugfs.c b/arch/sh/mm/cache-debugfs.c
index db6d950b6f5e..c5b56d52b7d2 100644
--- a/arch/sh/mm/cache-debugfs.c
+++ b/arch/sh/mm/cache-debugfs.c
@@ -127,13 +127,13 @@ static int __init cache_debugfs_init(void)
127{ 127{
128 struct dentry *dcache_dentry, *icache_dentry; 128 struct dentry *dcache_dentry, *icache_dentry;
129 129
130 dcache_dentry = debugfs_create_file("dcache", S_IRUSR, NULL, 130 dcache_dentry = debugfs_create_file("dcache", S_IRUSR, sh_debugfs_root,
131 (unsigned int *)CACHE_TYPE_DCACHE, 131 (unsigned int *)CACHE_TYPE_DCACHE,
132 &cache_debugfs_fops); 132 &cache_debugfs_fops);
133 if (IS_ERR(dcache_dentry)) 133 if (IS_ERR(dcache_dentry))
134 return PTR_ERR(dcache_dentry); 134 return PTR_ERR(dcache_dentry);
135 135
136 icache_dentry = debugfs_create_file("icache", S_IRUSR, NULL, 136 icache_dentry = debugfs_create_file("icache", S_IRUSR, sh_debugfs_root,
137 (unsigned int *)CACHE_TYPE_ICACHE, 137 (unsigned int *)CACHE_TYPE_ICACHE,
138 &cache_debugfs_fops); 138 &cache_debugfs_fops);
139 if (IS_ERR(icache_dentry)) { 139 if (IS_ERR(icache_dentry)) {
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index ab81c602295f..0b0ec6e04753 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -393,7 +393,7 @@ static int __init pmb_debugfs_init(void)
393 struct dentry *dentry; 393 struct dentry *dentry;
394 394
395 dentry = debugfs_create_file("pmb", S_IFREG | S_IRUGO, 395 dentry = debugfs_create_file("pmb", S_IFREG | S_IRUGO,
396 NULL, NULL, &pmb_debugfs_fops); 396 sh_debugfs_root, NULL, &pmb_debugfs_fops);
397 if (IS_ERR(dentry)) 397 if (IS_ERR(dentry))
398 return PTR_ERR(dentry); 398 return PTR_ERR(dentry);
399 399
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index d63b93da952d..987c6682bf99 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -21,8 +21,9 @@ HD64465 HD64465
217206SE SH_7206_SOLUTION_ENGINE 217206SE SH_7206_SOLUTION_ENGINE
227343SE SH_7343_SOLUTION_ENGINE 227343SE SH_7343_SOLUTION_ENGINE
237619SE SH_7619_SOLUTION_ENGINE 237619SE SH_7619_SOLUTION_ENGINE
247722SE SH_7722_SOLUTION_ENGINE 247721SE SH_7721_SOLUTION_ENGINE
257751SE SH_7751_SOLUTION_ENGINE 257722SE SH_7722_SOLUTION_ENGINE
267751SE SH_7751_SOLUTION_ENGINE
267780SE SH_7780_SOLUTION_ENGINE 277780SE SH_7780_SOLUTION_ENGINE
277751SYSTEMH SH_7751_SYSTEMH 287751SYSTEMH SH_7751_SYSTEMH
28HP6XX SH_HP6XX 29HP6XX SH_HP6XX
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 8ea709be3306..efd70a974591 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -314,4 +314,13 @@ config KEYBOARD_BFIN
314 To compile this driver as a module, choose M here: the 314 To compile this driver as a module, choose M here: the
315 module will be called bf54x-keys. 315 module will be called bf54x-keys.
316 316
317config KEYBOARD_SH_KEYSC
318 tristate "SuperH KEYSC keypad support"
319 depends on SUPERH
320 help
321 Say Y here if you want to use a keypad attached to the KEYSC block
322 on SuperH processors such as sh7722 and sh7343.
323
324 To compile this driver as a module, choose M here: the
325 module will be called sh_keysc.
317endif 326endif
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index e741f4031012..0edc8f285d1c 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -26,3 +26,4 @@ obj-$(CONFIG_KEYBOARD_HP6XX) += jornada680_kbd.o
26obj-$(CONFIG_KEYBOARD_HP7XX) += jornada720_kbd.o 26obj-$(CONFIG_KEYBOARD_HP7XX) += jornada720_kbd.o
27obj-$(CONFIG_KEYBOARD_MAPLE) += maple_keyb.o 27obj-$(CONFIG_KEYBOARD_MAPLE) += maple_keyb.o
28obj-$(CONFIG_KEYBOARD_BFIN) += bf54x-keys.o 28obj-$(CONFIG_KEYBOARD_BFIN) += bf54x-keys.o
29obj-$(CONFIG_KEYBOARD_SH_KEYSC) += sh_keysc.o
diff --git a/drivers/input/keyboard/sh_keysc.c b/drivers/input/keyboard/sh_keysc.c
new file mode 100644
index 000000000000..8486abc457ed
--- /dev/null
+++ b/drivers/input/keyboard/sh_keysc.c
@@ -0,0 +1,280 @@
1/*
2 * SuperH KEYSC Keypad Driver
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * Based on gpio_keys.c, Copyright 2005 Phil Blundell
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/delay.h>
19#include <linux/platform_device.h>
20#include <linux/input.h>
21#include <linux/io.h>
22#include <asm/sh_keysc.h>
23
24#define KYCR1_OFFS 0x00
25#define KYCR2_OFFS 0x04
26#define KYINDR_OFFS 0x08
27#define KYOUTDR_OFFS 0x0c
28
29#define KYCR2_IRQ_LEVEL 0x10
30#define KYCR2_IRQ_DISABLED 0x00
31
32static const struct {
33 unsigned char kymd, keyout, keyin;
34} sh_keysc_mode[] = {
35 [SH_KEYSC_MODE_1] = { 0, 6, 5 },
36 [SH_KEYSC_MODE_2] = { 1, 5, 6 },
37 [SH_KEYSC_MODE_3] = { 2, 4, 7 },
38};
39
40struct sh_keysc_priv {
41 void __iomem *iomem_base;
42 unsigned long last_keys;
43 struct input_dev *input;
44 struct sh_keysc_info pdata;
45};
46
47static irqreturn_t sh_keysc_isr(int irq, void *dev_id)
48{
49 struct platform_device *pdev = dev_id;
50 struct sh_keysc_priv *priv = platform_get_drvdata(pdev);
51 struct sh_keysc_info *pdata = &priv->pdata;
52 unsigned long keys, keys1, keys0, mask;
53 unsigned char keyin_set, tmp;
54 int i, k;
55
56 dev_dbg(&pdev->dev, "isr!\n");
57
58 keys1 = ~0;
59 keys0 = 0;
60
61 do {
62 keys = 0;
63 keyin_set = 0;
64
65 iowrite16(KYCR2_IRQ_DISABLED, priv->iomem_base + KYCR2_OFFS);
66
67 for (i = 0; i < sh_keysc_mode[pdata->mode].keyout; i++) {
68 iowrite16(0xfff ^ (3 << (i * 2)),
69 priv->iomem_base + KYOUTDR_OFFS);
70 udelay(pdata->delay);
71 tmp = ioread16(priv->iomem_base + KYINDR_OFFS);
72 keys |= tmp << (sh_keysc_mode[pdata->mode].keyin * i);
73 tmp ^= (1 << sh_keysc_mode[pdata->mode].keyin) - 1;
74 keyin_set |= tmp;
75 }
76
77 iowrite16(0, priv->iomem_base + KYOUTDR_OFFS);
78 iowrite16(KYCR2_IRQ_LEVEL | (keyin_set << 8),
79 priv->iomem_base + KYCR2_OFFS);
80
81 keys ^= ~0;
82 keys &= (1 << (sh_keysc_mode[pdata->mode].keyin *
83 sh_keysc_mode[pdata->mode].keyout)) - 1;
84 keys1 &= keys;
85 keys0 |= keys;
86
87 dev_dbg(&pdev->dev, "keys 0x%08lx\n", keys);
88
89 } while (ioread16(priv->iomem_base + KYCR2_OFFS) & 0x01);
90
91 dev_dbg(&pdev->dev, "last_keys 0x%08lx keys0 0x%08lx keys1 0x%08lx\n",
92 priv->last_keys, keys0, keys1);
93
94 for (i = 0; i < SH_KEYSC_MAXKEYS; i++) {
95 k = pdata->keycodes[i];
96 if (!k)
97 continue;
98
99 mask = 1 << i;
100
101 if (!((priv->last_keys ^ keys0) & mask))
102 continue;
103
104 if ((keys1 | keys0) & mask) {
105 input_event(priv->input, EV_KEY, k, 1);
106 priv->last_keys |= mask;
107 }
108
109 if (!(keys1 & mask)) {
110 input_event(priv->input, EV_KEY, k, 0);
111 priv->last_keys &= ~mask;
112 }
113
114 }
115 input_sync(priv->input);
116
117 return IRQ_HANDLED;
118}
119
120#define res_size(res) ((res)->end - (res)->start + 1)
121
122static int __devinit sh_keysc_probe(struct platform_device *pdev)
123{
124 struct sh_keysc_priv *priv;
125 struct sh_keysc_info *pdata;
126 struct resource *res;
127 struct input_dev *input;
128 int i, k;
129 int irq, error;
130
131 if (!pdev->dev.platform_data) {
132 dev_err(&pdev->dev, "no platform data defined\n");
133 error = -EINVAL;
134 goto err0;
135 }
136
137 error = -ENXIO;
138 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
139 if (res == NULL) {
140 dev_err(&pdev->dev, "failed to get I/O memory\n");
141 goto err0;
142 }
143
144 irq = platform_get_irq(pdev, 0);
145 if (irq < 0) {
146 dev_err(&pdev->dev, "failed to get irq\n");
147 goto err0;
148 }
149
150 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
151 if (priv == NULL) {
152 dev_err(&pdev->dev, "failed to allocate driver data\n");
153 error = -ENOMEM;
154 goto err0;
155 }
156
157 platform_set_drvdata(pdev, priv);
158 memcpy(&priv->pdata, pdev->dev.platform_data, sizeof(priv->pdata));
159 pdata = &priv->pdata;
160
161 res = request_mem_region(res->start, res_size(res), pdev->name);
162 if (res == NULL) {
163 dev_err(&pdev->dev, "failed to request I/O memory\n");
164 error = -EBUSY;
165 goto err1;
166 }
167
168 priv->iomem_base = ioremap_nocache(res->start, res_size(res));
169 if (priv->iomem_base == NULL) {
170 dev_err(&pdev->dev, "failed to remap I/O memory\n");
171 error = -ENXIO;
172 goto err2;
173 }
174
175 priv->input = input_allocate_device();
176 if (!priv->input) {
177 dev_err(&pdev->dev, "failed to allocate input device\n");
178 error = -ENOMEM;
179 goto err3;
180 }
181
182 input = priv->input;
183 input->evbit[0] = BIT_MASK(EV_KEY);
184
185 input->name = pdev->name;
186 input->phys = "sh-keysc-keys/input0";
187 input->dev.parent = &pdev->dev;
188
189 input->id.bustype = BUS_HOST;
190 input->id.vendor = 0x0001;
191 input->id.product = 0x0001;
192 input->id.version = 0x0100;
193
194 error = request_irq(irq, sh_keysc_isr, 0, pdev->name, pdev);
195 if (error) {
196 dev_err(&pdev->dev, "failed to request IRQ\n");
197 goto err4;
198 }
199
200 for (i = 0; i < SH_KEYSC_MAXKEYS; i++) {
201 k = pdata->keycodes[i];
202 if (k)
203 input_set_capability(input, EV_KEY, k);
204 }
205
206 error = input_register_device(input);
207 if (error) {
208 dev_err(&pdev->dev, "failed to register input device\n");
209 goto err5;
210 }
211
212 iowrite16((sh_keysc_mode[pdata->mode].kymd << 8) |
213 pdata->scan_timing, priv->iomem_base + KYCR1_OFFS);
214 iowrite16(0, priv->iomem_base + KYOUTDR_OFFS);
215 iowrite16(KYCR2_IRQ_LEVEL, priv->iomem_base + KYCR2_OFFS);
216 return 0;
217 err5:
218 free_irq(irq, pdev);
219 err4:
220 input_free_device(input);
221 err3:
222 iounmap(priv->iomem_base);
223 err2:
224 release_mem_region(res->start, res_size(res));
225 err1:
226 platform_set_drvdata(pdev, NULL);
227 kfree(priv);
228 err0:
229 return error;
230}
231
232static int __devexit sh_keysc_remove(struct platform_device *pdev)
233{
234 struct sh_keysc_priv *priv = platform_get_drvdata(pdev);
235 struct resource *res;
236
237 iowrite16(KYCR2_IRQ_DISABLED, priv->iomem_base + KYCR2_OFFS);
238
239 input_unregister_device(priv->input);
240 free_irq(platform_get_irq(pdev, 0), pdev);
241 iounmap(priv->iomem_base);
242
243 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
244 release_mem_region(res->start, res_size(res));
245
246 platform_set_drvdata(pdev, NULL);
247 kfree(priv);
248 return 0;
249}
250
251
252#define sh_keysc_suspend NULL
253#define sh_keysc_resume NULL
254
255struct platform_driver sh_keysc_device_driver = {
256 .probe = sh_keysc_probe,
257 .remove = __devexit_p(sh_keysc_remove),
258 .suspend = sh_keysc_suspend,
259 .resume = sh_keysc_resume,
260 .driver = {
261 .name = "sh_keysc",
262 }
263};
264
265static int __init sh_keysc_init(void)
266{
267 return platform_driver_register(&sh_keysc_device_driver);
268}
269
270static void __exit sh_keysc_exit(void)
271{
272 platform_driver_unregister(&sh_keysc_device_driver);
273}
274
275module_init(sh_keysc_init);
276module_exit(sh_keysc_exit);
277
278MODULE_AUTHOR("Magnus Damm");
279MODULE_DESCRIPTION("SuperH KEYSC Keypad Driver");
280MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c
index 9e9caa5d7f5f..c594b34c6767 100644
--- a/drivers/rtc/rtc-sh.c
+++ b/drivers/rtc/rtc-sh.c
@@ -1,8 +1,9 @@
1/* 1/*
2 * SuperH On-Chip RTC Support 2 * SuperH On-Chip RTC Support
3 * 3 *
4 * Copyright (C) 2006, 2007 Paul Mundt 4 * Copyright (C) 2006, 2007, 2008 Paul Mundt
5 * Copyright (C) 2006 Jamie Lenehan 5 * Copyright (C) 2006 Jamie Lenehan
6 * Copyright (C) 2008 Angelo Castello
6 * 7 *
7 * Based on the old arch/sh/kernel/cpu/rtc.c by: 8 * Based on the old arch/sh/kernel/cpu/rtc.c by:
8 * 9 *
@@ -26,7 +27,7 @@
26#include <asm/rtc.h> 27#include <asm/rtc.h>
27 28
28#define DRV_NAME "sh-rtc" 29#define DRV_NAME "sh-rtc"
29#define DRV_VERSION "0.1.6" 30#define DRV_VERSION "0.2.0"
30 31
31#define RTC_REG(r) ((r) * rtc_reg_size) 32#define RTC_REG(r) ((r) * rtc_reg_size)
32 33
@@ -63,6 +64,13 @@
63/* ALARM Bits - or with BCD encoded value */ 64/* ALARM Bits - or with BCD encoded value */
64#define AR_ENB 0x80 /* Enable for alarm cmp */ 65#define AR_ENB 0x80 /* Enable for alarm cmp */
65 66
67/* Period Bits */
68#define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
69#define PF_COUNT 0x200 /* Half periodic counter */
70#define PF_OXS 0x400 /* Periodic One x Second */
71#define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
72#define PF_MASK 0xf00
73
66/* RCR1 Bits */ 74/* RCR1 Bits */
67#define RCR1_CF 0x80 /* Carry Flag */ 75#define RCR1_CF 0x80 /* Carry Flag */
68#define RCR1_CIE 0x10 /* Carry Interrupt Enable */ 76#define RCR1_CIE 0x10 /* Carry Interrupt Enable */
@@ -84,33 +92,24 @@ struct sh_rtc {
84 unsigned int alarm_irq, periodic_irq, carry_irq; 92 unsigned int alarm_irq, periodic_irq, carry_irq;
85 struct rtc_device *rtc_dev; 93 struct rtc_device *rtc_dev;
86 spinlock_t lock; 94 spinlock_t lock;
87 int rearm_aie;
88 unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */ 95 unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */
96 unsigned short periodic_freq;
89}; 97};
90 98
91static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id) 99static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
92{ 100{
93 struct platform_device *pdev = to_platform_device(dev_id); 101 struct sh_rtc *rtc = dev_id;
94 struct sh_rtc *rtc = platform_get_drvdata(pdev); 102 unsigned int tmp;
95 unsigned int tmp, events = 0;
96 103
97 spin_lock(&rtc->lock); 104 spin_lock(&rtc->lock);
98 105
99 tmp = readb(rtc->regbase + RCR1); 106 tmp = readb(rtc->regbase + RCR1);
100 tmp &= ~RCR1_CF; 107 tmp &= ~RCR1_CF;
101
102 if (rtc->rearm_aie) {
103 if (tmp & RCR1_AF)
104 tmp &= ~RCR1_AF; /* try to clear AF again */
105 else {
106 tmp |= RCR1_AIE; /* AF has cleared, rearm IRQ */
107 rtc->rearm_aie = 0;
108 }
109 }
110
111 writeb(tmp, rtc->regbase + RCR1); 108 writeb(tmp, rtc->regbase + RCR1);
112 109
113 rtc_update_irq(rtc->rtc_dev, 1, events); 110 /* Users have requested One x Second IRQ */
111 if (rtc->periodic_freq & PF_OXS)
112 rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
114 113
115 spin_unlock(&rtc->lock); 114 spin_unlock(&rtc->lock);
116 115
@@ -119,47 +118,48 @@ static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
119 118
120static irqreturn_t sh_rtc_alarm(int irq, void *dev_id) 119static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
121{ 120{
122 struct platform_device *pdev = to_platform_device(dev_id); 121 struct sh_rtc *rtc = dev_id;
123 struct sh_rtc *rtc = platform_get_drvdata(pdev); 122 unsigned int tmp;
124 unsigned int tmp, events = 0;
125 123
126 spin_lock(&rtc->lock); 124 spin_lock(&rtc->lock);
127 125
128 tmp = readb(rtc->regbase + RCR1); 126 tmp = readb(rtc->regbase + RCR1);
129 127 tmp &= ~(RCR1_AF | RCR1_AIE);
130 /*
131 * If AF is set then the alarm has triggered. If we clear AF while
132 * the alarm time still matches the RTC time then AF will
133 * immediately be set again, and if AIE is enabled then the alarm
134 * interrupt will immediately be retrigger. So we clear AIE here
135 * and use rtc->rearm_aie so that the carry interrupt will keep
136 * trying to clear AF and once it stays cleared it'll re-enable
137 * AIE.
138 */
139 if (tmp & RCR1_AF) {
140 events |= RTC_AF | RTC_IRQF;
141
142 tmp &= ~(RCR1_AF|RCR1_AIE);
143
144 writeb(tmp, rtc->regbase + RCR1); 128 writeb(tmp, rtc->regbase + RCR1);
145 129
146 rtc->rearm_aie = 1; 130 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
147
148 rtc_update_irq(rtc->rtc_dev, 1, events);
149 }
150 131
151 spin_unlock(&rtc->lock); 132 spin_unlock(&rtc->lock);
133
152 return IRQ_HANDLED; 134 return IRQ_HANDLED;
153} 135}
154 136
155static irqreturn_t sh_rtc_periodic(int irq, void *dev_id) 137static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
156{ 138{
157 struct platform_device *pdev = to_platform_device(dev_id); 139 struct sh_rtc *rtc = dev_id;
158 struct sh_rtc *rtc = platform_get_drvdata(pdev); 140 struct rtc_device *rtc_dev = rtc->rtc_dev;
141 unsigned int tmp;
159 142
160 spin_lock(&rtc->lock); 143 spin_lock(&rtc->lock);
161 144
162 rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF); 145 tmp = readb(rtc->regbase + RCR2);
146 tmp &= ~RCR2_PEF;
147 writeb(tmp, rtc->regbase + RCR2);
148
149 /* Half period enabled than one skipped and the next notified */
150 if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
151 rtc->periodic_freq &= ~PF_COUNT;
152 else {
153 if (rtc->periodic_freq & PF_HP)
154 rtc->periodic_freq |= PF_COUNT;
155 if (rtc->periodic_freq & PF_KOU) {
156 spin_lock(&rtc_dev->irq_task_lock);
157 if (rtc_dev->irq_task)
158 rtc_dev->irq_task->func(rtc_dev->irq_task->private_data);
159 spin_unlock(&rtc_dev->irq_task_lock);
160 } else
161 rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
162 }
163 163
164 spin_unlock(&rtc->lock); 164 spin_unlock(&rtc->lock);
165 165
@@ -176,8 +176,8 @@ static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
176 tmp = readb(rtc->regbase + RCR2); 176 tmp = readb(rtc->regbase + RCR2);
177 177
178 if (enable) { 178 if (enable) {
179 tmp &= ~RCR2_PESMASK; 179 tmp &= ~RCR2_PEF; /* Clear PES bit */
180 tmp |= RCR2_PEF | (2 << 4); 180 tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
181 } else 181 } else
182 tmp &= ~(RCR2_PESMASK | RCR2_PEF); 182 tmp &= ~(RCR2_PESMASK | RCR2_PEF);
183 183
@@ -186,82 +186,81 @@ static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
186 spin_unlock_irq(&rtc->lock); 186 spin_unlock_irq(&rtc->lock);
187} 187}
188 188
189static inline void sh_rtc_setaie(struct device *dev, unsigned int enable) 189static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq)
190{ 190{
191 struct sh_rtc *rtc = dev_get_drvdata(dev); 191 struct sh_rtc *rtc = dev_get_drvdata(dev);
192 unsigned int tmp; 192 int tmp, ret = 0;
193 193
194 spin_lock_irq(&rtc->lock); 194 spin_lock_irq(&rtc->lock);
195 tmp = rtc->periodic_freq & PF_MASK;
195 196
196 tmp = readb(rtc->regbase + RCR1); 197 switch (freq) {
197 198 case 0:
198 if (!enable) { 199 rtc->periodic_freq = 0x00;
199 tmp &= ~RCR1_AIE; 200 break;
200 rtc->rearm_aie = 0; 201 case 1:
201 } else if (rtc->rearm_aie == 0) 202 rtc->periodic_freq = 0x60;
202 tmp |= RCR1_AIE; 203 break;
204 case 2:
205 rtc->periodic_freq = 0x50;
206 break;
207 case 4:
208 rtc->periodic_freq = 0x40;
209 break;
210 case 8:
211 rtc->periodic_freq = 0x30 | PF_HP;
212 break;
213 case 16:
214 rtc->periodic_freq = 0x30;
215 break;
216 case 32:
217 rtc->periodic_freq = 0x20 | PF_HP;
218 break;
219 case 64:
220 rtc->periodic_freq = 0x20;
221 break;
222 case 128:
223 rtc->periodic_freq = 0x10 | PF_HP;
224 break;
225 case 256:
226 rtc->periodic_freq = 0x10;
227 break;
228 default:
229 ret = -ENOTSUPP;
230 }
203 231
204 writeb(tmp, rtc->regbase + RCR1); 232 if (ret == 0) {
233 rtc->periodic_freq |= tmp;
234 rtc->rtc_dev->irq_freq = freq;
235 }
205 236
206 spin_unlock_irq(&rtc->lock); 237 spin_unlock_irq(&rtc->lock);
238 return ret;
207} 239}
208 240
209static int sh_rtc_open(struct device *dev) 241static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
210{ 242{
211 struct sh_rtc *rtc = dev_get_drvdata(dev); 243 struct sh_rtc *rtc = dev_get_drvdata(dev);
212 unsigned int tmp; 244 unsigned int tmp;
213 int ret;
214
215 tmp = readb(rtc->regbase + RCR1);
216 tmp &= ~RCR1_CF;
217 tmp |= RCR1_CIE;
218 writeb(tmp, rtc->regbase + RCR1);
219 245
220 ret = request_irq(rtc->periodic_irq, sh_rtc_periodic, IRQF_DISABLED, 246 spin_lock_irq(&rtc->lock);
221 "sh-rtc period", dev);
222 if (unlikely(ret)) {
223 dev_err(dev, "request period IRQ failed with %d, IRQ %d\n",
224 ret, rtc->periodic_irq);
225 return ret;
226 }
227
228 ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED,
229 "sh-rtc carry", dev);
230 if (unlikely(ret)) {
231 dev_err(dev, "request carry IRQ failed with %d, IRQ %d\n",
232 ret, rtc->carry_irq);
233 free_irq(rtc->periodic_irq, dev);
234 goto err_bad_carry;
235 }
236 247
237 ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED, 248 tmp = readb(rtc->regbase + RCR1);
238 "sh-rtc alarm", dev);
239 if (unlikely(ret)) {
240 dev_err(dev, "request alarm IRQ failed with %d, IRQ %d\n",
241 ret, rtc->alarm_irq);
242 goto err_bad_alarm;
243 }
244 249
245 return 0; 250 if (!enable)
251 tmp &= ~RCR1_AIE;
252 else
253 tmp |= RCR1_AIE;
246 254
247err_bad_alarm: 255 writeb(tmp, rtc->regbase + RCR1);
248 free_irq(rtc->carry_irq, dev);
249err_bad_carry:
250 free_irq(rtc->periodic_irq, dev);
251 256
252 return ret; 257 spin_unlock_irq(&rtc->lock);
253} 258}
254 259
255static void sh_rtc_release(struct device *dev) 260static void sh_rtc_release(struct device *dev)
256{ 261{
257 struct sh_rtc *rtc = dev_get_drvdata(dev);
258
259 sh_rtc_setpie(dev, 0); 262 sh_rtc_setpie(dev, 0);
260 sh_rtc_setaie(dev, 0); 263 sh_rtc_setaie(dev, 0);
261
262 free_irq(rtc->periodic_irq, dev);
263 free_irq(rtc->carry_irq, dev);
264 free_irq(rtc->alarm_irq, dev);
265} 264}
266 265
267static int sh_rtc_proc(struct device *dev, struct seq_file *seq) 266static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
@@ -270,31 +269,44 @@ static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
270 unsigned int tmp; 269 unsigned int tmp;
271 270
272 tmp = readb(rtc->regbase + RCR1); 271 tmp = readb(rtc->regbase + RCR1);
273 seq_printf(seq, "carry_IRQ\t: %s\n", 272 seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
274 (tmp & RCR1_CIE) ? "yes" : "no");
275 273
276 tmp = readb(rtc->regbase + RCR2); 274 tmp = readb(rtc->regbase + RCR2);
277 seq_printf(seq, "periodic_IRQ\t: %s\n", 275 seq_printf(seq, "periodic_IRQ\t: %s\n",
278 (tmp & RCR2_PEF) ? "yes" : "no"); 276 (tmp & RCR2_PESMASK) ? "yes" : "no");
279 277
280 return 0; 278 return 0;
281} 279}
282 280
283static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 281static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
284{ 282{
285 unsigned int ret = -ENOIOCTLCMD; 283 struct sh_rtc *rtc = dev_get_drvdata(dev);
284 unsigned int ret = 0;
286 285
287 switch (cmd) { 286 switch (cmd) {
288 case RTC_PIE_OFF: 287 case RTC_PIE_OFF:
289 case RTC_PIE_ON: 288 case RTC_PIE_ON:
290 sh_rtc_setpie(dev, cmd == RTC_PIE_ON); 289 sh_rtc_setpie(dev, cmd == RTC_PIE_ON);
291 ret = 0;
292 break; 290 break;
293 case RTC_AIE_OFF: 291 case RTC_AIE_OFF:
294 case RTC_AIE_ON: 292 case RTC_AIE_ON:
295 sh_rtc_setaie(dev, cmd == RTC_AIE_ON); 293 sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
296 ret = 0;
297 break; 294 break;
295 case RTC_UIE_OFF:
296 rtc->periodic_freq &= ~PF_OXS;
297 break;
298 case RTC_UIE_ON:
299 rtc->periodic_freq |= PF_OXS;
300 break;
301 case RTC_IRQP_READ:
302 ret = put_user(rtc->rtc_dev->irq_freq,
303 (unsigned long __user *)arg);
304 break;
305 case RTC_IRQP_SET:
306 ret = sh_rtc_setfreq(dev, arg);
307 break;
308 default:
309 ret = -ENOIOCTLCMD;
298 } 310 }
299 311
300 return ret; 312 return ret;
@@ -421,7 +433,7 @@ static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
421{ 433{
422 struct platform_device *pdev = to_platform_device(dev); 434 struct platform_device *pdev = to_platform_device(dev);
423 struct sh_rtc *rtc = platform_get_drvdata(pdev); 435 struct sh_rtc *rtc = platform_get_drvdata(pdev);
424 struct rtc_time* tm = &wkalrm->time; 436 struct rtc_time *tm = &wkalrm->time;
425 437
426 spin_lock_irq(&rtc->lock); 438 spin_lock_irq(&rtc->lock);
427 439
@@ -452,7 +464,7 @@ static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
452 writeb(BIN2BCD(value) | AR_ENB, rtc->regbase + reg_off); 464 writeb(BIN2BCD(value) | AR_ENB, rtc->regbase + reg_off);
453} 465}
454 466
455static int sh_rtc_check_alarm(struct rtc_time* tm) 467static int sh_rtc_check_alarm(struct rtc_time *tm)
456{ 468{
457 /* 469 /*
458 * The original rtc says anything > 0xc0 is "don't care" or "match 470 * The original rtc says anything > 0xc0 is "don't care" or "match
@@ -503,11 +515,9 @@ static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
503 515
504 /* disable alarm interrupt and clear the alarm flag */ 516 /* disable alarm interrupt and clear the alarm flag */
505 rcr1 = readb(rtc->regbase + RCR1); 517 rcr1 = readb(rtc->regbase + RCR1);
506 rcr1 &= ~(RCR1_AF|RCR1_AIE); 518 rcr1 &= ~(RCR1_AF | RCR1_AIE);
507 writeb(rcr1, rtc->regbase + RCR1); 519 writeb(rcr1, rtc->regbase + RCR1);
508 520
509 rtc->rearm_aie = 0;
510
511 /* set alarm time */ 521 /* set alarm time */
512 sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR); 522 sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
513 sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR); 523 sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
@@ -529,14 +539,34 @@ static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
529 return 0; 539 return 0;
530} 540}
531 541
542static int sh_rtc_irq_set_state(struct device *dev, int enabled)
543{
544 struct platform_device *pdev = to_platform_device(dev);
545 struct sh_rtc *rtc = platform_get_drvdata(pdev);
546
547 if (enabled) {
548 rtc->periodic_freq |= PF_KOU;
549 return sh_rtc_ioctl(dev, RTC_PIE_ON, 0);
550 } else {
551 rtc->periodic_freq &= ~PF_KOU;
552 return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0);
553 }
554}
555
556static int sh_rtc_irq_set_freq(struct device *dev, int freq)
557{
558 return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq);
559}
560
532static struct rtc_class_ops sh_rtc_ops = { 561static struct rtc_class_ops sh_rtc_ops = {
533 .open = sh_rtc_open,
534 .release = sh_rtc_release, 562 .release = sh_rtc_release,
535 .ioctl = sh_rtc_ioctl, 563 .ioctl = sh_rtc_ioctl,
536 .read_time = sh_rtc_read_time, 564 .read_time = sh_rtc_read_time,
537 .set_time = sh_rtc_set_time, 565 .set_time = sh_rtc_set_time,
538 .read_alarm = sh_rtc_read_alarm, 566 .read_alarm = sh_rtc_read_alarm,
539 .set_alarm = sh_rtc_set_alarm, 567 .set_alarm = sh_rtc_set_alarm,
568 .irq_set_state = sh_rtc_irq_set_state,
569 .irq_set_freq = sh_rtc_irq_set_freq,
540 .proc = sh_rtc_proc, 570 .proc = sh_rtc_proc,
541}; 571};
542 572
@@ -544,6 +574,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
544{ 574{
545 struct sh_rtc *rtc; 575 struct sh_rtc *rtc;
546 struct resource *res; 576 struct resource *res;
577 unsigned int tmp;
547 int ret = -ENOENT; 578 int ret = -ENOENT;
548 579
549 rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL); 580 rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
@@ -552,6 +583,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
552 583
553 spin_lock_init(&rtc->lock); 584 spin_lock_init(&rtc->lock);
554 585
586 /* get periodic/carry/alarm irqs */
555 rtc->periodic_irq = platform_get_irq(pdev, 0); 587 rtc->periodic_irq = platform_get_irq(pdev, 0);
556 if (unlikely(rtc->periodic_irq < 0)) { 588 if (unlikely(rtc->periodic_irq < 0)) {
557 dev_err(&pdev->dev, "No IRQ for period\n"); 589 dev_err(&pdev->dev, "No IRQ for period\n");
@@ -608,8 +640,48 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
608 rtc->capabilities |= pinfo->capabilities; 640 rtc->capabilities |= pinfo->capabilities;
609 } 641 }
610 642
643 rtc->rtc_dev->max_user_freq = 256;
644 rtc->rtc_dev->irq_freq = 1;
645 rtc->periodic_freq = 0x60;
646
611 platform_set_drvdata(pdev, rtc); 647 platform_set_drvdata(pdev, rtc);
612 648
649 /* register periodic/carry/alarm irqs */
650 ret = request_irq(rtc->periodic_irq, sh_rtc_periodic, IRQF_DISABLED,
651 "sh-rtc period", rtc);
652 if (unlikely(ret)) {
653 dev_err(&pdev->dev,
654 "request period IRQ failed with %d, IRQ %d\n", ret,
655 rtc->periodic_irq);
656 goto err_badmap;
657 }
658
659 ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED,
660 "sh-rtc carry", rtc);
661 if (unlikely(ret)) {
662 dev_err(&pdev->dev,
663 "request carry IRQ failed with %d, IRQ %d\n", ret,
664 rtc->carry_irq);
665 free_irq(rtc->periodic_irq, rtc);
666 goto err_badmap;
667 }
668
669 ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED,
670 "sh-rtc alarm", rtc);
671 if (unlikely(ret)) {
672 dev_err(&pdev->dev,
673 "request alarm IRQ failed with %d, IRQ %d\n", ret,
674 rtc->alarm_irq);
675 free_irq(rtc->carry_irq, rtc);
676 free_irq(rtc->periodic_irq, rtc);
677 goto err_badmap;
678 }
679
680 tmp = readb(rtc->regbase + RCR1);
681 tmp &= ~RCR1_CF;
682 tmp |= RCR1_CIE;
683 writeb(tmp, rtc->regbase + RCR1);
684
613 return 0; 685 return 0;
614 686
615err_badmap: 687err_badmap:
@@ -630,6 +702,10 @@ static int __devexit sh_rtc_remove(struct platform_device *pdev)
630 sh_rtc_setpie(&pdev->dev, 0); 702 sh_rtc_setpie(&pdev->dev, 0);
631 sh_rtc_setaie(&pdev->dev, 0); 703 sh_rtc_setaie(&pdev->dev, 0);
632 704
705 free_irq(rtc->carry_irq, rtc);
706 free_irq(rtc->periodic_irq, rtc);
707 free_irq(rtc->alarm_irq, rtc);
708
633 release_resource(rtc->res); 709 release_resource(rtc->res);
634 710
635 platform_set_drvdata(pdev, NULL); 711 platform_set_drvdata(pdev, NULL);
@@ -662,6 +738,8 @@ module_exit(sh_rtc_exit);
662 738
663MODULE_DESCRIPTION("SuperH on-chip RTC driver"); 739MODULE_DESCRIPTION("SuperH on-chip RTC driver");
664MODULE_VERSION(DRV_VERSION); 740MODULE_VERSION(DRV_VERSION);
665MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, Jamie Lenehan <lenehan@twibble.org>"); 741MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
742 "Jamie Lenehan <lenehan@twibble.org>, "
743 "Angelo Castello <angelo.castello@st.com>");
666MODULE_LICENSE("GPL"); 744MODULE_LICENSE("GPL");
667MODULE_ALIAS("platform:" DRV_NAME); 745MODULE_ALIAS("platform:" DRV_NAME);
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index eff593080d4f..c2ea5d4df44a 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -333,7 +333,6 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
333 } 333 }
334 sci_out(port, SCFCR, fcr_val); 334 sci_out(port, SCFCR, fcr_val);
335} 335}
336
337#elif defined(CONFIG_CPU_SH3) 336#elif defined(CONFIG_CPU_SH3)
338/* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */ 337/* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
339static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 338static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
@@ -384,6 +383,12 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
384 383
385 sci_out(port, SCFCR, fcr_val); 384 sci_out(port, SCFCR, fcr_val);
386} 385}
386#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
387static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
388{
389 /* Nothing to do here.. */
390 sci_out(port, SCFCR, 0);
391}
387#else 392#else
388/* For SH7750 */ 393/* For SH7750 */
389static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 394static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 01a9dd715f5d..fa8700a968fc 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -1,20 +1,5 @@
1/* $Id: sh-sci.h,v 1.4 2004/02/19 16:43:56 lethal Exp $
2 *
3 * linux/drivers/serial/sh-sci.h
4 *
5 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 1999, 2000 Niibe Yutaka
7 * Copyright (C) 2000 Greg Banks
8 * Copyright (C) 2002, 2003 Paul Mundt
9 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
10 * Modified to support SH7300(SH-Mobile) SCIF. Takashi Kusuda (Jun 2003).
11 * Modified to support H8/300 Series Yoshinori Sato (Feb 2004).
12 * Removed SH7300 support (Jul 2007).
13 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Aug 2007).
14 */
15#include <linux/serial_core.h> 1#include <linux/serial_core.h>
16#include <asm/io.h> 2#include <asm/io.h>
17
18#include <asm/gpio.h> 3#include <asm/gpio.h>
19 4
20#if defined(CONFIG_H83007) || defined(CONFIG_H83068) 5#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
@@ -102,6 +87,15 @@
102# define SCSPTR0 SCPDR0 87# define SCSPTR0 SCPDR0
103# define SCIF_ORER 0x0001 /* overrun error bit */ 88# define SCIF_ORER 0x0001 /* overrun error bit */
104# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 89# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
90#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
91# define SCSPTR0 0xa4050160
92# define SCSPTR1 0xa405013e
93# define SCSPTR2 0xa4050160
94# define SCSPTR3 0xa405013e
95# define SCSPTR4 0xa4050128
96# define SCSPTR5 0xa4050128
97# define SCIF_ORER 0x0001 /* overrun error bit */
98# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
105# define SCIF_ONLY 99# define SCIF_ONLY
106#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) 100#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
107# define SCSPTR2 0xffe80020 /* 16 bit SCIF */ 101# define SCSPTR2 0xffe80020 /* 16 bit SCIF */
@@ -395,6 +389,11 @@
395 h8_sci_offset, h8_sci_size) \ 389 h8_sci_offset, h8_sci_size) \
396 CPU_SCI_FNS(name, h8_sci_offset, h8_sci_size) 390 CPU_SCI_FNS(name, h8_sci_offset, h8_sci_size)
397#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) 391#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size)
392#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
393 #define SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size, sh4_scif_offset, sh4_scif_size) \
394 CPU_SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size, sh4_scif_offset, sh4_scif_size)
395 #define SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) \
396 CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
398#else 397#else
399#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ 398#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
400 sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ 399 sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
@@ -419,6 +418,18 @@ SCIF_FNS(SCFDR, 0x1c, 16)
419SCIF_FNS(SCxTDR, 0x20, 8) 418SCIF_FNS(SCxTDR, 0x20, 8)
420SCIF_FNS(SCxRDR, 0x24, 8) 419SCIF_FNS(SCxRDR, 0x24, 8)
421SCIF_FNS(SCLSR, 0x24, 16) 420SCIF_FNS(SCLSR, 0x24, 16)
421#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
422SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16)
423SCIx_FNS(SCBRR, 0x04, 8, 0x04, 8)
424SCIx_FNS(SCSCR, 0x08, 16, 0x08, 16)
425SCIx_FNS(SCxTDR, 0x20, 8, 0x0c, 8)
426SCIx_FNS(SCxSR, 0x14, 16, 0x10, 16)
427SCIx_FNS(SCxRDR, 0x24, 8, 0x14, 8)
428SCIF_FNS(SCTDSR, 0x0c, 8)
429SCIF_FNS(SCFER, 0x10, 16)
430SCIF_FNS(SCFCR, 0x18, 16)
431SCIF_FNS(SCFDR, 0x1c, 16)
432SCIF_FNS(SCLSR, 0x24, 16)
422#else 433#else
423/* reg SCI/SH3 SCI/SH4 SCIF/SH3 SCIF/SH4 SCI/H8*/ 434/* reg SCI/SH3 SCI/SH4 SCIF/SH3 SCIF/SH4 SCI/H8*/
424/* name off sz off sz off sz off sz off sz*/ 435/* name off sz off sz off sz off sz off sz*/
@@ -589,6 +600,23 @@ static inline int sci_rxd_in(struct uart_port *port)
589 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ 600 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
590 return 1; 601 return 1;
591} 602}
603#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
604static inline int sci_rxd_in(struct uart_port *port)
605{
606 if (port->mapbase == 0xffe00000)
607 return ctrl_inb(SCSPTR0) & 0x0008 ? 1 : 0; /* SCIF0 */
608 if (port->mapbase == 0xffe10000)
609 return ctrl_inb(SCSPTR1) & 0x0020 ? 1 : 0; /* SCIF1 */
610 if (port->mapbase == 0xffe20000)
611 return ctrl_inb(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF2 */
612 if (port->mapbase == 0xa4e30000)
613 return ctrl_inb(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF3 */
614 if (port->mapbase == 0xa4e40000)
615 return ctrl_inb(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF4 */
616 if (port->mapbase == 0xa4e50000)
617 return ctrl_inb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */
618 return 1;
619}
592#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) 620#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
593static inline int sci_rxd_in(struct uart_port *port) 621static inline int sci_rxd_in(struct uart_port *port)
594{ 622{
@@ -727,6 +755,8 @@ static inline int sci_rxd_in(struct uart_port *port)
727 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 755 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
728 defined(CONFIG_CPU_SUBTYPE_SH7721) 756 defined(CONFIG_CPU_SUBTYPE_SH7721)
729#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) 757#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
758#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
759#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(16*bps)-1)
730#elif defined(__H8300H__) || defined(__H8300S__) 760#elif defined(__H8300H__) || defined(__H8300S__)
731#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1) 761#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1)
732#elif defined(CONFIG_SUPERH64) 762#elif defined(CONFIG_SUPERH64)
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index cfda7d5bf026..121b2ecddfc3 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -25,7 +25,7 @@ static void __init check_bugs(void)
25 case CPU_SH7619: 25 case CPU_SH7619:
26 *p++ = '2'; 26 *p++ = '2';
27 break; 27 break;
28 case CPU_SH7203 ... CPU_SH7263: 28 case CPU_SH7203 ... CPU_MXG:
29 *p++ = '2'; 29 *p++ = '2';
30 *p++ = 'a'; 30 *p++ = 'a';
31 break; 31 break;
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h
index ec028c649215..da46e67ae26d 100644
--- a/include/asm-sh/cpu-sh4/freq.h
+++ b/include/asm-sh/cpu-sh4/freq.h
@@ -10,14 +10,14 @@
10#ifndef __ASM_CPU_SH4_FREQ_H 10#ifndef __ASM_CPU_SH4_FREQ_H
11#define __ASM_CPU_SH4_FREQ_H 11#define __ASM_CPU_SH4_FREQ_H
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366) 13#if defined(CONFIG_CPU_SUBTYPE_SH7722) || \
14 defined(CONFIG_CPU_SUBTYPE_SH7723) || \
15 defined(CONFIG_CPU_SUBTYPE_SH7366)
14#define FRQCR 0xa4150000 16#define FRQCR 0xa4150000
15#define VCLKCR 0xa4150004 17#define VCLKCR 0xa4150004
16#define SCLKACR 0xa4150008 18#define SCLKACR 0xa4150008
17#define SCLKBCR 0xa415000c 19#define SCLKBCR 0xa415000c
18#if defined(CONFIG_CPU_SUBTYPE_SH7722)
19#define IrDACLKCR 0xa4150010 20#define IrDACLKCR 0xa4150010
20#endif
21#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 21#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
22 defined(CONFIG_CPU_SUBTYPE_SH7780) 22 defined(CONFIG_CPU_SUBTYPE_SH7780)
23#define FRQCR 0xffc80000 23#define FRQCR 0xffc80000
diff --git a/include/asm-sh/cpu-sh4/rtc.h b/include/asm-sh/cpu-sh4/rtc.h
index f3d0f53275e4..25b1e6adfe8c 100644
--- a/include/asm-sh/cpu-sh4/rtc.h
+++ b/include/asm-sh/cpu-sh4/rtc.h
@@ -1,7 +1,12 @@
1#ifndef __ASM_SH_CPU_SH4_RTC_H 1#ifndef __ASM_SH_CPU_SH4_RTC_H
2#define __ASM_SH_CPU_SH4_RTC_H 2#define __ASM_SH_CPU_SH4_RTC_H
3 3
4#ifdef CONFIG_CPU_SUBTYPE_SH7723
5#define rtc_reg_size sizeof(u16)
6#else
4#define rtc_reg_size sizeof(u32) 7#define rtc_reg_size sizeof(u32)
8#endif
9
5#define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */ 10#define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */
6#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR 11#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
7 12
diff --git a/include/asm-sh/migor.h b/include/asm-sh/migor.h
new file mode 100644
index 000000000000..2329363afdc3
--- /dev/null
+++ b/include/asm-sh/migor.h
@@ -0,0 +1,58 @@
1#ifndef __ASM_SH_MIGOR_H
2#define __ASM_SH_MIGOR_H
3
4/*
5 * linux/include/asm-sh/migor.h
6 *
7 * Copyright (C) 2008 Renesas Solutions
8 *
9 * Portions Copyright (C) 2007 Nobuhiro Iwamatsu
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 *
15 */
16#include <asm/addrspace.h>
17
18/* GPIO */
19#define MSTPCR0 0xa4150030
20#define MSTPCR1 0xa4150034
21#define MSTPCR2 0xa4150038
22
23#define PORT_PACR 0xa4050100
24#define PORT_PDCR 0xa4050106
25#define PORT_PECR 0xa4050108
26#define PORT_PHCR 0xa405010e
27#define PORT_PJCR 0xa4050110
28#define PORT_PKCR 0xa4050112
29#define PORT_PLCR 0xa4050114
30#define PORT_PMCR 0xa4050116
31#define PORT_PRCR 0xa405011c
32#define PORT_PWCR 0xa4050146
33#define PORT_PXCR 0xa4050148
34#define PORT_PYCR 0xa405014a
35#define PORT_PZCR 0xa405014c
36#define PORT_PADR 0xa4050120
37#define PORT_PWDR 0xa4050166
38
39#define PORT_HIZCRA 0xa4050158
40#define PORT_HIZCRC 0xa405015c
41
42#define PORT_MSELCRB 0xa4050182
43
44#define MSTPCR1 0xa4150034
45#define MSTPCR2 0xa4150038
46
47#define PORT_PSELA 0xa405014e
48#define PORT_PSELB 0xa4050150
49#define PORT_PSELC 0xa4050152
50#define PORT_PSELD 0xa4050154
51
52#define PORT_HIZCRA 0xa4050158
53#define PORT_HIZCRB 0xa405015a
54#define PORT_HIZCRC 0xa405015c
55
56#define BSC_CS6ABCR 0xfec1001c
57
58#endif /* __ASM_SH_MIGOR_H */
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index ec707b98e5b9..b7c7ce80f03e 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -16,7 +16,7 @@ enum cpu_type {
16 CPU_SH7619, 16 CPU_SH7619,
17 17
18 /* SH-2A types */ 18 /* SH-2A types */
19 CPU_SH7203, CPU_SH7206, CPU_SH7263, 19 CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
20 20
21 /* SH-3 types */ 21 /* SH-3 types */
22 CPU_SH7705, CPU_SH7706, CPU_SH7707, 22 CPU_SH7705, CPU_SH7706, CPU_SH7707,
@@ -29,7 +29,8 @@ enum cpu_type {
29 CPU_SH7760, CPU_SH4_202, CPU_SH4_501, 29 CPU_SH7760, CPU_SH4_202, CPU_SH4_501,
30 30
31 /* SH-4A types */ 31 /* SH-4A types */
32 CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3, 32 CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785,
33 CPU_SH7723, CPU_SHX3,
33 34
34 /* SH4AL-DSP types */ 35 /* SH4AL-DSP types */
35 CPU_SH7343, CPU_SH7722, CPU_SH7366, 36 CPU_SH7343, CPU_SH7722, CPU_SH7366,
diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h
index 1770460a4616..a33838f23a6d 100644
--- a/include/asm-sh/r7780rp.h
+++ b/include/asm-sh/r7780rp.h
@@ -55,11 +55,11 @@
55#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */ 55#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */
56#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */ 56#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */
57#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */ 57#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */
58#define PA_ICCR (PA_BCR+0x0600) /* Serial control */ 58#define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */
59#define PA_SAR (PA_BCR+0x0602) /* Serial Slave control */ 59#define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */
60#define PA_MDR (PA_BCR+0x0604) /* Serial Mode control */ 60#define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */
61#define PA_ADR1 (PA_BCR+0x0606) /* Serial Address1 control */ 61#define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
62#define PA_DAR1 (PA_BCR+0x0646) /* Serial Data1 control */ 62#define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */
63#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */ 63#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */
64#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ 64#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */
65#define PA_PMR (PA_BCR+0x0900) /* */ 65#define PA_PMR (PA_BCR+0x0900) /* */
@@ -107,11 +107,11 @@
107#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */ 107#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */
108#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */ 108#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */
109#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */ 109#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */
110#define PA_ICCR (PA_BCR+0x0500) /* Serial control */ 110#define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */
111#define PA_SAR (PA_BCR+0x0502) /* Serial Slave control */ 111#define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */
112#define PA_MDR (PA_BCR+0x0504) /* Serial Mode control */ 112#define PA_SMMR (PA_BCR+0x0504) /* 2-wire Serial Mode control */
113#define PA_ADR1 (PA_BCR+0x0506) /* Serial Address1 control */ 113#define PA_SMSADR1 (PA_BCR+0x0506) /* 2-wire Serial Address1 control */
114#define PA_DAR1 (PA_BCR+0x0546) /* Serial Data1 control */ 114#define PA_SMTRDR1 (PA_BCR+0x0546) /* 2-wire Serial Data1 control */
115#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */ 115#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */
116 116
117#define PA_AX88796L 0xa5800400 /* AX88796L Area */ 117#define PA_AX88796L 0xa5800400 /* AX88796L Area */
@@ -190,6 +190,8 @@
190#define IRQ_TP (HL_FPGA_IRQ_BASE + 12) 190#define IRQ_TP (HL_FPGA_IRQ_BASE + 12)
191#define IRQ_RTC (HL_FPGA_IRQ_BASE + 13) 191#define IRQ_RTC (HL_FPGA_IRQ_BASE + 13)
192#define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14) 192#define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14)
193#define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15)
194#define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16)
193 195
194unsigned char *highlander_init_irq_r7780mp(void); 196unsigned char *highlander_init_irq_r7780mp(void);
195unsigned char *highlander_init_irq_r7780rp(void); 197unsigned char *highlander_init_irq_r7780rp(void);
diff --git a/include/asm-sh/se7721.h b/include/asm-sh/se7721.h
new file mode 100644
index 000000000000..b957f6041193
--- /dev/null
+++ b/include/asm-sh/se7721.h
@@ -0,0 +1,70 @@
1/*
2 * Copyright (C) 2008 Renesas Solutions Corp.
3 *
4 * Hitachi UL SolutionEngine 7721 Support.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 */
11
12#ifndef __ASM_SH_SE7721_H
13#define __ASM_SH_SE7721_H
14#include <asm/addrspace.h>
15
16/* Box specific addresses. */
17#define SE_AREA0_WIDTH 2 /* Area0: 32bit */
18#define PA_ROM 0xa0000000 /* EPROM */
19#define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */
20#define PA_FROM 0xa1000000 /* Flash-ROM */
21#define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
22#define PA_EXT1 0xa4000000
23#define PA_EXT1_SIZE 0x04000000
24#define PA_SDRAM 0xaC000000 /* SDRAM(Area3) 64MB */
25#define PA_SDRAM_SIZE 0x04000000
26
27#define PA_EXT4 0xb0000000
28#define PA_EXT4_SIZE 0x04000000
29
30#define PA_PERIPHERAL 0xB8000000
31
32#define PA_PCIC PA_PERIPHERAL
33#define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0)
34#define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000)
35#define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000)
36#define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000)
37#define MRSHPC_OPTION (PA_MRSHPC + 6)
38#define MRSHPC_CSR (PA_MRSHPC + 8)
39#define MRSHPC_ISR (PA_MRSHPC + 10)
40#define MRSHPC_ICR (PA_MRSHPC + 12)
41#define MRSHPC_CPWCR (PA_MRSHPC + 14)
42#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
43#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
44#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
45#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
46#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
47#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
48#define MRSHPC_CDCR (PA_MRSHPC + 28)
49#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
50
51#define PA_LED 0xB6800000 /* 8bit LED */
52#define PA_FPGA 0xB7000000 /* FPGA base address */
53
54#define MRSHPC_IRQ0 10
55
56#define FPGA_ILSR1 (PA_FPGA + 0x02)
57#define FPGA_ILSR2 (PA_FPGA + 0x03)
58#define FPGA_ILSR3 (PA_FPGA + 0x04)
59#define FPGA_ILSR4 (PA_FPGA + 0x05)
60#define FPGA_ILSR5 (PA_FPGA + 0x06)
61#define FPGA_ILSR6 (PA_FPGA + 0x07)
62#define FPGA_ILSR7 (PA_FPGA + 0x08)
63#define FPGA_ILSR8 (PA_FPGA + 0x09)
64
65void init_se7721_IRQ(void);
66
67#define __IO_PREFIX se7721
68#include <asm/io_generic.h>
69
70#endif /* __ASM_SH_SE7721_H */
diff --git a/include/asm-sh/se7722.h b/include/asm-sh/se7722.h
index e0e89fcb8388..3690fe5857a4 100644
--- a/include/asm-sh/se7722.h
+++ b/include/asm-sh/se7722.h
@@ -77,6 +77,8 @@
77#define PORT_PSELA 0xA405014EUL 77#define PORT_PSELA 0xA405014EUL
78#define PORT_PYCR 0xA405014AUL 78#define PORT_PYCR 0xA405014AUL
79#define PORT_PZCR 0xA405014CUL 79#define PORT_PZCR 0xA405014CUL
80#define PORT_HIZCRA 0xA4050158UL
81#define PORT_HIZCRC 0xA405015CUL
80 82
81/* IRQ */ 83/* IRQ */
82#define IRQ0_IRQ 32 84#define IRQ0_IRQ 32
diff --git a/include/asm-sh/sh_keysc.h b/include/asm-sh/sh_keysc.h
new file mode 100644
index 000000000000..b5a4dd5a9729
--- /dev/null
+++ b/include/asm-sh/sh_keysc.h
@@ -0,0 +1,13 @@
1#ifndef __ASM_KEYSC_H__
2#define __ASM_KEYSC_H__
3
4#define SH_KEYSC_MAXKEYS 30
5
6struct sh_keysc_info {
7 enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3 } mode;
8 int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */
9 int delay;
10 int keycodes[SH_KEYSC_MAXKEYS];
11};
12
13#endif /* __ASM_KEYSC_H__ */
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index 5145aa2a0ce9..e65b6b822cb3 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -146,6 +146,8 @@ extern unsigned int instruction_size(unsigned int insn);
146 146
147extern unsigned long cached_to_uncached; 147extern unsigned long cached_to_uncached;
148 148
149extern struct dentry *sh_debugfs_root;
150
149/* XXX 151/* XXX
150 * disable hlt during certain critical i/o operations 152 * disable hlt during certain critical i/o operations
151 */ 153 */
diff --git a/include/asm-sh/uaccess_32.h b/include/asm-sh/uaccess_32.h
index c0318b608893..1e41fda74bd3 100644
--- a/include/asm-sh/uaccess_32.h
+++ b/include/asm-sh/uaccess_32.h
@@ -55,13 +55,10 @@ static inline void set_fs(mm_segment_t s)
55 * If we don't have an MMU (or if its disabled) the only thing we really have 55 * If we don't have an MMU (or if its disabled) the only thing we really have
56 * to look out for is if the address resides somewhere outside of what 56 * to look out for is if the address resides somewhere outside of what
57 * available RAM we have. 57 * available RAM we have.
58 *
59 * TODO: This check could probably also stand to be restricted somewhat more..
60 * though it still does the Right Thing(tm) for the time being.
61 */ 58 */
62static inline int __access_ok(unsigned long addr, unsigned long size) 59static inline int __access_ok(unsigned long addr, unsigned long size)
63{ 60{
64 return ((addr >= memory_start) && ((addr + size) < memory_end)); 61 return 1;
65} 62}
66#else /* CONFIG_MMU */ 63#else /* CONFIG_MMU */
67#define __addr_ok(addr) \ 64#define __addr_ok(addr) \
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-16 23:11:19 -0400