aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-11-04 12:04:29 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-04 14:55:59 -0400
commit818f2a3cc34b0673dccd4188ce4a1862d9d90127 (patch)
treefa4ad349eed43099fc846f68c3d3b9bca097f99f
parent46168f39360f419e59952d58cd08a862886ec8cd (diff)
drm/i915: revert pageflip/mappable related abi breakage
In a00b10c360b35d6431a "Only enforce fence limits inside the GTT" Chris Wilson implemented an optimization to only pin framebuffers as mappable for crtc_set_base (but not for pageflips). This breaks the abi, eg: A double buffering mesa client might leave the last framebuffer in unmappable space on close. A subsequent glReadPix by a frontbuffer rendering client then goes boom. My pretty anal mappable/unmappable consistency checking detected this, see https://bugs.freedesktop.org/show_bug.cgi?id=31286 Chris Wilson tried to fix this in 085ce2643713830cf772c by pinning tiled framebuffers into mappable space. This a) renders the original optimization of not forcing framebuffers for pageflipping clients into mappable pointless because all our scanout buffers are tiled by default. b) doesn't solve the problem for untiled framebuffers. So kill this. Emperically it's no gain anyway because framebuffers are being reused by the ddx and hence there's no chance for them to get constanly bounced between mappable and unmappable. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f1e4eca44866..a2cd579eb9b2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1461,8 +1461,7 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
1461 BUG(); 1461 BUG();
1462 } 1462 }
1463 1463
1464 ret = i915_gem_object_pin(obj, alignment, 1464 ret = i915_gem_object_pin(obj, alignment, true,
1465 !pipelined || obj_priv->tiling_mode,
1466 obj_priv->tiling_mode); 1465 obj_priv->tiling_mode);
1467 if (ret) 1466 if (ret)
1468 return ret; 1467 return ret;