diff options
| author | Robert Richter <robert.richter@amd.com> | 2010-02-25 13:40:46 -0500 |
|---|---|---|
| committer | Robert Richter <robert.richter@amd.com> | 2010-03-01 05:23:15 -0500 |
| commit | 1d6040f17d12a65b9f7ab4cb9fd6d721206b79ec (patch) | |
| tree | ec7d557c8ec7cffe41797b197fc2c0a33056468d | |
| parent | 86d62b6fa2845725ad88b95387c8c52731fb2460 (diff) | |
perf, x86: make IBS macros available in perf_event.h
This patch moves code from oprofile to perf_event.h to make it also
available for usage by perf.
Signed-off-by: Robert Richter <robert.richter@amd.com>
| -rw-r--r-- | arch/x86/include/asm/perf_event.h | 10 | ||||
| -rw-r--r-- | arch/x86/oprofile/op_model_amd.c | 11 |
2 files changed, 10 insertions, 11 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index befd172c82ad..4933ccde96c4 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h | |||
| @@ -117,6 +117,16 @@ union cpuid10_edx { | |||
| 117 | */ | 117 | */ |
| 118 | #define X86_PMC_IDX_FIXED_BTS (X86_PMC_IDX_FIXED + 16) | 118 | #define X86_PMC_IDX_FIXED_BTS (X86_PMC_IDX_FIXED + 16) |
| 119 | 119 | ||
| 120 | /* IbsFetchCtl bits/masks */ | ||
| 121 | #define IBS_FETCH_RAND_EN (1ULL<<57) | ||
| 122 | #define IBS_FETCH_VAL (1ULL<<49) | ||
| 123 | #define IBS_FETCH_ENABLE (1ULL<<48) | ||
| 124 | #define IBS_FETCH_CNT_MASK 0xFFFF0000ULL | ||
| 125 | |||
| 126 | /* IbsOpCtl bits */ | ||
| 127 | #define IBS_OP_CNT_CTL (1ULL<<19) | ||
| 128 | #define IBS_OP_VAL (1ULL<<18) | ||
| 129 | #define IBS_OP_ENABLE (1ULL<<17) | ||
| 120 | 130 | ||
| 121 | #ifdef CONFIG_PERF_EVENTS | 131 | #ifdef CONFIG_PERF_EVENTS |
| 122 | extern void init_hw_perf_events(void); | 132 | extern void init_hw_perf_events(void); |
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c index 6a58256dce9f..c67174917305 100644 --- a/arch/x86/oprofile/op_model_amd.c +++ b/arch/x86/oprofile/op_model_amd.c | |||
| @@ -46,17 +46,6 @@ | |||
| 46 | 46 | ||
| 47 | static unsigned long reset_value[NUM_VIRT_COUNTERS]; | 47 | static unsigned long reset_value[NUM_VIRT_COUNTERS]; |
| 48 | 48 | ||
| 49 | /* IbsFetchCtl bits/masks */ | ||
| 50 | #define IBS_FETCH_RAND_EN (1ULL<<57) | ||
| 51 | #define IBS_FETCH_VAL (1ULL<<49) | ||
| 52 | #define IBS_FETCH_ENABLE (1ULL<<48) | ||
| 53 | #define IBS_FETCH_CNT_MASK 0xFFFF0000ULL | ||
| 54 | |||
| 55 | /* IbsOpCtl bits */ | ||
| 56 | #define IBS_OP_CNT_CTL (1ULL<<19) | ||
| 57 | #define IBS_OP_VAL (1ULL<<18) | ||
| 58 | #define IBS_OP_ENABLE (1ULL<<17) | ||
| 59 | |||
| 60 | #define IBS_FETCH_SIZE 6 | 49 | #define IBS_FETCH_SIZE 6 |
| 61 | #define IBS_OP_SIZE 12 | 50 | #define IBS_OP_SIZE 12 |
| 62 | 51 | ||
