CRIS: Better handling of pinmux settings

Depending on eth, eth_mido and geth fields in wr_hwprot, don't set
corresponding pins on gpio port b to gpio mode. This avoids
re-resetting the ethernet PHY should this already have been done.

Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>

1 files changed, 26 insertions, 2 deletions

diff --git a/arch/cris/include/arch-v32/mach-a3/mach/startup.inc b/arch/cris/include/arch-v32/mach-a3/mach/startup.inc
index 2f23e5e16f4a..2d52bcc96ed5 100644
--- a/arch/cris/include/arch-v32/mach-a3/mach/startup.inc
+++ b/arch/cris/include/arch-v32/mach-a3/mach/startup.inc
@@ -1,9 +1,19 @@
+#ifndef STARTUP_INC_INCLUDED
+#define STARTUP_INC_INCLUDED
+
 #include <hwregs/asm/reg_map_asm.h>
 #include <hwregs/asm/gio_defs_asm.h>
 #include <hwregs/asm/pio_defs_asm.h>
 #include <hwregs/asm/clkgen_defs_asm.h>
 #include <hwregs/asm/pinmux_defs_asm.h>
 
+        .macro GIO_SET_P BITS, OUTREG
+        bmi     1f              ; btstq: bit -> N flag
+        nop
+        or.d    \BITS, \OUTREG
+1:
+        .endm
+
         .macro GIO_INIT
         move.d  CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
         move.d  REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
@@ -32,10 +42,23 @@
         move.d  0xFFFFFFFF, $r0
         move.d  REG_ADDR(pinmux, regi_pinmux, rw_gio_pa), $r1
         move.d  $r0, [$r1]
-        move.d  REG_ADDR(pinmux, regi_pinmux, rw_gio_pb), $r1
-        move.d  $r0, [$r1]
         move.d  REG_ADDR(pinmux, regi_pinmux, rw_gio_pc), $r1
         move.d  $r0, [$r1]
+
+        ;; If eth_mdio, eth, geth bits are set in hwprot, don't
+        ;; set them to gpio, as this means they have been configured
+        ;; earlier and shouldn't be changed.
+        move.d  0xFC000000, $r2 ; pins 25..0 are eth_mdio, eth, geth
+        move.d  REG_ADDR(pinmux, regi_pinmux, rw_hwprot), $r1
+        move.d  [$r1], $r0
+        btstq   REG_BIT(pinmux, rw_hwprot, eth), $r0
+        GIO_SET_P 0x00FFFF00, $r2               ;; pins 8..23 are eth
+        btstq   REG_BIT(pinmux, rw_hwprot, eth_mdio), $r0
+        GIO_SET_P 0x03000000, $r2               ;; pins 24..25 are eth_mdio
+        btstq   REG_BIT(pinmux, rw_hwprot, geth), $r0
+        GIO_SET_P 0x000000FF, $r2               ;; pins 0..7 are geth
+        move.d  REG_ADDR(pinmux, regi_pinmux, rw_gio_pb), $r1
+        move.d  $r2, [$r1]
         .endm
 
         .macro START_CLOCKS
@@ -58,3 +81,4 @@
         move.d CONFIG_ETRAX_PIO_CE2_CFG, $r1
         move.d $r1, [$r0]
         .endm
+#endif