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authorTimo Teräs <timo.teras@iki.fi>2010-06-06 18:38:47 -0400
committerDavid S. Miller <davem@davemloft.net>2010-06-06 18:38:47 -0400
commit024a07bacf8287a6ddfa83e9d5b951c5e8b4070e (patch)
tree1e414be3a1fa1dadaa70f2cac173f7328efb75e4
parent8ffb335e8d696affc04f963bf73ce2196f80edb9 (diff)
r8169: fix random mdio_write failures
Some configurations need delay between the "write completed" indication and new write to work reliably. Realtek driver seems to use longer delay when polling the "write complete" bit, so it waits long enough between writes with high probability (but could probably break too). This patch adds a new udelay to make sure we wait unconditionally some time after the write complete indication. This caused a regression with XID 18000000 boards when the board specific phy configuration writing many mdio registers was added in commit 2e955856ff (r8169: phy init for the 8169scd). Some of the configration mdio writes would almost always fail, and depending on failure might leave the PHY in non-working state. Signed-off-by: Timo Teräs <timo.teras@iki.fi> Acked-off-by: Francois Romieu <romieu@fr.zoreil.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/r8169.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 217e709bda3e..03a8318d90a2 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -559,6 +559,11 @@ static void mdio_write(void __iomem *ioaddr, int reg_addr, int value)
559 break; 559 break;
560 udelay(25); 560 udelay(25);
561 } 561 }
562 /*
563 * Some configurations require a small delay even after the write
564 * completed indication or the next write might fail.
565 */
566 udelay(25);
562} 567}
563 568
564static int mdio_read(void __iomem *ioaddr, int reg_addr) 569static int mdio_read(void __iomem *ioaddr, int reg_addr)