diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-13 10:59:59 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-13 10:59:59 -0400 |
commit | fea0f9ff56258734ff1c49008c36ef6904b8c541 (patch) | |
tree | 0c0c383ce253177180e2ade24894ea900cfd5102 | |
parent | aef2ea912e0ee39fbca74fed0ab8e612ac2c3ba2 (diff) | |
parent | 9f1d036648c1c5ed81b0e98d7a06d55df972701e (diff) |
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"Just a few straggling fixes I hoovered up, and an intel fixes pull
from Daniel which fixes some regressions, and some mgag200 fixes from
Matrox."
* 'drm-next' of git://people.freedesktop.org/~airlied/linux:
drm/mgag200: Fix framebuffer base address programming
drm/mgag200: Convert counter delays to jiffies
drm/mgag200: Fix writes into MGA1064_PIX_CLK_CTL register
drm/mgag200: Don't change unrelated registers during modeset
drm: Only print a debug message when the polled connector has changed
drm: Make the HPD status updates debug logs more readable
drm: Use names of ioctls in debug traces
drm: Remove pointless '-' characters from drm_fb_helper documentation
drm: Add kernel-doc for drm_fb_helper_funcs->initial_config
drm: refactor call to request_module
drm: Don't prune modes loudly when a connector is disconnected
drm: Add missing break in the command line mode parsing code
drm/i915: clear the stolen fb before resuming
Revert "drm/i915: Calculate correct stolen size for GEN7+"
drm/i915: hsw: fix link training for eDP on port-A
Revert "drm/i915: revert eDP bpp clamping code changes"
drm: don't check modeset locks in panic handler
drm/i915: Fix pipe enabled mask for pipe C in WM calculations
drm/mm: fix dump table BUG
drm/i915: Always normalize return timeout for wait_timeout_ioctl
-rw-r--r-- | drivers/gpu/drm/drm_crtc.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/drm_crtc_helper.c | 27 | ||||
-rw-r--r-- | drivers/gpu/drm/drm_drv.c | 20 | ||||
-rw-r--r-- | drivers/gpu/drm/drm_encoder_slave.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/drm_mm.c | 34 | ||||
-rw-r--r-- | drivers/gpu/drm/drm_modes.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_gtt.c | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 77 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_fb.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 44 | ||||
-rw-r--r-- | drivers/gpu/drm/mgag200/mgag200_mode.c | 90 | ||||
-rw-r--r-- | include/drm/drmP.h | 3 | ||||
-rw-r--r-- | include/drm/drm_fb_helper.h | 15 |
17 files changed, 213 insertions, 156 deletions
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 3a8f7e6db295..e7e92429d10f 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c | |||
@@ -78,6 +78,10 @@ void drm_warn_on_modeset_not_all_locked(struct drm_device *dev) | |||
78 | { | 78 | { |
79 | struct drm_crtc *crtc; | 79 | struct drm_crtc *crtc; |
80 | 80 | ||
81 | /* Locking is currently fubar in the panic handler. */ | ||
82 | if (oops_in_progress) | ||
83 | return; | ||
84 | |||
81 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) | 85 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) |
82 | WARN_ON(!mutex_is_locked(&crtc->mutex)); | 86 | WARN_ON(!mutex_is_locked(&crtc->mutex)); |
83 | 87 | ||
@@ -246,6 +250,7 @@ char *drm_get_connector_status_name(enum drm_connector_status status) | |||
246 | else | 250 | else |
247 | return "unknown"; | 251 | return "unknown"; |
248 | } | 252 | } |
253 | EXPORT_SYMBOL(drm_get_connector_status_name); | ||
249 | 254 | ||
250 | /** | 255 | /** |
251 | * drm_mode_object_get - allocate a new modeset identifier | 256 | * drm_mode_object_get - allocate a new modeset identifier |
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c index e974f9309b72..ed1334e27c33 100644 --- a/drivers/gpu/drm/drm_crtc_helper.c +++ b/drivers/gpu/drm/drm_crtc_helper.c | |||
@@ -121,6 +121,7 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector, | |||
121 | connector->helper_private; | 121 | connector->helper_private; |
122 | int count = 0; | 122 | int count = 0; |
123 | int mode_flags = 0; | 123 | int mode_flags = 0; |
124 | bool verbose_prune = true; | ||
124 | 125 | ||
125 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, | 126 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, |
126 | drm_get_connector_name(connector)); | 127 | drm_get_connector_name(connector)); |
@@ -149,6 +150,7 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector, | |||
149 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n", | 150 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n", |
150 | connector->base.id, drm_get_connector_name(connector)); | 151 | connector->base.id, drm_get_connector_name(connector)); |
151 | drm_mode_connector_update_edid_property(connector, NULL); | 152 | drm_mode_connector_update_edid_property(connector, NULL); |
153 | verbose_prune = false; | ||
152 | goto prune; | 154 | goto prune; |
153 | } | 155 | } |
154 | 156 | ||
@@ -182,7 +184,7 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector, | |||
182 | } | 184 | } |
183 | 185 | ||
184 | prune: | 186 | prune: |
185 | drm_mode_prune_invalid(dev, &connector->modes, true); | 187 | drm_mode_prune_invalid(dev, &connector->modes, verbose_prune); |
186 | 188 | ||
187 | if (list_empty(&connector->modes)) | 189 | if (list_empty(&connector->modes)) |
188 | return 0; | 190 | return 0; |
@@ -1005,12 +1007,20 @@ static void output_poll_execute(struct work_struct *work) | |||
1005 | continue; | 1007 | continue; |
1006 | 1008 | ||
1007 | connector->status = connector->funcs->detect(connector, false); | 1009 | connector->status = connector->funcs->detect(connector, false); |
1008 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %d to %d\n", | 1010 | if (old_status != connector->status) { |
1009 | connector->base.id, | 1011 | const char *old, *new; |
1010 | drm_get_connector_name(connector), | 1012 | |
1011 | old_status, connector->status); | 1013 | old = drm_get_connector_status_name(old_status); |
1012 | if (old_status != connector->status) | 1014 | new = drm_get_connector_status_name(connector->status); |
1015 | |||
1016 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s] " | ||
1017 | "status updated from %s to %s\n", | ||
1018 | connector->base.id, | ||
1019 | drm_get_connector_name(connector), | ||
1020 | old, new); | ||
1021 | |||
1013 | changed = true; | 1022 | changed = true; |
1023 | } | ||
1014 | } | 1024 | } |
1015 | 1025 | ||
1016 | mutex_unlock(&dev->mode_config.mutex); | 1026 | mutex_unlock(&dev->mode_config.mutex); |
@@ -1083,10 +1093,11 @@ void drm_helper_hpd_irq_event(struct drm_device *dev) | |||
1083 | old_status = connector->status; | 1093 | old_status = connector->status; |
1084 | 1094 | ||
1085 | connector->status = connector->funcs->detect(connector, false); | 1095 | connector->status = connector->funcs->detect(connector, false); |
1086 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %d to %d\n", | 1096 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to %s\n", |
1087 | connector->base.id, | 1097 | connector->base.id, |
1088 | drm_get_connector_name(connector), | 1098 | drm_get_connector_name(connector), |
1089 | old_status, connector->status); | 1099 | drm_get_connector_status_name(old_status), |
1100 | drm_get_connector_status_name(connector->status)); | ||
1090 | if (old_status != connector->status) | 1101 | if (old_status != connector->status) |
1091 | changed = true; | 1102 | changed = true; |
1092 | } | 1103 | } |
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c index 8d4f29075af5..9cc247f55502 100644 --- a/drivers/gpu/drm/drm_drv.c +++ b/drivers/gpu/drm/drm_drv.c | |||
@@ -57,7 +57,7 @@ static int drm_version(struct drm_device *dev, void *data, | |||
57 | struct drm_file *file_priv); | 57 | struct drm_file *file_priv); |
58 | 58 | ||
59 | #define DRM_IOCTL_DEF(ioctl, _func, _flags) \ | 59 | #define DRM_IOCTL_DEF(ioctl, _func, _flags) \ |
60 | [DRM_IOCTL_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, .cmd_drv = 0} | 60 | [DRM_IOCTL_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, .cmd_drv = 0, .name = #ioctl} |
61 | 61 | ||
62 | /** Ioctl table */ | 62 | /** Ioctl table */ |
63 | static const struct drm_ioctl_desc drm_ioctls[] = { | 63 | static const struct drm_ioctl_desc drm_ioctls[] = { |
@@ -375,7 +375,7 @@ long drm_ioctl(struct file *filp, | |||
375 | { | 375 | { |
376 | struct drm_file *file_priv = filp->private_data; | 376 | struct drm_file *file_priv = filp->private_data; |
377 | struct drm_device *dev; | 377 | struct drm_device *dev; |
378 | const struct drm_ioctl_desc *ioctl; | 378 | const struct drm_ioctl_desc *ioctl = NULL; |
379 | drm_ioctl_t *func; | 379 | drm_ioctl_t *func; |
380 | unsigned int nr = DRM_IOCTL_NR(cmd); | 380 | unsigned int nr = DRM_IOCTL_NR(cmd); |
381 | int retcode = -EINVAL; | 381 | int retcode = -EINVAL; |
@@ -392,11 +392,6 @@ long drm_ioctl(struct file *filp, | |||
392 | atomic_inc(&dev->counts[_DRM_STAT_IOCTLS]); | 392 | atomic_inc(&dev->counts[_DRM_STAT_IOCTLS]); |
393 | ++file_priv->ioctl_count; | 393 | ++file_priv->ioctl_count; |
394 | 394 | ||
395 | DRM_DEBUG("pid=%d, cmd=0x%02x, nr=0x%02x, dev 0x%lx, auth=%d\n", | ||
396 | task_pid_nr(current), cmd, nr, | ||
397 | (long)old_encode_dev(file_priv->minor->device), | ||
398 | file_priv->authenticated); | ||
399 | |||
400 | if ((nr >= DRM_CORE_IOCTL_COUNT) && | 395 | if ((nr >= DRM_CORE_IOCTL_COUNT) && |
401 | ((nr < DRM_COMMAND_BASE) || (nr >= DRM_COMMAND_END))) | 396 | ((nr < DRM_COMMAND_BASE) || (nr >= DRM_COMMAND_END))) |
402 | goto err_i1; | 397 | goto err_i1; |
@@ -417,6 +412,11 @@ long drm_ioctl(struct file *filp, | |||
417 | } else | 412 | } else |
418 | goto err_i1; | 413 | goto err_i1; |
419 | 414 | ||
415 | DRM_DEBUG("pid=%d, dev=0x%lx, auth=%d, %s\n", | ||
416 | task_pid_nr(current), | ||
417 | (long)old_encode_dev(file_priv->minor->device), | ||
418 | file_priv->authenticated, ioctl->name); | ||
419 | |||
420 | /* Do not trust userspace, use our own definition */ | 420 | /* Do not trust userspace, use our own definition */ |
421 | func = ioctl->func; | 421 | func = ioctl->func; |
422 | /* is there a local override? */ | 422 | /* is there a local override? */ |
@@ -471,6 +471,12 @@ long drm_ioctl(struct file *filp, | |||
471 | } | 471 | } |
472 | 472 | ||
473 | err_i1: | 473 | err_i1: |
474 | if (!ioctl) | ||
475 | DRM_DEBUG("invalid iotcl: pid=%d, dev=0x%lx, auth=%d, cmd=0x%02x, nr=0x%02x\n", | ||
476 | task_pid_nr(current), | ||
477 | (long)old_encode_dev(file_priv->minor->device), | ||
478 | file_priv->authenticated, cmd, nr); | ||
479 | |||
474 | if (kdata != stack_kdata) | 480 | if (kdata != stack_kdata) |
475 | kfree(kdata); | 481 | kfree(kdata); |
476 | atomic_dec(&dev->ioctl_count); | 482 | atomic_dec(&dev->ioctl_count); |
diff --git a/drivers/gpu/drm/drm_encoder_slave.c b/drivers/gpu/drm/drm_encoder_slave.c index 48c52f7df4e6..0cfb60f54766 100644 --- a/drivers/gpu/drm/drm_encoder_slave.c +++ b/drivers/gpu/drm/drm_encoder_slave.c | |||
@@ -54,16 +54,12 @@ int drm_i2c_encoder_init(struct drm_device *dev, | |||
54 | struct i2c_adapter *adap, | 54 | struct i2c_adapter *adap, |
55 | const struct i2c_board_info *info) | 55 | const struct i2c_board_info *info) |
56 | { | 56 | { |
57 | char modalias[sizeof(I2C_MODULE_PREFIX) | ||
58 | + I2C_NAME_SIZE]; | ||
59 | struct module *module = NULL; | 57 | struct module *module = NULL; |
60 | struct i2c_client *client; | 58 | struct i2c_client *client; |
61 | struct drm_i2c_encoder_driver *encoder_drv; | 59 | struct drm_i2c_encoder_driver *encoder_drv; |
62 | int err = 0; | 60 | int err = 0; |
63 | 61 | ||
64 | snprintf(modalias, sizeof(modalias), | 62 | request_module("%s%s", I2C_MODULE_PREFIX, info->type); |
65 | "%s%s", I2C_MODULE_PREFIX, info->type); | ||
66 | request_module(modalias); | ||
67 | 63 | ||
68 | client = i2c_new_device(adap, info); | 64 | client = i2c_new_device(adap, info); |
69 | if (!client) { | 65 | if (!client) { |
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c index db1e2d6f90d7..07cf99cc8862 100644 --- a/drivers/gpu/drm/drm_mm.c +++ b/drivers/gpu/drm/drm_mm.c | |||
@@ -755,33 +755,35 @@ void drm_mm_debug_table(struct drm_mm *mm, const char *prefix) | |||
755 | EXPORT_SYMBOL(drm_mm_debug_table); | 755 | EXPORT_SYMBOL(drm_mm_debug_table); |
756 | 756 | ||
757 | #if defined(CONFIG_DEBUG_FS) | 757 | #if defined(CONFIG_DEBUG_FS) |
758 | int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm) | 758 | static unsigned long drm_mm_dump_hole(struct seq_file *m, struct drm_mm_node *entry) |
759 | { | 759 | { |
760 | struct drm_mm_node *entry; | ||
761 | unsigned long total_used = 0, total_free = 0, total = 0; | ||
762 | unsigned long hole_start, hole_end, hole_size; | 760 | unsigned long hole_start, hole_end, hole_size; |
763 | 761 | ||
764 | hole_start = drm_mm_hole_node_start(&mm->head_node); | 762 | if (entry->hole_follows) { |
765 | hole_end = drm_mm_hole_node_end(&mm->head_node); | 763 | hole_start = drm_mm_hole_node_start(entry); |
766 | hole_size = hole_end - hole_start; | 764 | hole_end = drm_mm_hole_node_end(entry); |
767 | if (hole_size) | 765 | hole_size = hole_end - hole_start; |
768 | seq_printf(m, "0x%08lx-0x%08lx: 0x%08lx: free\n", | 766 | seq_printf(m, "0x%08lx-0x%08lx: 0x%08lx: free\n", |
769 | hole_start, hole_end, hole_size); | 767 | hole_start, hole_end, hole_size); |
770 | total_free += hole_size; | 768 | return hole_size; |
769 | } | ||
770 | |||
771 | return 0; | ||
772 | } | ||
773 | |||
774 | int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm) | ||
775 | { | ||
776 | struct drm_mm_node *entry; | ||
777 | unsigned long total_used = 0, total_free = 0, total = 0; | ||
778 | |||
779 | total_free += drm_mm_dump_hole(m, &mm->head_node); | ||
771 | 780 | ||
772 | drm_mm_for_each_node(entry, mm) { | 781 | drm_mm_for_each_node(entry, mm) { |
773 | seq_printf(m, "0x%08lx-0x%08lx: 0x%08lx: used\n", | 782 | seq_printf(m, "0x%08lx-0x%08lx: 0x%08lx: used\n", |
774 | entry->start, entry->start + entry->size, | 783 | entry->start, entry->start + entry->size, |
775 | entry->size); | 784 | entry->size); |
776 | total_used += entry->size; | 785 | total_used += entry->size; |
777 | if (entry->hole_follows) { | 786 | total_free += drm_mm_dump_hole(m, entry); |
778 | hole_start = drm_mm_hole_node_start(entry); | ||
779 | hole_end = drm_mm_hole_node_end(entry); | ||
780 | hole_size = hole_end - hole_start; | ||
781 | seq_printf(m, "0x%08lx-0x%08lx: 0x%08lx: free\n", | ||
782 | hole_start, hole_end, hole_size); | ||
783 | total_free += hole_size; | ||
784 | } | ||
785 | } | 787 | } |
786 | total = total_free + total_used; | 788 | total = total_free + total_used; |
787 | 789 | ||
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c index faa79df02648..a371ff865a88 100644 --- a/drivers/gpu/drm/drm_modes.c +++ b/drivers/gpu/drm/drm_modes.c | |||
@@ -1143,6 +1143,7 @@ bool drm_mode_parse_command_line_for_connector(const char *mode_option, | |||
1143 | was_digit = false; | 1143 | was_digit = false; |
1144 | } else | 1144 | } else |
1145 | goto done; | 1145 | goto done; |
1146 | break; | ||
1146 | case '0' ... '9': | 1147 | case '0' ... '9': |
1147 | was_digit = true; | 1148 | was_digit = true; |
1148 | break; | 1149 | break; |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 6be940effefd..6165535d15f0 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -1045,6 +1045,8 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, | |||
1045 | if (timeout) { | 1045 | if (timeout) { |
1046 | struct timespec sleep_time = timespec_sub(now, before); | 1046 | struct timespec sleep_time = timespec_sub(now, before); |
1047 | *timeout = timespec_sub(*timeout, sleep_time); | 1047 | *timeout = timespec_sub(*timeout, sleep_time); |
1048 | if (!timespec_valid(timeout)) /* i.e. negative time remains */ | ||
1049 | set_normalized_timespec(timeout, 0, 0); | ||
1048 | } | 1050 | } |
1049 | 1051 | ||
1050 | switch (end) { | 1052 | switch (end) { |
@@ -1053,8 +1055,6 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, | |||
1053 | case -ERESTARTSYS: /* Signal */ | 1055 | case -ERESTARTSYS: /* Signal */ |
1054 | return (int)end; | 1056 | return (int)end; |
1055 | case 0: /* Timeout */ | 1057 | case 0: /* Timeout */ |
1056 | if (timeout) | ||
1057 | set_normalized_timespec(timeout, 0, 0); | ||
1058 | return -ETIME; | 1058 | return -ETIME; |
1059 | default: /* Completed */ | 1059 | default: /* Completed */ |
1060 | WARN_ON(end < 0); /* We're not aware of other errors */ | 1060 | WARN_ON(end < 0); /* We're not aware of other errors */ |
@@ -2377,10 +2377,8 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file) | |||
2377 | mutex_unlock(&dev->struct_mutex); | 2377 | mutex_unlock(&dev->struct_mutex); |
2378 | 2378 | ||
2379 | ret = __wait_seqno(ring, seqno, reset_counter, true, timeout); | 2379 | ret = __wait_seqno(ring, seqno, reset_counter, true, timeout); |
2380 | if (timeout) { | 2380 | if (timeout) |
2381 | WARN_ON(!timespec_valid(timeout)); | ||
2382 | args->timeout_ns = timespec_to_ns(timeout); | 2381 | args->timeout_ns = timespec_to_ns(timeout); |
2383 | } | ||
2384 | return ret; | 2382 | return ret; |
2385 | 2383 | ||
2386 | out: | 2384 | out: |
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index dca614de71b6..bdb0d7717bc7 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c | |||
@@ -709,15 +709,6 @@ static inline size_t gen6_get_stolen_size(u16 snb_gmch_ctl) | |||
709 | return snb_gmch_ctl << 25; /* 32 MB units */ | 709 | return snb_gmch_ctl << 25; /* 32 MB units */ |
710 | } | 710 | } |
711 | 711 | ||
712 | static inline size_t gen7_get_stolen_size(u16 snb_gmch_ctl) | ||
713 | { | ||
714 | static const int stolen_decoder[] = { | ||
715 | 0, 0, 0, 0, 0, 32, 48, 64, 128, 256, 96, 160, 224, 352}; | ||
716 | snb_gmch_ctl >>= IVB_GMCH_GMS_SHIFT; | ||
717 | snb_gmch_ctl &= IVB_GMCH_GMS_MASK; | ||
718 | return stolen_decoder[snb_gmch_ctl] << 20; | ||
719 | } | ||
720 | |||
721 | static int gen6_gmch_probe(struct drm_device *dev, | 712 | static int gen6_gmch_probe(struct drm_device *dev, |
722 | size_t *gtt_total, | 713 | size_t *gtt_total, |
723 | size_t *stolen, | 714 | size_t *stolen, |
@@ -747,11 +738,7 @@ static int gen6_gmch_probe(struct drm_device *dev, | |||
747 | pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl); | 738 | pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl); |
748 | gtt_size = gen6_get_total_gtt_size(snb_gmch_ctl); | 739 | gtt_size = gen6_get_total_gtt_size(snb_gmch_ctl); |
749 | 740 | ||
750 | if (IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) | 741 | *stolen = gen6_get_stolen_size(snb_gmch_ctl); |
751 | *stolen = gen7_get_stolen_size(snb_gmch_ctl); | ||
752 | else | ||
753 | *stolen = gen6_get_stolen_size(snb_gmch_ctl); | ||
754 | |||
755 | *gtt_total = (gtt_size / sizeof(gen6_gtt_pte_t)) << PAGE_SHIFT; | 742 | *gtt_total = (gtt_size / sizeof(gen6_gtt_pte_t)) << PAGE_SHIFT; |
756 | 743 | ||
757 | /* For Modern GENs the PTEs and register space are split in the BAR */ | 744 | /* For Modern GENs the PTEs and register space are split in the BAR */ |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 83f9c26e1adb..2d6b62e42daf 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -46,8 +46,6 @@ | |||
46 | #define SNB_GMCH_GGMS_MASK 0x3 | 46 | #define SNB_GMCH_GGMS_MASK 0x3 |
47 | #define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */ | 47 | #define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */ |
48 | #define SNB_GMCH_GMS_MASK 0x1f | 48 | #define SNB_GMCH_GMS_MASK 0x1f |
49 | #define IVB_GMCH_GMS_SHIFT 4 | ||
50 | #define IVB_GMCH_GMS_MASK 0xf | ||
51 | 49 | ||
52 | 50 | ||
53 | /* PCI config space */ | 51 | /* PCI config space */ |
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 26a0a570f92e..fb961bb81903 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c | |||
@@ -1265,6 +1265,8 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder) | |||
1265 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); | 1265 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); |
1266 | intel_dp_start_link_train(intel_dp); | 1266 | intel_dp_start_link_train(intel_dp); |
1267 | intel_dp_complete_link_train(intel_dp); | 1267 | intel_dp_complete_link_train(intel_dp); |
1268 | if (port != PORT_A) | ||
1269 | intel_dp_stop_link_train(intel_dp); | ||
1268 | } | 1270 | } |
1269 | } | 1271 | } |
1270 | 1272 | ||
@@ -1326,6 +1328,9 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder) | |||
1326 | } else if (type == INTEL_OUTPUT_EDP) { | 1328 | } else if (type == INTEL_OUTPUT_EDP) { |
1327 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder); | 1329 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder); |
1328 | 1330 | ||
1331 | if (port == PORT_A) | ||
1332 | intel_dp_stop_link_train(intel_dp); | ||
1333 | |||
1329 | ironlake_edp_backlight_on(intel_dp); | 1334 | ironlake_edp_backlight_on(intel_dp); |
1330 | } | 1335 | } |
1331 | 1336 | ||
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index fb2fbc1e08b9..3d704b706a8d 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -702,6 +702,9 @@ intel_dp_compute_config(struct intel_encoder *encoder, | |||
702 | /* Walk through all bpp values. Luckily they're all nicely spaced with 2 | 702 | /* Walk through all bpp values. Luckily they're all nicely spaced with 2 |
703 | * bpc in between. */ | 703 | * bpc in between. */ |
704 | bpp = min_t(int, 8*3, pipe_config->pipe_bpp); | 704 | bpp = min_t(int, 8*3, pipe_config->pipe_bpp); |
705 | if (is_edp(intel_dp) && dev_priv->edp.bpp) | ||
706 | bpp = min_t(int, bpp, dev_priv->edp.bpp); | ||
707 | |||
705 | for (; bpp >= 6*3; bpp -= 2*3) { | 708 | for (; bpp >= 6*3; bpp -= 2*3) { |
706 | mode_rate = intel_dp_link_required(target_clock, bpp); | 709 | mode_rate = intel_dp_link_required(target_clock, bpp); |
707 | 710 | ||
@@ -739,6 +742,7 @@ found: | |||
739 | intel_dp->link_bw = bws[clock]; | 742 | intel_dp->link_bw = bws[clock]; |
740 | intel_dp->lane_count = lane_count; | 743 | intel_dp->lane_count = lane_count; |
741 | adjusted_mode->clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw); | 744 | adjusted_mode->clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw); |
745 | pipe_config->pipe_bpp = bpp; | ||
742 | pipe_config->pixel_target_clock = target_clock; | 746 | pipe_config->pixel_target_clock = target_clock; |
743 | 747 | ||
744 | DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n", | 748 | DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n", |
@@ -751,20 +755,6 @@ found: | |||
751 | target_clock, adjusted_mode->clock, | 755 | target_clock, adjusted_mode->clock, |
752 | &pipe_config->dp_m_n); | 756 | &pipe_config->dp_m_n); |
753 | 757 | ||
754 | /* | ||
755 | * XXX: We have a strange regression where using the vbt edp bpp value | ||
756 | * for the link bw computation results in black screens, the panel only | ||
757 | * works when we do the computation at the usual 24bpp (but still | ||
758 | * requires us to use 18bpp). Until that's fully debugged, stay | ||
759 | * bug-for-bug compatible with the old code. | ||
760 | */ | ||
761 | if (is_edp(intel_dp) && dev_priv->edp.bpp) { | ||
762 | DRM_DEBUG_KMS("clamping display bpc (was %d) to eDP (%d)\n", | ||
763 | bpp, dev_priv->edp.bpp); | ||
764 | bpp = min_t(int, bpp, dev_priv->edp.bpp); | ||
765 | } | ||
766 | pipe_config->pipe_bpp = bpp; | ||
767 | |||
768 | return true; | 758 | return true; |
769 | } | 759 | } |
770 | 760 | ||
@@ -1389,6 +1379,7 @@ static void intel_enable_dp(struct intel_encoder *encoder) | |||
1389 | ironlake_edp_panel_on(intel_dp); | 1379 | ironlake_edp_panel_on(intel_dp); |
1390 | ironlake_edp_panel_vdd_off(intel_dp, true); | 1380 | ironlake_edp_panel_vdd_off(intel_dp, true); |
1391 | intel_dp_complete_link_train(intel_dp); | 1381 | intel_dp_complete_link_train(intel_dp); |
1382 | intel_dp_stop_link_train(intel_dp); | ||
1392 | ironlake_edp_backlight_on(intel_dp); | 1383 | ironlake_edp_backlight_on(intel_dp); |
1393 | } | 1384 | } |
1394 | 1385 | ||
@@ -1711,10 +1702,9 @@ intel_dp_set_link_train(struct intel_dp *intel_dp, | |||
1711 | struct drm_i915_private *dev_priv = dev->dev_private; | 1702 | struct drm_i915_private *dev_priv = dev->dev_private; |
1712 | enum port port = intel_dig_port->port; | 1703 | enum port port = intel_dig_port->port; |
1713 | int ret; | 1704 | int ret; |
1714 | uint32_t temp; | ||
1715 | 1705 | ||
1716 | if (HAS_DDI(dev)) { | 1706 | if (HAS_DDI(dev)) { |
1717 | temp = I915_READ(DP_TP_CTL(port)); | 1707 | uint32_t temp = I915_READ(DP_TP_CTL(port)); |
1718 | 1708 | ||
1719 | if (dp_train_pat & DP_LINK_SCRAMBLING_DISABLE) | 1709 | if (dp_train_pat & DP_LINK_SCRAMBLING_DISABLE) |
1720 | temp |= DP_TP_CTL_SCRAMBLE_DISABLE; | 1710 | temp |= DP_TP_CTL_SCRAMBLE_DISABLE; |
@@ -1724,18 +1714,6 @@ intel_dp_set_link_train(struct intel_dp *intel_dp, | |||
1724 | temp &= ~DP_TP_CTL_LINK_TRAIN_MASK; | 1714 | temp &= ~DP_TP_CTL_LINK_TRAIN_MASK; |
1725 | switch (dp_train_pat & DP_TRAINING_PATTERN_MASK) { | 1715 | switch (dp_train_pat & DP_TRAINING_PATTERN_MASK) { |
1726 | case DP_TRAINING_PATTERN_DISABLE: | 1716 | case DP_TRAINING_PATTERN_DISABLE: |
1727 | |||
1728 | if (port != PORT_A) { | ||
1729 | temp |= DP_TP_CTL_LINK_TRAIN_IDLE; | ||
1730 | I915_WRITE(DP_TP_CTL(port), temp); | ||
1731 | |||
1732 | if (wait_for((I915_READ(DP_TP_STATUS(port)) & | ||
1733 | DP_TP_STATUS_IDLE_DONE), 1)) | ||
1734 | DRM_ERROR("Timed out waiting for DP idle patterns\n"); | ||
1735 | |||
1736 | temp &= ~DP_TP_CTL_LINK_TRAIN_MASK; | ||
1737 | } | ||
1738 | |||
1739 | temp |= DP_TP_CTL_LINK_TRAIN_NORMAL; | 1717 | temp |= DP_TP_CTL_LINK_TRAIN_NORMAL; |
1740 | 1718 | ||
1741 | break; | 1719 | break; |
@@ -1811,6 +1789,37 @@ intel_dp_set_link_train(struct intel_dp *intel_dp, | |||
1811 | return true; | 1789 | return true; |
1812 | } | 1790 | } |
1813 | 1791 | ||
1792 | static void intel_dp_set_idle_link_train(struct intel_dp *intel_dp) | ||
1793 | { | ||
1794 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | ||
1795 | struct drm_device *dev = intel_dig_port->base.base.dev; | ||
1796 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
1797 | enum port port = intel_dig_port->port; | ||
1798 | uint32_t val; | ||
1799 | |||
1800 | if (!HAS_DDI(dev)) | ||
1801 | return; | ||
1802 | |||
1803 | val = I915_READ(DP_TP_CTL(port)); | ||
1804 | val &= ~DP_TP_CTL_LINK_TRAIN_MASK; | ||
1805 | val |= DP_TP_CTL_LINK_TRAIN_IDLE; | ||
1806 | I915_WRITE(DP_TP_CTL(port), val); | ||
1807 | |||
1808 | /* | ||
1809 | * On PORT_A we can have only eDP in SST mode. There the only reason | ||
1810 | * we need to set idle transmission mode is to work around a HW issue | ||
1811 | * where we enable the pipe while not in idle link-training mode. | ||
1812 | * In this case there is requirement to wait for a minimum number of | ||
1813 | * idle patterns to be sent. | ||
1814 | */ | ||
1815 | if (port == PORT_A) | ||
1816 | return; | ||
1817 | |||
1818 | if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_IDLE_DONE), | ||
1819 | 1)) | ||
1820 | DRM_ERROR("Timed out waiting for DP idle patterns\n"); | ||
1821 | } | ||
1822 | |||
1814 | /* Enable corresponding port and start training pattern 1 */ | 1823 | /* Enable corresponding port and start training pattern 1 */ |
1815 | void | 1824 | void |
1816 | intel_dp_start_link_train(struct intel_dp *intel_dp) | 1825 | intel_dp_start_link_train(struct intel_dp *intel_dp) |
@@ -1953,10 +1962,19 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp) | |||
1953 | ++tries; | 1962 | ++tries; |
1954 | } | 1963 | } |
1955 | 1964 | ||
1965 | intel_dp_set_idle_link_train(intel_dp); | ||
1966 | |||
1967 | intel_dp->DP = DP; | ||
1968 | |||
1956 | if (channel_eq) | 1969 | if (channel_eq) |
1957 | DRM_DEBUG_KMS("Channel EQ done. DP Training successful\n"); | 1970 | DRM_DEBUG_KMS("Channel EQ done. DP Training successful\n"); |
1958 | 1971 | ||
1959 | intel_dp_set_link_train(intel_dp, DP, DP_TRAINING_PATTERN_DISABLE); | 1972 | } |
1973 | |||
1974 | void intel_dp_stop_link_train(struct intel_dp *intel_dp) | ||
1975 | { | ||
1976 | intel_dp_set_link_train(intel_dp, intel_dp->DP, | ||
1977 | DP_TRAINING_PATTERN_DISABLE); | ||
1960 | } | 1978 | } |
1961 | 1979 | ||
1962 | static void | 1980 | static void |
@@ -2164,6 +2182,7 @@ intel_dp_check_link_status(struct intel_dp *intel_dp) | |||
2164 | drm_get_encoder_name(&intel_encoder->base)); | 2182 | drm_get_encoder_name(&intel_encoder->base)); |
2165 | intel_dp_start_link_train(intel_dp); | 2183 | intel_dp_start_link_train(intel_dp); |
2166 | intel_dp_complete_link_train(intel_dp); | 2184 | intel_dp_complete_link_train(intel_dp); |
2185 | intel_dp_stop_link_train(intel_dp); | ||
2167 | } | 2186 | } |
2168 | } | 2187 | } |
2169 | 2188 | ||
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index b5b6d19e6dd3..624a9e6b8d71 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -499,6 +499,7 @@ extern void intel_dp_init_connector(struct intel_digital_port *intel_dig_port, | |||
499 | extern void intel_dp_init_link_config(struct intel_dp *intel_dp); | 499 | extern void intel_dp_init_link_config(struct intel_dp *intel_dp); |
500 | extern void intel_dp_start_link_train(struct intel_dp *intel_dp); | 500 | extern void intel_dp_start_link_train(struct intel_dp *intel_dp); |
501 | extern void intel_dp_complete_link_train(struct intel_dp *intel_dp); | 501 | extern void intel_dp_complete_link_train(struct intel_dp *intel_dp); |
502 | extern void intel_dp_stop_link_train(struct intel_dp *intel_dp); | ||
502 | extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); | 503 | extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); |
503 | extern void intel_dp_encoder_destroy(struct drm_encoder *encoder); | 504 | extern void intel_dp_encoder_destroy(struct drm_encoder *encoder); |
504 | extern void intel_dp_check_link_status(struct intel_dp *intel_dp); | 505 | extern void intel_dp_check_link_status(struct intel_dp *intel_dp); |
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c index 0e19e575a1b4..6b7c3ca2c035 100644 --- a/drivers/gpu/drm/i915/intel_fb.c +++ b/drivers/gpu/drm/i915/intel_fb.c | |||
@@ -262,10 +262,22 @@ void intel_fbdev_fini(struct drm_device *dev) | |||
262 | void intel_fbdev_set_suspend(struct drm_device *dev, int state) | 262 | void intel_fbdev_set_suspend(struct drm_device *dev, int state) |
263 | { | 263 | { |
264 | drm_i915_private_t *dev_priv = dev->dev_private; | 264 | drm_i915_private_t *dev_priv = dev->dev_private; |
265 | if (!dev_priv->fbdev) | 265 | struct intel_fbdev *ifbdev = dev_priv->fbdev; |
266 | struct fb_info *info; | ||
267 | |||
268 | if (!ifbdev) | ||
266 | return; | 269 | return; |
267 | 270 | ||
268 | fb_set_suspend(dev_priv->fbdev->helper.fbdev, state); | 271 | info = ifbdev->helper.fbdev; |
272 | |||
273 | /* On resume from hibernation: If the object is shmemfs backed, it has | ||
274 | * been restored from swap. If the object is stolen however, it will be | ||
275 | * full of whatever garbage was left in there. | ||
276 | */ | ||
277 | if (!state && ifbdev->ifb.obj->stolen) | ||
278 | memset_io(info->screen_base, 0, info->screen_size); | ||
279 | |||
280 | fb_set_suspend(info, state); | ||
269 | } | 281 | } |
270 | 282 | ||
271 | MODULE_LICENSE("GPL and additional rights"); | 283 | MODULE_LICENSE("GPL and additional rights"); |
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index de3b0dc5658b..aa01128ff192 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -1301,17 +1301,17 @@ static void valleyview_update_wm(struct drm_device *dev) | |||
1301 | 1301 | ||
1302 | vlv_update_drain_latency(dev); | 1302 | vlv_update_drain_latency(dev); |
1303 | 1303 | ||
1304 | if (g4x_compute_wm0(dev, 0, | 1304 | if (g4x_compute_wm0(dev, PIPE_A, |
1305 | &valleyview_wm_info, latency_ns, | 1305 | &valleyview_wm_info, latency_ns, |
1306 | &valleyview_cursor_wm_info, latency_ns, | 1306 | &valleyview_cursor_wm_info, latency_ns, |
1307 | &planea_wm, &cursora_wm)) | 1307 | &planea_wm, &cursora_wm)) |
1308 | enabled |= 1; | 1308 | enabled |= 1 << PIPE_A; |
1309 | 1309 | ||
1310 | if (g4x_compute_wm0(dev, 1, | 1310 | if (g4x_compute_wm0(dev, PIPE_B, |
1311 | &valleyview_wm_info, latency_ns, | 1311 | &valleyview_wm_info, latency_ns, |
1312 | &valleyview_cursor_wm_info, latency_ns, | 1312 | &valleyview_cursor_wm_info, latency_ns, |
1313 | &planeb_wm, &cursorb_wm)) | 1313 | &planeb_wm, &cursorb_wm)) |
1314 | enabled |= 2; | 1314 | enabled |= 1 << PIPE_B; |
1315 | 1315 | ||
1316 | if (single_plane_enabled(enabled) && | 1316 | if (single_plane_enabled(enabled) && |
1317 | g4x_compute_srwm(dev, ffs(enabled) - 1, | 1317 | g4x_compute_srwm(dev, ffs(enabled) - 1, |
@@ -1357,17 +1357,17 @@ static void g4x_update_wm(struct drm_device *dev) | |||
1357 | int plane_sr, cursor_sr; | 1357 | int plane_sr, cursor_sr; |
1358 | unsigned int enabled = 0; | 1358 | unsigned int enabled = 0; |
1359 | 1359 | ||
1360 | if (g4x_compute_wm0(dev, 0, | 1360 | if (g4x_compute_wm0(dev, PIPE_A, |
1361 | &g4x_wm_info, latency_ns, | 1361 | &g4x_wm_info, latency_ns, |
1362 | &g4x_cursor_wm_info, latency_ns, | 1362 | &g4x_cursor_wm_info, latency_ns, |
1363 | &planea_wm, &cursora_wm)) | 1363 | &planea_wm, &cursora_wm)) |
1364 | enabled |= 1; | 1364 | enabled |= 1 << PIPE_A; |
1365 | 1365 | ||
1366 | if (g4x_compute_wm0(dev, 1, | 1366 | if (g4x_compute_wm0(dev, PIPE_B, |
1367 | &g4x_wm_info, latency_ns, | 1367 | &g4x_wm_info, latency_ns, |
1368 | &g4x_cursor_wm_info, latency_ns, | 1368 | &g4x_cursor_wm_info, latency_ns, |
1369 | &planeb_wm, &cursorb_wm)) | 1369 | &planeb_wm, &cursorb_wm)) |
1370 | enabled |= 2; | 1370 | enabled |= 1 << PIPE_B; |
1371 | 1371 | ||
1372 | if (single_plane_enabled(enabled) && | 1372 | if (single_plane_enabled(enabled) && |
1373 | g4x_compute_srwm(dev, ffs(enabled) - 1, | 1373 | g4x_compute_srwm(dev, ffs(enabled) - 1, |
@@ -1716,7 +1716,7 @@ static void ironlake_update_wm(struct drm_device *dev) | |||
1716 | unsigned int enabled; | 1716 | unsigned int enabled; |
1717 | 1717 | ||
1718 | enabled = 0; | 1718 | enabled = 0; |
1719 | if (g4x_compute_wm0(dev, 0, | 1719 | if (g4x_compute_wm0(dev, PIPE_A, |
1720 | &ironlake_display_wm_info, | 1720 | &ironlake_display_wm_info, |
1721 | ILK_LP0_PLANE_LATENCY, | 1721 | ILK_LP0_PLANE_LATENCY, |
1722 | &ironlake_cursor_wm_info, | 1722 | &ironlake_cursor_wm_info, |
@@ -1727,10 +1727,10 @@ static void ironlake_update_wm(struct drm_device *dev) | |||
1727 | DRM_DEBUG_KMS("FIFO watermarks For pipe A -" | 1727 | DRM_DEBUG_KMS("FIFO watermarks For pipe A -" |
1728 | " plane %d, " "cursor: %d\n", | 1728 | " plane %d, " "cursor: %d\n", |
1729 | plane_wm, cursor_wm); | 1729 | plane_wm, cursor_wm); |
1730 | enabled |= 1; | 1730 | enabled |= 1 << PIPE_A; |
1731 | } | 1731 | } |
1732 | 1732 | ||
1733 | if (g4x_compute_wm0(dev, 1, | 1733 | if (g4x_compute_wm0(dev, PIPE_B, |
1734 | &ironlake_display_wm_info, | 1734 | &ironlake_display_wm_info, |
1735 | ILK_LP0_PLANE_LATENCY, | 1735 | ILK_LP0_PLANE_LATENCY, |
1736 | &ironlake_cursor_wm_info, | 1736 | &ironlake_cursor_wm_info, |
@@ -1741,7 +1741,7 @@ static void ironlake_update_wm(struct drm_device *dev) | |||
1741 | DRM_DEBUG_KMS("FIFO watermarks For pipe B -" | 1741 | DRM_DEBUG_KMS("FIFO watermarks For pipe B -" |
1742 | " plane %d, cursor: %d\n", | 1742 | " plane %d, cursor: %d\n", |
1743 | plane_wm, cursor_wm); | 1743 | plane_wm, cursor_wm); |
1744 | enabled |= 2; | 1744 | enabled |= 1 << PIPE_B; |
1745 | } | 1745 | } |
1746 | 1746 | ||
1747 | /* | 1747 | /* |
@@ -1801,7 +1801,7 @@ static void sandybridge_update_wm(struct drm_device *dev) | |||
1801 | unsigned int enabled; | 1801 | unsigned int enabled; |
1802 | 1802 | ||
1803 | enabled = 0; | 1803 | enabled = 0; |
1804 | if (g4x_compute_wm0(dev, 0, | 1804 | if (g4x_compute_wm0(dev, PIPE_A, |
1805 | &sandybridge_display_wm_info, latency, | 1805 | &sandybridge_display_wm_info, latency, |
1806 | &sandybridge_cursor_wm_info, latency, | 1806 | &sandybridge_cursor_wm_info, latency, |
1807 | &plane_wm, &cursor_wm)) { | 1807 | &plane_wm, &cursor_wm)) { |
@@ -1812,10 +1812,10 @@ static void sandybridge_update_wm(struct drm_device *dev) | |||
1812 | DRM_DEBUG_KMS("FIFO watermarks For pipe A -" | 1812 | DRM_DEBUG_KMS("FIFO watermarks For pipe A -" |
1813 | " plane %d, " "cursor: %d\n", | 1813 | " plane %d, " "cursor: %d\n", |
1814 | plane_wm, cursor_wm); | 1814 | plane_wm, cursor_wm); |
1815 | enabled |= 1; | 1815 | enabled |= 1 << PIPE_A; |
1816 | } | 1816 | } |
1817 | 1817 | ||
1818 | if (g4x_compute_wm0(dev, 1, | 1818 | if (g4x_compute_wm0(dev, PIPE_B, |
1819 | &sandybridge_display_wm_info, latency, | 1819 | &sandybridge_display_wm_info, latency, |
1820 | &sandybridge_cursor_wm_info, latency, | 1820 | &sandybridge_cursor_wm_info, latency, |
1821 | &plane_wm, &cursor_wm)) { | 1821 | &plane_wm, &cursor_wm)) { |
@@ -1826,7 +1826,7 @@ static void sandybridge_update_wm(struct drm_device *dev) | |||
1826 | DRM_DEBUG_KMS("FIFO watermarks For pipe B -" | 1826 | DRM_DEBUG_KMS("FIFO watermarks For pipe B -" |
1827 | " plane %d, cursor: %d\n", | 1827 | " plane %d, cursor: %d\n", |
1828 | plane_wm, cursor_wm); | 1828 | plane_wm, cursor_wm); |
1829 | enabled |= 2; | 1829 | enabled |= 1 << PIPE_B; |
1830 | } | 1830 | } |
1831 | 1831 | ||
1832 | /* | 1832 | /* |
@@ -1904,7 +1904,7 @@ static void ivybridge_update_wm(struct drm_device *dev) | |||
1904 | unsigned int enabled; | 1904 | unsigned int enabled; |
1905 | 1905 | ||
1906 | enabled = 0; | 1906 | enabled = 0; |
1907 | if (g4x_compute_wm0(dev, 0, | 1907 | if (g4x_compute_wm0(dev, PIPE_A, |
1908 | &sandybridge_display_wm_info, latency, | 1908 | &sandybridge_display_wm_info, latency, |
1909 | &sandybridge_cursor_wm_info, latency, | 1909 | &sandybridge_cursor_wm_info, latency, |
1910 | &plane_wm, &cursor_wm)) { | 1910 | &plane_wm, &cursor_wm)) { |
@@ -1915,10 +1915,10 @@ static void ivybridge_update_wm(struct drm_device *dev) | |||
1915 | DRM_DEBUG_KMS("FIFO watermarks For pipe A -" | 1915 | DRM_DEBUG_KMS("FIFO watermarks For pipe A -" |
1916 | " plane %d, " "cursor: %d\n", | 1916 | " plane %d, " "cursor: %d\n", |
1917 | plane_wm, cursor_wm); | 1917 | plane_wm, cursor_wm); |
1918 | enabled |= 1; | 1918 | enabled |= 1 << PIPE_A; |
1919 | } | 1919 | } |
1920 | 1920 | ||
1921 | if (g4x_compute_wm0(dev, 1, | 1921 | if (g4x_compute_wm0(dev, PIPE_B, |
1922 | &sandybridge_display_wm_info, latency, | 1922 | &sandybridge_display_wm_info, latency, |
1923 | &sandybridge_cursor_wm_info, latency, | 1923 | &sandybridge_cursor_wm_info, latency, |
1924 | &plane_wm, &cursor_wm)) { | 1924 | &plane_wm, &cursor_wm)) { |
@@ -1929,10 +1929,10 @@ static void ivybridge_update_wm(struct drm_device *dev) | |||
1929 | DRM_DEBUG_KMS("FIFO watermarks For pipe B -" | 1929 | DRM_DEBUG_KMS("FIFO watermarks For pipe B -" |
1930 | " plane %d, cursor: %d\n", | 1930 | " plane %d, cursor: %d\n", |
1931 | plane_wm, cursor_wm); | 1931 | plane_wm, cursor_wm); |
1932 | enabled |= 2; | 1932 | enabled |= 1 << PIPE_B; |
1933 | } | 1933 | } |
1934 | 1934 | ||
1935 | if (g4x_compute_wm0(dev, 2, | 1935 | if (g4x_compute_wm0(dev, PIPE_C, |
1936 | &sandybridge_display_wm_info, latency, | 1936 | &sandybridge_display_wm_info, latency, |
1937 | &sandybridge_cursor_wm_info, latency, | 1937 | &sandybridge_cursor_wm_info, latency, |
1938 | &plane_wm, &cursor_wm)) { | 1938 | &plane_wm, &cursor_wm)) { |
@@ -1943,7 +1943,7 @@ static void ivybridge_update_wm(struct drm_device *dev) | |||
1943 | DRM_DEBUG_KMS("FIFO watermarks For pipe C -" | 1943 | DRM_DEBUG_KMS("FIFO watermarks For pipe C -" |
1944 | " plane %d, cursor: %d\n", | 1944 | " plane %d, cursor: %d\n", |
1945 | plane_wm, cursor_wm); | 1945 | plane_wm, cursor_wm); |
1946 | enabled |= 3; | 1946 | enabled |= 1 << PIPE_C; |
1947 | } | 1947 | } |
1948 | 1948 | ||
1949 | /* | 1949 | /* |
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index f9889658329b..77b8a45fb10a 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c | |||
@@ -46,29 +46,26 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc) | |||
46 | 46 | ||
47 | static inline void mga_wait_vsync(struct mga_device *mdev) | 47 | static inline void mga_wait_vsync(struct mga_device *mdev) |
48 | { | 48 | { |
49 | unsigned int count = 0; | 49 | unsigned long timeout = jiffies + HZ/10; |
50 | unsigned int status = 0; | 50 | unsigned int status = 0; |
51 | 51 | ||
52 | do { | 52 | do { |
53 | status = RREG32(MGAREG_Status); | 53 | status = RREG32(MGAREG_Status); |
54 | count++; | 54 | } while ((status & 0x08) && time_before(jiffies, timeout)); |
55 | } while ((status & 0x08) && (count < 250000)); | 55 | timeout = jiffies + HZ/10; |
56 | count = 0; | ||
57 | status = 0; | 56 | status = 0; |
58 | do { | 57 | do { |
59 | status = RREG32(MGAREG_Status); | 58 | status = RREG32(MGAREG_Status); |
60 | count++; | 59 | } while (!(status & 0x08) && time_before(jiffies, timeout)); |
61 | } while (!(status & 0x08) && (count < 250000)); | ||
62 | } | 60 | } |
63 | 61 | ||
64 | static inline void mga_wait_busy(struct mga_device *mdev) | 62 | static inline void mga_wait_busy(struct mga_device *mdev) |
65 | { | 63 | { |
66 | unsigned int count = 0; | 64 | unsigned long timeout = jiffies + HZ; |
67 | unsigned int status = 0; | 65 | unsigned int status = 0; |
68 | do { | 66 | do { |
69 | status = RREG8(MGAREG_Status + 2); | 67 | status = RREG8(MGAREG_Status + 2); |
70 | count++; | 68 | } while ((status & 0x01) && time_before(jiffies, timeout)); |
71 | } while ((status & 0x01) && (count < 500000)); | ||
72 | } | 69 | } |
73 | 70 | ||
74 | /* | 71 | /* |
@@ -189,12 +186,12 @@ static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) | |||
189 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 186 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
190 | tmp = RREG8(DAC_DATA); | 187 | tmp = RREG8(DAC_DATA); |
191 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; | 188 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; |
192 | WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp); | 189 | WREG8(DAC_DATA, tmp); |
193 | 190 | ||
194 | WREG8(DAC_INDEX, MGA1064_REMHEADCTL); | 191 | WREG8(DAC_INDEX, MGA1064_REMHEADCTL); |
195 | tmp = RREG8(DAC_DATA); | 192 | tmp = RREG8(DAC_DATA); |
196 | tmp |= MGA1064_REMHEADCTL_CLKDIS; | 193 | tmp |= MGA1064_REMHEADCTL_CLKDIS; |
197 | WREG_DAC(MGA1064_REMHEADCTL, tmp); | 194 | WREG8(DAC_DATA, tmp); |
198 | 195 | ||
199 | /* select PLL Set C */ | 196 | /* select PLL Set C */ |
200 | tmp = RREG8(MGAREG_MEM_MISC_READ); | 197 | tmp = RREG8(MGAREG_MEM_MISC_READ); |
@@ -204,7 +201,7 @@ static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) | |||
204 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 201 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
205 | tmp = RREG8(DAC_DATA); | 202 | tmp = RREG8(DAC_DATA); |
206 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN | 0x80; | 203 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN | 0x80; |
207 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 204 | WREG8(DAC_DATA, tmp); |
208 | 205 | ||
209 | udelay(500); | 206 | udelay(500); |
210 | 207 | ||
@@ -212,7 +209,7 @@ static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) | |||
212 | WREG8(DAC_INDEX, MGA1064_VREF_CTL); | 209 | WREG8(DAC_INDEX, MGA1064_VREF_CTL); |
213 | tmp = RREG8(DAC_DATA); | 210 | tmp = RREG8(DAC_DATA); |
214 | tmp &= ~0x04; | 211 | tmp &= ~0x04; |
215 | WREG_DAC(MGA1064_VREF_CTL, tmp); | 212 | WREG8(DAC_DATA, tmp); |
216 | 213 | ||
217 | udelay(50); | 214 | udelay(50); |
218 | 215 | ||
@@ -236,13 +233,13 @@ static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) | |||
236 | tmp = RREG8(DAC_DATA); | 233 | tmp = RREG8(DAC_DATA); |
237 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; | 234 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; |
238 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; | 235 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; |
239 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 236 | WREG8(DAC_DATA, tmp); |
240 | 237 | ||
241 | WREG8(DAC_INDEX, MGA1064_REMHEADCTL); | 238 | WREG8(DAC_INDEX, MGA1064_REMHEADCTL); |
242 | tmp = RREG8(DAC_DATA); | 239 | tmp = RREG8(DAC_DATA); |
243 | tmp &= ~MGA1064_REMHEADCTL_CLKSL_MSK; | 240 | tmp &= ~MGA1064_REMHEADCTL_CLKSL_MSK; |
244 | tmp |= MGA1064_REMHEADCTL_CLKSL_PLL; | 241 | tmp |= MGA1064_REMHEADCTL_CLKSL_PLL; |
245 | WREG_DAC(MGA1064_REMHEADCTL, tmp); | 242 | WREG8(DAC_DATA, tmp); |
246 | 243 | ||
247 | /* reset dotclock rate bit */ | 244 | /* reset dotclock rate bit */ |
248 | WREG8(MGAREG_SEQ_INDEX, 1); | 245 | WREG8(MGAREG_SEQ_INDEX, 1); |
@@ -253,7 +250,7 @@ static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) | |||
253 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 250 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
254 | tmp = RREG8(DAC_DATA); | 251 | tmp = RREG8(DAC_DATA); |
255 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; | 252 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; |
256 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 253 | WREG8(DAC_DATA, tmp); |
257 | 254 | ||
258 | vcount = RREG8(MGAREG_VCOUNT); | 255 | vcount = RREG8(MGAREG_VCOUNT); |
259 | 256 | ||
@@ -318,7 +315,7 @@ static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) | |||
318 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 315 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
319 | tmp = RREG8(DAC_DATA); | 316 | tmp = RREG8(DAC_DATA); |
320 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; | 317 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; |
321 | WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp); | 318 | WREG8(DAC_DATA, tmp); |
322 | 319 | ||
323 | tmp = RREG8(MGAREG_MEM_MISC_READ); | 320 | tmp = RREG8(MGAREG_MEM_MISC_READ); |
324 | tmp |= 0x3 << 2; | 321 | tmp |= 0x3 << 2; |
@@ -326,12 +323,12 @@ static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) | |||
326 | 323 | ||
327 | WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT); | 324 | WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT); |
328 | tmp = RREG8(DAC_DATA); | 325 | tmp = RREG8(DAC_DATA); |
329 | WREG_DAC(MGA1064_PIX_PLL_STAT, tmp & ~0x40); | 326 | WREG8(DAC_DATA, tmp & ~0x40); |
330 | 327 | ||
331 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 328 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
332 | tmp = RREG8(DAC_DATA); | 329 | tmp = RREG8(DAC_DATA); |
333 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; | 330 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; |
334 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 331 | WREG8(DAC_DATA, tmp); |
335 | 332 | ||
336 | WREG_DAC(MGA1064_EV_PIX_PLLC_M, m); | 333 | WREG_DAC(MGA1064_EV_PIX_PLLC_M, m); |
337 | WREG_DAC(MGA1064_EV_PIX_PLLC_N, n); | 334 | WREG_DAC(MGA1064_EV_PIX_PLLC_N, n); |
@@ -342,7 +339,7 @@ static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) | |||
342 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 339 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
343 | tmp = RREG8(DAC_DATA); | 340 | tmp = RREG8(DAC_DATA); |
344 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; | 341 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; |
345 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 342 | WREG8(DAC_DATA, tmp); |
346 | 343 | ||
347 | udelay(500); | 344 | udelay(500); |
348 | 345 | ||
@@ -350,11 +347,11 @@ static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) | |||
350 | tmp = RREG8(DAC_DATA); | 347 | tmp = RREG8(DAC_DATA); |
351 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; | 348 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; |
352 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; | 349 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; |
353 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 350 | WREG8(DAC_DATA, tmp); |
354 | 351 | ||
355 | WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT); | 352 | WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT); |
356 | tmp = RREG8(DAC_DATA); | 353 | tmp = RREG8(DAC_DATA); |
357 | WREG_DAC(MGA1064_PIX_PLL_STAT, tmp | 0x40); | 354 | WREG8(DAC_DATA, tmp | 0x40); |
358 | 355 | ||
359 | tmp = RREG8(MGAREG_MEM_MISC_READ); | 356 | tmp = RREG8(MGAREG_MEM_MISC_READ); |
360 | tmp |= (0x3 << 2); | 357 | tmp |= (0x3 << 2); |
@@ -363,7 +360,7 @@ static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) | |||
363 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 360 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
364 | tmp = RREG8(DAC_DATA); | 361 | tmp = RREG8(DAC_DATA); |
365 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; | 362 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; |
366 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 363 | WREG8(DAC_DATA, tmp); |
367 | 364 | ||
368 | return 0; | 365 | return 0; |
369 | } | 366 | } |
@@ -416,7 +413,7 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) | |||
416 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 413 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
417 | tmp = RREG8(DAC_DATA); | 414 | tmp = RREG8(DAC_DATA); |
418 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; | 415 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; |
419 | WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp); | 416 | WREG8(DAC_DATA, tmp); |
420 | 417 | ||
421 | tmp = RREG8(MGAREG_MEM_MISC_READ); | 418 | tmp = RREG8(MGAREG_MEM_MISC_READ); |
422 | tmp |= 0x3 << 2; | 419 | tmp |= 0x3 << 2; |
@@ -425,7 +422,7 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) | |||
425 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 422 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
426 | tmp = RREG8(DAC_DATA); | 423 | tmp = RREG8(DAC_DATA); |
427 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; | 424 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; |
428 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 425 | WREG8(DAC_DATA, tmp); |
429 | 426 | ||
430 | udelay(500); | 427 | udelay(500); |
431 | 428 | ||
@@ -439,13 +436,13 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) | |||
439 | tmp = RREG8(DAC_DATA); | 436 | tmp = RREG8(DAC_DATA); |
440 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; | 437 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; |
441 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; | 438 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; |
442 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 439 | WREG8(DAC_DATA, tmp); |
443 | 440 | ||
444 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 441 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
445 | tmp = RREG8(DAC_DATA); | 442 | tmp = RREG8(DAC_DATA); |
446 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; | 443 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; |
447 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; | 444 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; |
448 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 445 | WREG8(DAC_DATA, tmp); |
449 | 446 | ||
450 | vcount = RREG8(MGAREG_VCOUNT); | 447 | vcount = RREG8(MGAREG_VCOUNT); |
451 | 448 | ||
@@ -515,12 +512,12 @@ static int mga_g200er_set_plls(struct mga_device *mdev, long clock) | |||
515 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 512 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
516 | tmp = RREG8(DAC_DATA); | 513 | tmp = RREG8(DAC_DATA); |
517 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; | 514 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; |
518 | WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp); | 515 | WREG8(DAC_DATA, tmp); |
519 | 516 | ||
520 | WREG8(DAC_INDEX, MGA1064_REMHEADCTL); | 517 | WREG8(DAC_INDEX, MGA1064_REMHEADCTL); |
521 | tmp = RREG8(DAC_DATA); | 518 | tmp = RREG8(DAC_DATA); |
522 | tmp |= MGA1064_REMHEADCTL_CLKDIS; | 519 | tmp |= MGA1064_REMHEADCTL_CLKDIS; |
523 | WREG_DAC(MGA1064_REMHEADCTL, tmp); | 520 | WREG8(DAC_DATA, tmp); |
524 | 521 | ||
525 | tmp = RREG8(MGAREG_MEM_MISC_READ); | 522 | tmp = RREG8(MGAREG_MEM_MISC_READ); |
526 | tmp |= (0x3<<2) | 0xc0; | 523 | tmp |= (0x3<<2) | 0xc0; |
@@ -530,7 +527,7 @@ static int mga_g200er_set_plls(struct mga_device *mdev, long clock) | |||
530 | tmp = RREG8(DAC_DATA); | 527 | tmp = RREG8(DAC_DATA); |
531 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; | 528 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; |
532 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; | 529 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; |
533 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 530 | WREG8(DAC_DATA, tmp); |
534 | 531 | ||
535 | udelay(500); | 532 | udelay(500); |
536 | 533 | ||
@@ -657,12 +654,26 @@ static void mga_g200wb_commit(struct drm_crtc *crtc) | |||
657 | WREG_DAC(MGA1064_GEN_IO_DATA, tmp); | 654 | WREG_DAC(MGA1064_GEN_IO_DATA, tmp); |
658 | } | 655 | } |
659 | 656 | ||
660 | 657 | /* | |
658 | This is how the framebuffer base address is stored in g200 cards: | ||
659 | * Assume @offset is the gpu_addr variable of the framebuffer object | ||
660 | * Then addr is the number of _pixels_ (not bytes) from the start of | ||
661 | VRAM to the first pixel we want to display. (divided by 2 for 32bit | ||
662 | framebuffers) | ||
663 | * addr is stored in the CRTCEXT0, CRTCC and CRTCD registers | ||
664 | addr<20> -> CRTCEXT0<6> | ||
665 | addr<19-16> -> CRTCEXT0<3-0> | ||
666 | addr<15-8> -> CRTCC<7-0> | ||
667 | addr<7-0> -> CRTCD<7-0> | ||
668 | CRTCEXT0 has to be programmed last to trigger an update and make the | ||
669 | new addr variable take effect. | ||
670 | */ | ||
661 | void mga_set_start_address(struct drm_crtc *crtc, unsigned offset) | 671 | void mga_set_start_address(struct drm_crtc *crtc, unsigned offset) |
662 | { | 672 | { |
663 | struct mga_device *mdev = crtc->dev->dev_private; | 673 | struct mga_device *mdev = crtc->dev->dev_private; |
664 | u32 addr; | 674 | u32 addr; |
665 | int count; | 675 | int count; |
676 | u8 crtcext0; | ||
666 | 677 | ||
667 | while (RREG8(0x1fda) & 0x08); | 678 | while (RREG8(0x1fda) & 0x08); |
668 | while (!(RREG8(0x1fda) & 0x08)); | 679 | while (!(RREG8(0x1fda) & 0x08)); |
@@ -670,10 +681,17 @@ void mga_set_start_address(struct drm_crtc *crtc, unsigned offset) | |||
670 | count = RREG8(MGAREG_VCOUNT) + 2; | 681 | count = RREG8(MGAREG_VCOUNT) + 2; |
671 | while (RREG8(MGAREG_VCOUNT) < count); | 682 | while (RREG8(MGAREG_VCOUNT) < count); |
672 | 683 | ||
673 | addr = offset >> 2; | 684 | WREG8(MGAREG_CRTCEXT_INDEX, 0); |
685 | crtcext0 = RREG8(MGAREG_CRTCEXT_DATA); | ||
686 | crtcext0 &= 0xB0; | ||
687 | addr = offset / 8; | ||
688 | /* Can't store addresses any higher than that... | ||
689 | but we also don't have more than 16MB of memory, so it should be fine. */ | ||
690 | WARN_ON(addr > 0x1fffff); | ||
691 | crtcext0 |= (!!(addr & (1<<20)))<<6; | ||
674 | WREG_CRT(0x0d, (u8)(addr & 0xff)); | 692 | WREG_CRT(0x0d, (u8)(addr & 0xff)); |
675 | WREG_CRT(0x0c, (u8)(addr >> 8) & 0xff); | 693 | WREG_CRT(0x0c, (u8)(addr >> 8) & 0xff); |
676 | WREG_CRT(0xaf, (u8)(addr >> 16) & 0xf); | 694 | WREG_ECRT(0x0, ((u8)(addr >> 16) & 0xf) | crtcext0); |
677 | } | 695 | } |
678 | 696 | ||
679 | 697 | ||
@@ -829,11 +847,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, | |||
829 | 847 | ||
830 | 848 | ||
831 | for (i = 0; i < sizeof(dacvalue); i++) { | 849 | for (i = 0; i < sizeof(dacvalue); i++) { |
832 | if ((i <= 0x03) || | 850 | if ((i <= 0x17) || |
833 | (i == 0x07) || | ||
834 | (i == 0x0b) || | ||
835 | (i == 0x0f) || | ||
836 | ((i >= 0x13) && (i <= 0x17)) || | ||
837 | (i == 0x1b) || | 851 | (i == 0x1b) || |
838 | (i == 0x1c) || | 852 | (i == 0x1c) || |
839 | ((i >= 0x1f) && (i <= 0x29)) || | 853 | ((i >= 0x1f) && (i <= 0x29)) || |
diff --git a/include/drm/drmP.h b/include/drm/drmP.h index 61196592152e..63d17ee9eb48 100644 --- a/include/drm/drmP.h +++ b/include/drm/drmP.h | |||
@@ -316,6 +316,7 @@ struct drm_ioctl_desc { | |||
316 | int flags; | 316 | int flags; |
317 | drm_ioctl_t *func; | 317 | drm_ioctl_t *func; |
318 | unsigned int cmd_drv; | 318 | unsigned int cmd_drv; |
319 | const char *name; | ||
319 | }; | 320 | }; |
320 | 321 | ||
321 | /** | 322 | /** |
@@ -324,7 +325,7 @@ struct drm_ioctl_desc { | |||
324 | */ | 325 | */ |
325 | 326 | ||
326 | #define DRM_IOCTL_DEF_DRV(ioctl, _func, _flags) \ | 327 | #define DRM_IOCTL_DEF_DRV(ioctl, _func, _flags) \ |
327 | [DRM_IOCTL_NR(DRM_##ioctl)] = {.cmd = DRM_##ioctl, .func = _func, .flags = _flags, .cmd_drv = DRM_IOCTL_##ioctl} | 328 | [DRM_IOCTL_NR(DRM_##ioctl)] = {.cmd = DRM_##ioctl, .func = _func, .flags = _flags, .cmd_drv = DRM_IOCTL_##ioctl, .name = #ioctl} |
328 | 329 | ||
329 | struct drm_magic_entry { | 330 | struct drm_magic_entry { |
330 | struct list_head head; | 331 | struct list_head head; |
diff --git a/include/drm/drm_fb_helper.h b/include/drm/drm_fb_helper.h index 8230b46fdd73..471f276ce8f7 100644 --- a/include/drm/drm_fb_helper.h +++ b/include/drm/drm_fb_helper.h | |||
@@ -50,13 +50,14 @@ struct drm_fb_helper_surface_size { | |||
50 | 50 | ||
51 | /** | 51 | /** |
52 | * struct drm_fb_helper_funcs - driver callbacks for the fbdev emulation library | 52 | * struct drm_fb_helper_funcs - driver callbacks for the fbdev emulation library |
53 | * @gamma_set: - Set the given gamma lut register on the given crtc. | 53 | * @gamma_set: Set the given gamma lut register on the given crtc. |
54 | * @gamma_get: - Read the given gamma lut register on the given crtc, used to | 54 | * @gamma_get: Read the given gamma lut register on the given crtc, used to |
55 | * save the current lut when force-restoring the fbdev for e.g. | 55 | * save the current lut when force-restoring the fbdev for e.g. |
56 | * kdbg. | 56 | * kdbg. |
57 | * @fb_probe: - Driver callback to allocate and initialize the fbdev info | 57 | * @fb_probe: Driver callback to allocate and initialize the fbdev info |
58 | * structure. Futhermore it also needs to allocate the drm | 58 | * structure. Futhermore it also needs to allocate the drm |
59 | * framebuffer used to back the fbdev. | 59 | * framebuffer used to back the fbdev. |
60 | * @initial_config: Setup an initial fbdev display configuration | ||
60 | * | 61 | * |
61 | * Driver callbacks used by the fbdev emulation helper library. | 62 | * Driver callbacks used by the fbdev emulation helper library. |
62 | */ | 63 | */ |