diff options
author | Rajendra Nayak <rnayak@ti.com> | 2012-04-27 07:25:59 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2012-11-12 21:18:51 -0500 |
commit | d037e100d138fb522ed0ea3e3a915bd8e0e36f63 (patch) | |
tree | 32a0dc720f4026dcba521b5b579933db59064cb0 | |
parent | 455db9c9b23224f939723e9ded22b7a9a78fb57a (diff) |
ARM: OMAP2: clock: Cleanup !CONFIG_COMMON_CLK parts
Clean all #ifdef's added to OMAP2 clock code to make it COMMON clk
ready, not that CONFIG_COMMON_CLK is enabled.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: also drop CONFIG_COMMON_CLK tests around APLL recalc_rate
functions]
Signed-off-by: Mike Turquette <mturquette@ti.com>
[paul@pwsan.com: remove some ifdefs in mach-omap2/io.c]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
-rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_apll.c | 52 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_dpll.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 21 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_osc.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_sys.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock2430.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock2xxx.h | 18 | ||||
-rw-r--r-- | arch/arm/mach-omap2/io.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm24xx.c | 8 |
10 files changed, 0 insertions, 170 deletions
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c index 76a958c6e5bc..25b1feed480d 100644 --- a/arch/arm/mach-omap2/clkt2xxx_apll.c +++ b/arch/arm/mach-omap2/clkt2xxx_apll.c | |||
@@ -38,7 +38,6 @@ | |||
38 | 38 | ||
39 | /* Private functions */ | 39 | /* Private functions */ |
40 | 40 | ||
41 | #ifdef CONFIG_COMMON_CLK | ||
42 | /** | 41 | /** |
43 | * omap2xxx_clk_apll_locked - is the APLL locked? | 42 | * omap2xxx_clk_apll_locked - is the APLL locked? |
44 | * @hw: struct clk_hw * of the APLL to check | 43 | * @hw: struct clk_hw * of the APLL to check |
@@ -57,81 +56,47 @@ static bool omap2xxx_clk_apll_locked(struct clk_hw *hw) | |||
57 | 56 | ||
58 | return ((r & apll_mask) == apll_mask) ? true : false; | 57 | return ((r & apll_mask) == apll_mask) ? true : false; |
59 | } | 58 | } |
60 | #endif | ||
61 | 59 | ||
62 | #ifdef CONFIG_COMMON_CLK | ||
63 | int omap2_clk_apll96_enable(struct clk_hw *hw) | 60 | int omap2_clk_apll96_enable(struct clk_hw *hw) |
64 | #else | ||
65 | static int _apll96_enable(struct clk *clk) | ||
66 | #endif | ||
67 | { | 61 | { |
68 | return omap2xxx_cm_apll96_enable(); | 62 | return omap2xxx_cm_apll96_enable(); |
69 | } | 63 | } |
70 | 64 | ||
71 | #ifdef CONFIG_COMMON_CLK | ||
72 | int omap2_clk_apll54_enable(struct clk_hw *hw) | 65 | int omap2_clk_apll54_enable(struct clk_hw *hw) |
73 | #else | ||
74 | static int _apll54_enable(struct clk *clk) | ||
75 | #endif | ||
76 | { | 66 | { |
77 | return omap2xxx_cm_apll54_enable(); | 67 | return omap2xxx_cm_apll54_enable(); |
78 | } | 68 | } |
79 | 69 | ||
80 | #ifdef CONFIG_COMMON_CLK | ||
81 | static void _apll96_allow_idle(struct clk_hw_omap *clk) | 70 | static void _apll96_allow_idle(struct clk_hw_omap *clk) |
82 | #else | ||
83 | static void _apll96_allow_idle(struct clk *clk) | ||
84 | #endif | ||
85 | { | 71 | { |
86 | omap2xxx_cm_set_apll96_auto_low_power_stop(); | 72 | omap2xxx_cm_set_apll96_auto_low_power_stop(); |
87 | } | 73 | } |
88 | 74 | ||
89 | #ifdef CONFIG_COMMON_CLK | ||
90 | static void _apll96_deny_idle(struct clk_hw_omap *clk) | 75 | static void _apll96_deny_idle(struct clk_hw_omap *clk) |
91 | #else | ||
92 | static void _apll96_deny_idle(struct clk *clk) | ||
93 | #endif | ||
94 | { | 76 | { |
95 | omap2xxx_cm_set_apll96_disable_autoidle(); | 77 | omap2xxx_cm_set_apll96_disable_autoidle(); |
96 | } | 78 | } |
97 | 79 | ||
98 | #ifdef CONFIG_COMMON_CLK | ||
99 | static void _apll54_allow_idle(struct clk_hw_omap *clk) | 80 | static void _apll54_allow_idle(struct clk_hw_omap *clk) |
100 | #else | ||
101 | static void _apll54_allow_idle(struct clk *clk) | ||
102 | #endif | ||
103 | { | 81 | { |
104 | omap2xxx_cm_set_apll54_auto_low_power_stop(); | 82 | omap2xxx_cm_set_apll54_auto_low_power_stop(); |
105 | } | 83 | } |
106 | 84 | ||
107 | #ifdef CONFIG_COMMON_CLK | ||
108 | static void _apll54_deny_idle(struct clk_hw_omap *clk) | 85 | static void _apll54_deny_idle(struct clk_hw_omap *clk) |
109 | #else | ||
110 | static void _apll54_deny_idle(struct clk *clk) | ||
111 | #endif | ||
112 | { | 86 | { |
113 | omap2xxx_cm_set_apll54_disable_autoidle(); | 87 | omap2xxx_cm_set_apll54_disable_autoidle(); |
114 | } | 88 | } |
115 | 89 | ||
116 | #ifdef CONFIG_COMMON_CLK | ||
117 | void omap2_clk_apll96_disable(struct clk_hw *hw) | 90 | void omap2_clk_apll96_disable(struct clk_hw *hw) |
118 | #else | ||
119 | static void _apll96_disable(struct clk *clk) | ||
120 | #endif | ||
121 | { | 91 | { |
122 | omap2xxx_cm_apll96_disable(); | 92 | omap2xxx_cm_apll96_disable(); |
123 | } | 93 | } |
124 | 94 | ||
125 | #ifdef CONFIG_COMMON_CLK | ||
126 | void omap2_clk_apll54_disable(struct clk_hw *hw) | 95 | void omap2_clk_apll54_disable(struct clk_hw *hw) |
127 | #else | ||
128 | static void _apll54_disable(struct clk *clk) | ||
129 | #endif | ||
130 | { | 96 | { |
131 | omap2xxx_cm_apll54_disable(); | 97 | omap2xxx_cm_apll54_disable(); |
132 | } | 98 | } |
133 | 99 | ||
134 | #ifdef CONFIG_COMMON_CLK | ||
135 | unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw, | 100 | unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw, |
136 | unsigned long parent_rate) | 101 | unsigned long parent_rate) |
137 | { | 102 | { |
@@ -143,10 +108,8 @@ unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw, | |||
143 | { | 108 | { |
144 | return (omap2xxx_clk_apll_locked(hw)) ? 96000000 : 0; | 109 | return (omap2xxx_clk_apll_locked(hw)) ? 96000000 : 0; |
145 | } | 110 | } |
146 | #endif | ||
147 | 111 | ||
148 | /* Public data */ | 112 | /* Public data */ |
149 | #ifdef CONFIG_COMMON_CLK | ||
150 | const struct clk_hw_omap_ops clkhwops_apll54 = { | 113 | const struct clk_hw_omap_ops clkhwops_apll54 = { |
151 | .allow_idle = _apll54_allow_idle, | 114 | .allow_idle = _apll54_allow_idle, |
152 | .deny_idle = _apll54_deny_idle, | 115 | .deny_idle = _apll54_deny_idle, |
@@ -156,21 +119,6 @@ const struct clk_hw_omap_ops clkhwops_apll96 = { | |||
156 | .allow_idle = _apll96_allow_idle, | 119 | .allow_idle = _apll96_allow_idle, |
157 | .deny_idle = _apll96_deny_idle, | 120 | .deny_idle = _apll96_deny_idle, |
158 | }; | 121 | }; |
159 | #else | ||
160 | const struct clkops clkops_apll96 = { | ||
161 | .enable = _apll96_enable, | ||
162 | .disable = _apll96_disable, | ||
163 | .allow_idle = _apll96_allow_idle, | ||
164 | .deny_idle = _apll96_deny_idle, | ||
165 | }; | ||
166 | |||
167 | const struct clkops clkops_apll54 = { | ||
168 | .enable = _apll54_enable, | ||
169 | .disable = _apll54_disable, | ||
170 | .allow_idle = _apll54_allow_idle, | ||
171 | .deny_idle = _apll54_deny_idle, | ||
172 | }; | ||
173 | #endif | ||
174 | 122 | ||
175 | /* Public functions */ | 123 | /* Public functions */ |
176 | 124 | ||
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c index d0fd77b67261..82572e277b97 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpll.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c | |||
@@ -29,11 +29,7 @@ | |||
29 | * REVISIT: DPLL can optionally enter low-power bypass by writing 0x1 | 29 | * REVISIT: DPLL can optionally enter low-power bypass by writing 0x1 |
30 | * instead. Add some mechanism to optionally enter this mode. | 30 | * instead. Add some mechanism to optionally enter this mode. |
31 | */ | 31 | */ |
32 | #ifdef CONFIG_COMMON_CLK | ||
33 | static void _allow_idle(struct clk_hw_omap *clk) | 32 | static void _allow_idle(struct clk_hw_omap *clk) |
34 | #else | ||
35 | static void _allow_idle(struct clk *clk) | ||
36 | #endif | ||
37 | { | 33 | { |
38 | if (!clk || !clk->dpll_data) | 34 | if (!clk || !clk->dpll_data) |
39 | return; | 35 | return; |
@@ -47,11 +43,7 @@ static void _allow_idle(struct clk *clk) | |||
47 | * | 43 | * |
48 | * Disable DPLL automatic idle control. No return value. | 44 | * Disable DPLL automatic idle control. No return value. |
49 | */ | 45 | */ |
50 | #ifdef CONFIG_COMMON_CLK | ||
51 | static void _deny_idle(struct clk_hw_omap *clk) | 46 | static void _deny_idle(struct clk_hw_omap *clk) |
52 | #else | ||
53 | static void _deny_idle(struct clk *clk) | ||
54 | #endif | ||
55 | { | 47 | { |
56 | if (!clk || !clk->dpll_data) | 48 | if (!clk || !clk->dpll_data) |
57 | return; | 49 | return; |
@@ -61,15 +53,7 @@ static void _deny_idle(struct clk *clk) | |||
61 | 53 | ||
62 | 54 | ||
63 | /* Public data */ | 55 | /* Public data */ |
64 | #ifdef CONFIG_COMMON_CLK | ||
65 | const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll = { | 56 | const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll = { |
66 | .allow_idle = _allow_idle, | 57 | .allow_idle = _allow_idle, |
67 | .deny_idle = _deny_idle, | 58 | .deny_idle = _deny_idle, |
68 | }; | 59 | }; |
69 | #else | ||
70 | const struct clkops clkops_omap2xxx_dpll_ops = { | ||
71 | .allow_idle = _allow_idle, | ||
72 | .deny_idle = _deny_idle, | ||
73 | }; | ||
74 | #endif | ||
75 | |||
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c index 9d8388b7ee97..a0ae3c09f97a 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c | |||
@@ -41,11 +41,7 @@ | |||
41 | * (currently defined as "dpll_ck" in the OMAP2xxx clock tree). Set | 41 | * (currently defined as "dpll_ck" in the OMAP2xxx clock tree). Set |
42 | * during dpll_ck init and used later by omap2xxx_clk_get_core_rate(). | 42 | * during dpll_ck init and used later by omap2xxx_clk_get_core_rate(). |
43 | */ | 43 | */ |
44 | #ifdef CONFIG_COMMON_CLK | ||
45 | static struct clk_hw_omap *dpll_core_ck; | 44 | static struct clk_hw_omap *dpll_core_ck; |
46 | #else | ||
47 | static struct clk *dpll_core_ck; | ||
48 | #endif | ||
49 | 45 | ||
50 | /** | 46 | /** |
51 | * omap2xxx_clk_get_core_rate - return the CORE_CLK rate | 47 | * omap2xxx_clk_get_core_rate - return the CORE_CLK rate |
@@ -109,25 +105,16 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate) | |||
109 | 105 | ||
110 | } | 106 | } |
111 | 107 | ||
112 | #ifdef CONFIG_COMMON_CLK | ||
113 | unsigned long omap2_dpllcore_recalc(struct clk_hw *hw, | 108 | unsigned long omap2_dpllcore_recalc(struct clk_hw *hw, |
114 | unsigned long parent_rate) | 109 | unsigned long parent_rate) |
115 | #else | ||
116 | unsigned long omap2_dpllcore_recalc(struct clk *clk) | ||
117 | #endif | ||
118 | { | 110 | { |
119 | return omap2xxx_clk_get_core_rate(); | 111 | return omap2xxx_clk_get_core_rate(); |
120 | } | 112 | } |
121 | 113 | ||
122 | #ifdef CONFIG_COMMON_CLK | ||
123 | int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate, | 114 | int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate, |
124 | unsigned long parent_rate) | 115 | unsigned long parent_rate) |
125 | { | 116 | { |
126 | struct clk_hw_omap *clk = to_clk_hw_omap(hw); | 117 | struct clk_hw_omap *clk = to_clk_hw_omap(hw); |
127 | #else | ||
128 | int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) | ||
129 | { | ||
130 | #endif | ||
131 | u32 cur_rate, low, mult, div, valid_rate, done_rate; | 118 | u32 cur_rate, low, mult, div, valid_rate, done_rate; |
132 | u32 bypass = 0; | 119 | u32 bypass = 0; |
133 | struct prcm_config tmpset; | 120 | struct prcm_config tmpset; |
@@ -205,16 +192,8 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) | |||
205 | * statically defined, this code may need to change to increment some | 192 | * statically defined, this code may need to change to increment some |
206 | * kind of use count on dpll_ck. | 193 | * kind of use count on dpll_ck. |
207 | */ | 194 | */ |
208 | #ifdef CONFIG_COMMON_CLK | ||
209 | void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw) | 195 | void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw) |
210 | #else | ||
211 | void omap2xxx_clkt_dpllcore_init(struct clk *clk) | ||
212 | #endif | ||
213 | { | 196 | { |
214 | WARN(dpll_core_ck, "dpll_core_ck already set - should never happen"); | 197 | WARN(dpll_core_ck, "dpll_core_ck already set - should never happen"); |
215 | #ifdef CONFIG_COMMON_CLK | ||
216 | dpll_core_ck = to_clk_hw_omap(hw); | 198 | dpll_core_ck = to_clk_hw_omap(hw); |
217 | #else | ||
218 | dpll_core_ck = clk; | ||
219 | #endif | ||
220 | } | 199 | } |
diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c b/arch/arm/mach-omap2/clkt2xxx_osc.c index 395e0c1b9d0c..19f54d433490 100644 --- a/arch/arm/mach-omap2/clkt2xxx_osc.c +++ b/arch/arm/mach-omap2/clkt2xxx_osc.c | |||
@@ -35,11 +35,7 @@ | |||
35 | * clk_enable/clk_disable()-based usecounting for osc_ck should be | 35 | * clk_enable/clk_disable()-based usecounting for osc_ck should be |
36 | * replaced with autoidle-based usecounting. | 36 | * replaced with autoidle-based usecounting. |
37 | */ | 37 | */ |
38 | #ifdef CONFIG_COMMON_CLK | ||
39 | int omap2_enable_osc_ck(struct clk_hw *clk) | 38 | int omap2_enable_osc_ck(struct clk_hw *clk) |
40 | #else | ||
41 | static int omap2_enable_osc_ck(struct clk *clk) | ||
42 | #endif | ||
43 | { | 39 | { |
44 | u32 pcc; | 40 | u32 pcc; |
45 | 41 | ||
@@ -57,11 +53,7 @@ static int omap2_enable_osc_ck(struct clk *clk) | |||
57 | * clk_enable/clk_disable()-based usecounting for osc_ck should be | 53 | * clk_enable/clk_disable()-based usecounting for osc_ck should be |
58 | * replaced with autoidle-based usecounting. | 54 | * replaced with autoidle-based usecounting. |
59 | */ | 55 | */ |
60 | #ifdef CONFIG_COMMON_CLK | ||
61 | void omap2_disable_osc_ck(struct clk_hw *clk) | 56 | void omap2_disable_osc_ck(struct clk_hw *clk) |
62 | #else | ||
63 | static void omap2_disable_osc_ck(struct clk *clk) | ||
64 | #endif | ||
65 | { | 57 | { |
66 | u32 pcc; | 58 | u32 pcc; |
67 | 59 | ||
@@ -70,20 +62,8 @@ static void omap2_disable_osc_ck(struct clk *clk) | |||
70 | __raw_writel(pcc | OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl); | 62 | __raw_writel(pcc | OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl); |
71 | } | 63 | } |
72 | 64 | ||
73 | #ifndef CONFIG_COMMON_CLK | ||
74 | const struct clkops clkops_oscck = { | ||
75 | .enable = omap2_enable_osc_ck, | ||
76 | .disable = omap2_disable_osc_ck, | ||
77 | }; | ||
78 | #endif | ||
79 | |||
80 | #ifdef CONFIG_COMMON_CLK | ||
81 | unsigned long omap2_osc_clk_recalc(struct clk_hw *clk, | 65 | unsigned long omap2_osc_clk_recalc(struct clk_hw *clk, |
82 | unsigned long parent_rate) | 66 | unsigned long parent_rate) |
83 | #else | ||
84 | unsigned long omap2_osc_clk_recalc(struct clk *clk) | ||
85 | #endif | ||
86 | { | 67 | { |
87 | return omap2xxx_get_apll_clkin() * omap2xxx_get_sysclkdiv(); | 68 | return omap2xxx_get_apll_clkin() * omap2xxx_get_sysclkdiv(); |
88 | } | 69 | } |
89 | |||
diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c index e6e73cf6aa95..f467d072cd02 100644 --- a/arch/arm/mach-omap2/clkt2xxx_sys.c +++ b/arch/arm/mach-omap2/clkt2xxx_sys.c | |||
@@ -40,16 +40,8 @@ u32 omap2xxx_get_sysclkdiv(void) | |||
40 | return div; | 40 | return div; |
41 | } | 41 | } |
42 | 42 | ||
43 | #ifdef CONFIG_COMMON_CLK | ||
44 | unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk, | 43 | unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk, |
45 | unsigned long parent_rate) | 44 | unsigned long parent_rate) |
46 | { | 45 | { |
47 | return parent_rate / omap2xxx_get_sysclkdiv(); | 46 | return parent_rate / omap2xxx_get_sysclkdiv(); |
48 | } | 47 | } |
49 | #else | ||
50 | unsigned long omap2xxx_sys_clk_recalc(struct clk *clk) | ||
51 | { | ||
52 | return clk->parent->rate / omap2xxx_get_sysclkdiv(); | ||
53 | } | ||
54 | #endif | ||
55 | |||
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index 9a79ffaf6be5..7af224208a25 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | |||
@@ -59,12 +59,8 @@ static unsigned long sys_ck_rate; | |||
59 | * | 59 | * |
60 | * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set. | 60 | * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set. |
61 | */ | 61 | */ |
62 | #ifdef CONFIG_COMMON_CLK | ||
63 | unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, | 62 | unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, |
64 | unsigned long parent_rate) | 63 | unsigned long parent_rate) |
65 | #else | ||
66 | unsigned long omap2_table_mpu_recalc(struct clk *clk) | ||
67 | #endif | ||
68 | { | 64 | { |
69 | return curr_prcm_set->mpu_speed; | 65 | return curr_prcm_set->mpu_speed; |
70 | } | 66 | } |
@@ -76,12 +72,8 @@ unsigned long omap2_table_mpu_recalc(struct clk *clk) | |||
76 | * Some might argue L3-DDR, others ARM, others IVA. This code is simple and | 72 | * Some might argue L3-DDR, others ARM, others IVA. This code is simple and |
77 | * just uses the ARM rates. | 73 | * just uses the ARM rates. |
78 | */ | 74 | */ |
79 | #ifdef CONFIG_COMMON_CLK | ||
80 | long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, | 75 | long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, |
81 | unsigned long *parent_rate) | 76 | unsigned long *parent_rate) |
82 | #else | ||
83 | long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) | ||
84 | #endif | ||
85 | { | 77 | { |
86 | const struct prcm_config *ptr; | 78 | const struct prcm_config *ptr; |
87 | long highest_rate; | 79 | long highest_rate; |
@@ -104,12 +96,8 @@ long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) | |||
104 | } | 96 | } |
105 | 97 | ||
106 | /* Sets basic clocks based on the specified rate */ | 98 | /* Sets basic clocks based on the specified rate */ |
107 | #ifdef CONFIG_COMMON_CLK | ||
108 | int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, | 99 | int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, |
109 | unsigned long parent_rate) | 100 | unsigned long parent_rate) |
110 | #else | ||
111 | int omap2_select_table_rate(struct clk *clk, unsigned long rate) | ||
112 | #endif | ||
113 | { | 101 | { |
114 | u32 cur_rate, done_rate, bypass = 0, tmp; | 102 | u32 cur_rate, done_rate, bypass = 0, tmp; |
115 | const struct prcm_config *prcm; | 103 | const struct prcm_config *prcm; |
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c index 7a61d7842968..cef0c8d1de52 100644 --- a/arch/arm/mach-omap2/clock2430.c +++ b/arch/arm/mach-omap2/clock2430.c | |||
@@ -40,11 +40,7 @@ | |||
40 | * passes back the correct CM_IDLEST register address for I2CHS | 40 | * passes back the correct CM_IDLEST register address for I2CHS |
41 | * modules. No return value. | 41 | * modules. No return value. |
42 | */ | 42 | */ |
43 | #ifdef CONFIG_COMMON_CLK | ||
44 | static void omap2430_clk_i2chs_find_idlest(struct clk_hw_omap *clk, | 43 | static void omap2430_clk_i2chs_find_idlest(struct clk_hw_omap *clk, |
45 | #else | ||
46 | static void omap2430_clk_i2chs_find_idlest(struct clk *clk, | ||
47 | #endif | ||
48 | void __iomem **idlest_reg, | 44 | void __iomem **idlest_reg, |
49 | u8 *idlest_bit, | 45 | u8 *idlest_bit, |
50 | u8 *idlest_val) | 46 | u8 *idlest_val) |
@@ -55,16 +51,7 @@ static void omap2430_clk_i2chs_find_idlest(struct clk *clk, | |||
55 | } | 51 | } |
56 | 52 | ||
57 | /* 2430 I2CHS has non-standard IDLEST register */ | 53 | /* 2430 I2CHS has non-standard IDLEST register */ |
58 | #ifdef CONFIG_COMMON_CLK | ||
59 | const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait = { | 54 | const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait = { |
60 | .find_idlest = omap2430_clk_i2chs_find_idlest, | 55 | .find_idlest = omap2430_clk_i2chs_find_idlest, |
61 | .find_companion = omap2_clk_dflt_find_companion, | 56 | .find_companion = omap2_clk_dflt_find_companion, |
62 | }; | 57 | }; |
63 | #else | ||
64 | const struct clkops clkops_omap2430_i2chs_wait = { | ||
65 | .enable = omap2_dflt_clk_enable, | ||
66 | .disable = omap2_dflt_clk_disable, | ||
67 | .find_idlest = omap2430_clk_i2chs_find_idlest, | ||
68 | .find_companion = omap2_clk_dflt_find_companion, | ||
69 | }; | ||
70 | #endif | ||
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h index 82147c49a8de..539dc08afbba 100644 --- a/arch/arm/mach-omap2/clock2xxx.h +++ b/arch/arm/mach-omap2/clock2xxx.h | |||
@@ -8,7 +8,6 @@ | |||
8 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H | 8 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H |
9 | #define __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H | 9 | #define __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H |
10 | 10 | ||
11 | #ifdef CONFIG_COMMON_CLK | ||
12 | #include <linux/clk-provider.h> | 11 | #include <linux/clk-provider.h> |
13 | #include "clock.h" | 12 | #include "clock.h" |
14 | 13 | ||
@@ -31,16 +30,6 @@ unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw, | |||
31 | unsigned long parent_rate); | 30 | unsigned long parent_rate); |
32 | unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw, | 31 | unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw, |
33 | unsigned long parent_rate); | 32 | unsigned long parent_rate); |
34 | #else | ||
35 | unsigned long omap2_table_mpu_recalc(struct clk *clk); | ||
36 | int omap2_select_table_rate(struct clk *clk, unsigned long rate); | ||
37 | long omap2_round_to_table_rate(struct clk *clk, unsigned long rate); | ||
38 | unsigned long omap2xxx_sys_clk_recalc(struct clk *clk); | ||
39 | unsigned long omap2_osc_clk_recalc(struct clk *clk); | ||
40 | unsigned long omap2_dpllcore_recalc(struct clk *clk); | ||
41 | int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate); | ||
42 | void omap2xxx_clkt_dpllcore_init(struct clk *clk); | ||
43 | #endif | ||
44 | unsigned long omap2xxx_clk_get_core_rate(void); | 33 | unsigned long omap2xxx_clk_get_core_rate(void); |
45 | u32 omap2xxx_get_apll_clkin(void); | 34 | u32 omap2xxx_get_apll_clkin(void); |
46 | u32 omap2xxx_get_sysclkdiv(void); | 35 | u32 omap2xxx_get_sysclkdiv(void); |
@@ -62,7 +51,6 @@ int omap2430_clk_init(void); | |||
62 | 51 | ||
63 | extern void __iomem *prcm_clksrc_ctrl; | 52 | extern void __iomem *prcm_clksrc_ctrl; |
64 | 53 | ||
65 | #ifdef CONFIG_COMMON_CLK | ||
66 | extern struct clk_hw *dclk_hw; | 54 | extern struct clk_hw *dclk_hw; |
67 | int omap2_enable_osc_ck(struct clk_hw *hw); | 55 | int omap2_enable_osc_ck(struct clk_hw *hw); |
68 | void omap2_disable_osc_ck(struct clk_hw *hw); | 56 | void omap2_disable_osc_ck(struct clk_hw *hw); |
@@ -70,11 +58,5 @@ int omap2_clk_apll96_enable(struct clk_hw *hw); | |||
70 | int omap2_clk_apll54_enable(struct clk_hw *hw); | 58 | int omap2_clk_apll54_enable(struct clk_hw *hw); |
71 | void omap2_clk_apll96_disable(struct clk_hw *hw); | 59 | void omap2_clk_apll96_disable(struct clk_hw *hw); |
72 | void omap2_clk_apll54_disable(struct clk_hw *hw); | 60 | void omap2_clk_apll54_disable(struct clk_hw *hw); |
73 | #else | ||
74 | extern const struct clkops clkops_omap2430_i2chs_wait; | ||
75 | extern const struct clkops clkops_oscck; | ||
76 | extern const struct clkops clkops_apll96; | ||
77 | extern const struct clkops clkops_apll54; | ||
78 | #endif | ||
79 | 61 | ||
80 | #endif | 62 | #endif |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 05a5e6489df4..924bf24693cd 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -437,9 +437,7 @@ void __init omap2430_init_late(void) | |||
437 | omap_mux_late_init(); | 437 | omap_mux_late_init(); |
438 | omap2_common_pm_late_init(); | 438 | omap2_common_pm_late_init(); |
439 | omap2_pm_init(); | 439 | omap2_pm_init(); |
440 | #ifdef CONFIG_COMMON_CLK | ||
441 | omap2_clk_enable_autoidle_all(); | 440 | omap2_clk_enable_autoidle_all(); |
442 | #endif | ||
443 | } | 441 | } |
444 | #endif | 442 | #endif |
445 | 443 | ||
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 87ae36c7e155..3d35bd64487c 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -25,11 +25,7 @@ | |||
25 | #include <linux/sysfs.h> | 25 | #include <linux/sysfs.h> |
26 | #include <linux/module.h> | 26 | #include <linux/module.h> |
27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
28 | #ifdef CONFIG_COMMON_CLK | ||
29 | #include <linux/clk-provider.h> | 28 | #include <linux/clk-provider.h> |
30 | #else | ||
31 | #include <linux/clk.h> | ||
32 | #endif | ||
33 | #include <linux/irq.h> | 29 | #include <linux/irq.h> |
34 | #include <linux/time.h> | 30 | #include <linux/time.h> |
35 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
@@ -206,11 +202,7 @@ static int omap2_can_sleep(void) | |||
206 | { | 202 | { |
207 | if (omap2_fclks_active()) | 203 | if (omap2_fclks_active()) |
208 | return 0; | 204 | return 0; |
209 | #ifdef CONFIG_COMMON_CLK | ||
210 | if (__clk_is_enabled(osc_ck)) | 205 | if (__clk_is_enabled(osc_ck)) |
211 | #else | ||
212 | if (osc_ck->usecount > 1) | ||
213 | #endif | ||
214 | return 0; | 206 | return 0; |
215 | if (omap_dma_running()) | 207 | if (omap_dma_running()) |
216 | return 0; | 208 | return 0; |