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authorSteve Glendinning <steve.glendinning@smsc.com>2008-05-06 06:36:27 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-05-09 06:04:12 -0400
commitcdf7da899d840d47e075ff3bd761290653c68b77 (patch)
tree896d315d322328da9fedb0174a082c8121fa75e9
parentf11c9c2fd9ab1732acd577bcf08a4a2be7f9aa65 (diff)
sh: Fix DMAC base address for SH7709S
On SH7709S, DMAC can be found at 0xa4000020 (as with most of the other sh3 cpu subtypes). Split out definition of DMAC base address from definitions of DMTE irqs. Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--include/asm-sh/cpu-sh3/dma.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h
index 092ff9d872c3..6813c3220a1d 100644
--- a/include/asm-sh/cpu-sh3/dma.h
+++ b/include/asm-sh/cpu-sh3/dma.h
@@ -3,19 +3,19 @@
3 3
4 4
5#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 5#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
6 defined(CONFIG_CPU_SUBTYPE_SH7721) || \ 6 defined(CONFIG_CPU_SUBTYPE_SH7721)
7 defined(CONFIG_CPU_SUBTYPE_SH7709)
8#define SH_DMAC_BASE 0xa4010020 7#define SH_DMAC_BASE 0xa4010020
8#else
9#define SH_DMAC_BASE 0xa4000020
10#endif
9 11
12#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709)
10#define DMTE0_IRQ 48 13#define DMTE0_IRQ 48
11#define DMTE1_IRQ 49 14#define DMTE1_IRQ 49
12#define DMTE2_IRQ 50 15#define DMTE2_IRQ 50
13#define DMTE3_IRQ 51 16#define DMTE3_IRQ 51
14#define DMTE4_IRQ 76 17#define DMTE4_IRQ 76
15#define DMTE5_IRQ 77 18#define DMTE5_IRQ 77
16
17#else
18#define SH_DMAC_BASE 0xa4000020
19#endif 19#endif
20 20
21/* Definitions for the SuperH DMAC */ 21/* Definitions for the SuperH DMAC */