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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2012-08-29 09:31:07 -0400
committerBenoit Cousson <b-cousson@ti.com>2012-09-07 13:22:58 -0400
commitcbb57f071f4dbd7684e6b7280dbc2286fdcecf0b (patch)
treeb111aaeb5c4b0268c2534f317a5e148b0c3e13c9
parentffd5db24e7491135da12d73244d6974153f4765f (diff)
ARM: dts: omap5: Add McPDM and DMIC section to the dtsi file
To be able to load the McPDM and DMIC driver when booted with device tree. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
-rw-r--r--arch/arm/boot/dts/omap5.dtsi20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index aa97e9318def..9ac75b37c992 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -252,6 +252,26 @@
252 ti,hwmods = "kbd"; 252 ti,hwmods = "kbd";
253 }; 253 };
254 254
255 mcpdm: mcpdm@40132000 {
256 compatible = "ti,omap4-mcpdm";
257 reg = <0x40132000 0x7f>, /* MPU private access */
258 <0x49032000 0x7f>; /* L3 Interconnect */
259 reg-names = "mpu", "dma";
260 interrupts = <0 112 0x4>;
261 interrupt-parent = <&gic>;
262 ti,hwmods = "mcpdm";
263 };
264
265 dmic: dmic@4012e000 {
266 compatible = "ti,omap4-dmic";
267 reg = <0x4012e000 0x7f>, /* MPU private access */
268 <0x4902e000 0x7f>; /* L3 Interconnect */
269 reg-names = "mpu", "dma";
270 interrupts = <0 114 0x4>;
271 interrupt-parent = <&gic>;
272 ti,hwmods = "dmic";
273 };
274
255 mcbsp1: mcbsp@40122000 { 275 mcbsp1: mcbsp@40122000 {
256 compatible = "ti,omap4-mcbsp"; 276 compatible = "ti,omap4-mcbsp";
257 reg = <0x40122000 0xff>, /* MPU private access */ 277 reg = <0x40122000 0xff>, /* MPU private access */