diff options
author | Xu, Anhua <anhua.xu@intel.com> | 2012-08-12 23:08:33 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-23 05:44:53 -0400 |
commit | b70ad586162609141f0aa9eb34790f31a8954f89 (patch) | |
tree | 7956d406f048b001f1ac6c7e064c5d5d2806c5c0 | |
parent | fea7a08acb13524b47711625eebea40a0ede69a0 (diff) |
drm/i915: fix wrong order of parameters in port checking functions
Wrong order of parameters passed-in when calling hdmi/adpa
/lvds_pipe_enabled(), 2nd and 3rd parameters are reversed.
This bug was indroduced by
commit 1519b9956eb4b4180fa3f47c73341463cdcfaa37
Author: Keith Packard <keithp@keithp.com>
Date: Sat Aug 6 10:35:34 2011 -0700
drm/i915: Fix PCH port pipe select in CPT disable paths
The reachable tag for this commit is v3.1-rc1-3-g1519b99
Signed-off-by: Anhua Xu <anhua.xu@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44876
Tested-by: Daniel Schroeder <sec@dschroeder.info>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a69a3d0d3acf..2dfa6cf4886b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1384,7 +1384,7 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv, | |||
1384 | enum pipe pipe, int reg) | 1384 | enum pipe pipe, int reg) |
1385 | { | 1385 | { |
1386 | u32 val = I915_READ(reg); | 1386 | u32 val = I915_READ(reg); |
1387 | WARN(hdmi_pipe_enabled(dev_priv, val, pipe), | 1387 | WARN(hdmi_pipe_enabled(dev_priv, pipe, val), |
1388 | "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n", | 1388 | "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n", |
1389 | reg, pipe_name(pipe)); | 1389 | reg, pipe_name(pipe)); |
1390 | 1390 | ||
@@ -1404,13 +1404,13 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv, | |||
1404 | 1404 | ||
1405 | reg = PCH_ADPA; | 1405 | reg = PCH_ADPA; |
1406 | val = I915_READ(reg); | 1406 | val = I915_READ(reg); |
1407 | WARN(adpa_pipe_enabled(dev_priv, val, pipe), | 1407 | WARN(adpa_pipe_enabled(dev_priv, pipe, val), |
1408 | "PCH VGA enabled on transcoder %c, should be disabled\n", | 1408 | "PCH VGA enabled on transcoder %c, should be disabled\n", |
1409 | pipe_name(pipe)); | 1409 | pipe_name(pipe)); |
1410 | 1410 | ||
1411 | reg = PCH_LVDS; | 1411 | reg = PCH_LVDS; |
1412 | val = I915_READ(reg); | 1412 | val = I915_READ(reg); |
1413 | WARN(lvds_pipe_enabled(dev_priv, val, pipe), | 1413 | WARN(lvds_pipe_enabled(dev_priv, pipe, val), |
1414 | "PCH LVDS enabled on transcoder %c, should be disabled\n", | 1414 | "PCH LVDS enabled on transcoder %c, should be disabled\n", |
1415 | pipe_name(pipe)); | 1415 | pipe_name(pipe)); |
1416 | 1416 | ||
@@ -1872,7 +1872,7 @@ static void disable_pch_hdmi(struct drm_i915_private *dev_priv, | |||
1872 | enum pipe pipe, int reg) | 1872 | enum pipe pipe, int reg) |
1873 | { | 1873 | { |
1874 | u32 val = I915_READ(reg); | 1874 | u32 val = I915_READ(reg); |
1875 | if (hdmi_pipe_enabled(dev_priv, val, pipe)) { | 1875 | if (hdmi_pipe_enabled(dev_priv, pipe, val)) { |
1876 | DRM_DEBUG_KMS("Disabling pch HDMI %x on pipe %d\n", | 1876 | DRM_DEBUG_KMS("Disabling pch HDMI %x on pipe %d\n", |
1877 | reg, pipe); | 1877 | reg, pipe); |
1878 | I915_WRITE(reg, val & ~PORT_ENABLE); | 1878 | I915_WRITE(reg, val & ~PORT_ENABLE); |
@@ -1894,12 +1894,12 @@ static void intel_disable_pch_ports(struct drm_i915_private *dev_priv, | |||
1894 | 1894 | ||
1895 | reg = PCH_ADPA; | 1895 | reg = PCH_ADPA; |
1896 | val = I915_READ(reg); | 1896 | val = I915_READ(reg); |
1897 | if (adpa_pipe_enabled(dev_priv, val, pipe)) | 1897 | if (adpa_pipe_enabled(dev_priv, pipe, val)) |
1898 | I915_WRITE(reg, val & ~ADPA_DAC_ENABLE); | 1898 | I915_WRITE(reg, val & ~ADPA_DAC_ENABLE); |
1899 | 1899 | ||
1900 | reg = PCH_LVDS; | 1900 | reg = PCH_LVDS; |
1901 | val = I915_READ(reg); | 1901 | val = I915_READ(reg); |
1902 | if (lvds_pipe_enabled(dev_priv, val, pipe)) { | 1902 | if (lvds_pipe_enabled(dev_priv, pipe, val)) { |
1903 | DRM_DEBUG_KMS("disable lvds on pipe %d val 0x%08x\n", pipe, val); | 1903 | DRM_DEBUG_KMS("disable lvds on pipe %d val 0x%08x\n", pipe, val); |
1904 | I915_WRITE(reg, val & ~LVDS_PORT_EN); | 1904 | I915_WRITE(reg, val & ~LVDS_PORT_EN); |
1905 | POSTING_READ(reg); | 1905 | POSTING_READ(reg); |