[ARM] S3C64XX: Correct the EINT IRQ type configuration

Select the correct EINT configuration register when configuring
the external interrupt level/edge type.

Signed-off-by: Matt Hsu <matt_hsu@openmoko.org>
[ben-linux@fluff.org: description improvement]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c
index 8c01f9cd94b6..1f7cc0067f5c 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/plat-s3c64xx/irq-eint.c
@@ -82,7 +82,7 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
         if (offs > 27)
                 return -EINVAL;
 
-        if (offs > 15)
+        if (offs <= 15)
                 reg = S3C64XX_EINT0CON0;
         else
                 reg = S3C64XX_EINT0CON1;