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authorMax Filippov <jcmvbkbc@gmail.com>2014-08-03 21:55:53 -0400
committerMax Filippov <jcmvbkbc@gmail.com>2014-08-14 03:59:30 -0400
commita83b02e9bd0c28d27b6c6e5b184585f7a1b8bf86 (patch)
tree13cec9be08c9e9d5382d7f7f886e040447cebdd5
parent21570465a30f13197991eb2637d6ffc6c6880eef (diff)
xtensa: allow single-stepping through unaligned load/store
Update icount when icountlevel is non-zero but not greater than EXCM level when load/store instruction is successfully emulated. This allows single-stepping over such instruction in userspace debugger. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
-rw-r--r--arch/xtensa/kernel/align.S8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/xtensa/kernel/align.S b/arch/xtensa/kernel/align.S
index 87d80d8c33e5..890004af03a9 100644
--- a/arch/xtensa/kernel/align.S
+++ b/arch/xtensa/kernel/align.S
@@ -421,6 +421,14 @@ ENTRY(fast_unaligned)
421 421
4221: wsr a7, epc1 # skip emulated instruction 4221: wsr a7, epc1 # skip emulated instruction
423 423
424 /* Update icount if we're single-stepping in userspace. */
425 rsr a4, icountlevel
426 beqz a4, 1f
427 bgeui a4, LOCKLEVEL + 1, 1f
428 rsr a4, icount
429 addi a4, a4, 1
430 wsr a4, icount
4311:
424 movi a4, 0 432 movi a4, 0
425 rsr a3, excsave1 433 rsr a3, excsave1
426 s32i a4, a3, EXC_TABLE_FIXUP 434 s32i a4, a3, EXC_TABLE_FIXUP