diff options
author | Alexander Shiyan <shc_work@mail.ru> | 2012-10-10 11:45:31 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-10-25 11:22:35 -0400 |
commit | 6cb1b145b912721f7a00f3fb5938765b34558b08 (patch) | |
tree | 208a150411995cc7ae159c31ea8bd8799272bf2b | |
parent | 36504ac131d14611dded451dd8b9f8426d084111 (diff) |
ARM: clps711x: make all virtual addresses definition via one macro
This patch make all virtual addresses definition via one macro.
This modification allows to avoid warning "BUG: mapping for 0x80000000
at 0xff000000 out of vmalloc space".
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | arch/arm/mach-clps711x/autcpu12.c | 15 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/cdb89712.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/common.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/edb7211-mm.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/autcpu12.h | 14 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/hardware.h | 56 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/syspld.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/p720t.c | 16 |
8 files changed, 38 insertions, 94 deletions
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c index 32871918bb6e..214547b5c51f 100644 --- a/arch/arm/mach-clps711x/autcpu12.c +++ b/arch/arm/mach-clps711x/autcpu12.c | |||
@@ -39,19 +39,10 @@ | |||
39 | 39 | ||
40 | #include "common.h" | 40 | #include "common.h" |
41 | 41 | ||
42 | /* | ||
43 | * The on-chip registers are given a size of 1MB so that a section can | ||
44 | * be used to map them; this saves a page table. This is the place to | ||
45 | * add mappings for ROM, expansion memory, PCMCIA, etc. (if static | ||
46 | * mappings are chosen for those areas). | ||
47 | * | ||
48 | */ | ||
49 | |||
50 | static struct map_desc autcpu12_io_desc[] __initdata = { | 42 | static struct map_desc autcpu12_io_desc[] __initdata = { |
51 | /* memory-mapped extra io and CS8900A Ethernet chip */ | 43 | /* Memory-mapped extra io and CS8900A Ethernet chip */ |
52 | /* ethernet chip */ | 44 | { |
53 | { | 45 | .virtual = IO_ADDRESS(AUTCPU12_PHYS_CS8900A), |
54 | .virtual = AUTCPU12_VIRT_CS8900A, | ||
55 | .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A), | 46 | .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A), |
56 | .length = SZ_1M, | 47 | .length = SZ_1M, |
57 | .type = MT_DEVICE | 48 | .type = MT_DEVICE |
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c index c314f49d6ef6..d90d25c67ac2 100644 --- a/arch/arm/mach-clps711x/cdb89712.c +++ b/arch/arm/mach-clps711x/cdb89712.c | |||
@@ -40,8 +40,8 @@ | |||
40 | */ | 40 | */ |
41 | static struct map_desc cdb89712_io_desc[] __initdata = { | 41 | static struct map_desc cdb89712_io_desc[] __initdata = { |
42 | { | 42 | { |
43 | .virtual = ETHER_BASE, | 43 | .virtual = IO_ADDRESS(ETHER_PHYS_BASE), |
44 | .pfn =__phys_to_pfn(ETHER_START), | 44 | .pfn = __phys_to_pfn(ETHER_PHYS_BASE), |
45 | .length = ETHER_SIZE, | 45 | .length = ETHER_SIZE, |
46 | .type = MT_DEVICE | 46 | .type = MT_DEVICE |
47 | } | 47 | } |
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index 47fb496ceae7..286d6e6d5f5a 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c | |||
@@ -45,7 +45,7 @@ static struct map_desc clps711x_io_desc[] __initdata = { | |||
45 | { | 45 | { |
46 | .virtual = (unsigned long)CLPS711X_VIRT_BASE, | 46 | .virtual = (unsigned long)CLPS711X_VIRT_BASE, |
47 | .pfn = __phys_to_pfn(CLPS711X_PHYS_BASE), | 47 | .pfn = __phys_to_pfn(CLPS711X_PHYS_BASE), |
48 | .length = SZ_1M, | 48 | .length = SZ_64K, |
49 | .type = MT_DEVICE | 49 | .type = MT_DEVICE |
50 | } | 50 | } |
51 | }; | 51 | }; |
diff --git a/arch/arm/mach-clps711x/edb7211-mm.c b/arch/arm/mach-clps711x/edb7211-mm.c index 4372f06c9929..054eaa05f5c8 100644 --- a/arch/arm/mach-clps711x/edb7211-mm.c +++ b/arch/arm/mach-clps711x/edb7211-mm.c | |||
@@ -51,23 +51,23 @@ extern void clps711x_map_io(void); | |||
51 | * happens). | 51 | * happens). |
52 | */ | 52 | */ |
53 | static struct map_desc edb7211_io_desc[] __initdata = { | 53 | static struct map_desc edb7211_io_desc[] __initdata = { |
54 | { /* memory-mapped extra keyboard row */ | 54 | { /* Memory-mapped extra keyboard row */ |
55 | .virtual = EP7211_VIRT_EXTKBD, | 55 | .virtual = IO_ADDRESS(EP7211_PHYS_EXTKBD), |
56 | .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD), | 56 | .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD), |
57 | .length = SZ_1M, | 57 | .length = SZ_1M, |
58 | .type = MT_DEVICE, | 58 | .type = MT_DEVICE, |
59 | }, { /* and CS8900A Ethernet chip */ | 59 | }, { /* CS8900A Ethernet chip */ |
60 | .virtual = EP7211_VIRT_CS8900A, | 60 | .virtual = IO_ADDRESS(EP7211_PHYS_CS8900A), |
61 | .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A), | 61 | .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A), |
62 | .length = SZ_1M, | 62 | .length = SZ_1M, |
63 | .type = MT_DEVICE, | 63 | .type = MT_DEVICE, |
64 | }, { /* flash banks */ | 64 | }, { /* Flash bank 0 */ |
65 | .virtual = EP7211_VIRT_FLASH1, | 65 | .virtual = IO_ADDRESS(EP7211_PHYS_FLASH1), |
66 | .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1), | 66 | .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1), |
67 | .length = SZ_8M, | 67 | .length = SZ_8M, |
68 | .type = MT_DEVICE, | 68 | .type = MT_DEVICE, |
69 | }, { | 69 | }, { /* Flash bank 1 */ |
70 | .virtual = EP7211_VIRT_FLASH2, | 70 | .virtual = IO_ADDRESS(EP7211_PHYS_FLASH2), |
71 | .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2), | 71 | .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2), |
72 | .length = SZ_8M, | 72 | .length = SZ_8M, |
73 | .type = MT_DEVICE, | 73 | .type = MT_DEVICE, |
diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h index 1588a365f610..f95ce6f29119 100644 --- a/arch/arm/mach-clps711x/include/mach/autcpu12.h +++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h | |||
@@ -20,12 +20,8 @@ | |||
20 | #ifndef __ASM_ARCH_AUTCPU12_H | 20 | #ifndef __ASM_ARCH_AUTCPU12_H |
21 | #define __ASM_ARCH_AUTCPU12_H | 21 | #define __ASM_ARCH_AUTCPU12_H |
22 | 22 | ||
23 | /* | 23 | /* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */ |
24 | * The CS8900A ethernet chip has its I/O registers wired to chip select 2 | 24 | #define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE |
25 | * (nCS2). This is the mapping for it. | ||
26 | */ | ||
27 | #define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */ | ||
28 | #define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */ | ||
29 | 25 | ||
30 | /* | 26 | /* |
31 | * The flash bank is wired to chip select 0 | 27 | * The flash bank is wired to chip select 0 |
@@ -34,11 +30,9 @@ | |||
34 | 30 | ||
35 | /* offset for device specific information structure */ | 31 | /* offset for device specific information structure */ |
36 | #define AUTCPU12_LCDINFO_OFFS (0x00010000) | 32 | #define AUTCPU12_LCDINFO_OFFS (0x00010000) |
37 | /* | 33 | |
38 | * Videomemory is the internal SRAM (CS 6) | 34 | /* Videomemory in the internal SRAM (CS 6) */ |
39 | */ | ||
40 | #define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE | 35 | #define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE |
41 | #define AUTCPU12_VIRT_VIDEO (0xfd000000) | ||
42 | 36 | ||
43 | /* | 37 | /* |
44 | * All special IO's are tied to CS1 | 38 | * All special IO's are tied to CS1 |
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h index 8497775d6ee5..0a3df25ffea7 100644 --- a/arch/arm/mach-clps711x/include/mach/hardware.h +++ b/arch/arm/mach-clps711x/include/mach/hardware.h | |||
@@ -24,7 +24,10 @@ | |||
24 | 24 | ||
25 | #include <mach/clps711x.h> | 25 | #include <mach/clps711x.h> |
26 | 26 | ||
27 | #define CLPS711X_VIRT_BASE IOMEM(0xff000000) | 27 | #define IO_ADDRESS(x) (0xdc000000 + (((x) & 0x03ffffff) | \ |
28 | (((x) >> 2) & 0x3c000000))) | ||
29 | |||
30 | #define CLPS711X_VIRT_BASE IOMEM(IO_ADDRESS(CLPS711X_PHYS_BASE)) | ||
28 | 31 | ||
29 | #ifndef __ASSEMBLY__ | 32 | #ifndef __ASSEMBLY__ |
30 | #define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off)) | 33 | #define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off)) |
@@ -61,58 +64,25 @@ | |||
61 | #define CS7_PHYS_BASE (0x00000000) | 64 | #define CS7_PHYS_BASE (0x00000000) |
62 | #endif | 65 | #endif |
63 | 66 | ||
64 | #define SYSPLD_VIRT_BASE 0xfe000000 | ||
65 | #define SYSPLD_BASE SYSPLD_VIRT_BASE | ||
66 | |||
67 | #if defined (CONFIG_ARCH_CDB89712) | 67 | #if defined (CONFIG_ARCH_CDB89712) |
68 | 68 | ||
69 | #define ETHER_START 0x20000000 | 69 | #define ETHER_PHYS_BASE CS2_PHYS_BASE |
70 | #define ETHER_SIZE 0x1000 | 70 | #define ETHER_SIZE 0x1000 |
71 | #define ETHER_BASE 0xfe000000 | ||
72 | 71 | ||
73 | #endif | 72 | #endif |
74 | 73 | ||
75 | 74 | ||
76 | #if defined (CONFIG_ARCH_EDB7211) | 75 | #if defined (CONFIG_ARCH_EDB7211) |
77 | 76 | ||
78 | /* | 77 | /* The extra 8 lines of the keyboard matrix are wired to chip select 3 */ |
79 | * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3) | 78 | #define EP7211_PHYS_EXTKBD CS3_PHYS_BASE |
80 | * and repeat across it. This is the mapping for it. | ||
81 | * | ||
82 | * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This | ||
83 | * was cause for much consternation and headscratching. This should probably | ||
84 | * be made a compile/run time kernel option. | ||
85 | */ | ||
86 | #define EP7211_PHYS_EXTKBD CS3_PHYS_BASE /* physical */ | ||
87 | |||
88 | #define EP7211_VIRT_EXTKBD (0xfd000000) /* virtual */ | ||
89 | |||
90 | |||
91 | /* | ||
92 | * The CS8900A ethernet chip has its I/O registers wired to chip select 2 | ||
93 | * (nCS2). This is the mapping for it. | ||
94 | * | ||
95 | * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This | ||
96 | * was cause for much consternation and headscratching. This should probably | ||
97 | * be made a compile/run time kernel option. | ||
98 | */ | ||
99 | #define EP7211_PHYS_CS8900A CS2_PHYS_BASE /* physical */ | ||
100 | |||
101 | #define EP7211_VIRT_CS8900A (0xfc000000) /* virtual */ | ||
102 | 79 | ||
80 | /* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */ | ||
81 | #define EP7211_PHYS_CS8900A CS2_PHYS_BASE | ||
103 | 82 | ||
104 | /* | 83 | /* The two flash banks are wired to chip selects 0 and 1 */ |
105 | * The two flash banks are wired to chip selects 0 and 1. This is the mapping | 84 | #define EP7211_PHYS_FLASH1 CS0_PHYS_BASE |
106 | * for them. | 85 | #define EP7211_PHYS_FLASH2 CS1_PHYS_BASE |
107 | * | ||
108 | * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running | ||
109 | * in jumpered boot mode. | ||
110 | */ | ||
111 | #define EP7211_PHYS_FLASH1 CS0_PHYS_BASE /* physical */ | ||
112 | #define EP7211_PHYS_FLASH2 CS1_PHYS_BASE /* physical */ | ||
113 | |||
114 | #define EP7211_VIRT_FLASH1 (0xfa000000) /* virtual */ | ||
115 | #define EP7211_VIRT_FLASH2 (0xfb000000) /* virtual */ | ||
116 | 86 | ||
117 | #endif /* CONFIG_ARCH_EDB7211 */ | 87 | #endif /* CONFIG_ARCH_EDB7211 */ |
118 | 88 | ||
diff --git a/arch/arm/mach-clps711x/include/mach/syspld.h b/arch/arm/mach-clps711x/include/mach/syspld.h index f7f4c1201898..9a433155bf58 100644 --- a/arch/arm/mach-clps711x/include/mach/syspld.h +++ b/arch/arm/mach-clps711x/include/mach/syspld.h | |||
@@ -23,14 +23,9 @@ | |||
23 | #define __ASM_ARCH_SYSPLD_H | 23 | #define __ASM_ARCH_SYSPLD_H |
24 | 24 | ||
25 | #define SYSPLD_PHYS_BASE (0x10000000) | 25 | #define SYSPLD_PHYS_BASE (0x10000000) |
26 | #define SYSPLD_VIRT_BASE IO_ADDRESS(SYSPLD_PHYS_BASE) | ||
26 | 27 | ||
27 | #ifndef __ASSEMBLY__ | 28 | #define SYSPLD_REG(type, off) (*(volatile type *)(SYSPLD_VIRT_BASE + (off))) |
28 | #include <asm/types.h> | ||
29 | |||
30 | #define SYSPLD_REG(type,off) (*(volatile type *)(SYSPLD_BASE + off)) | ||
31 | #else | ||
32 | #define SYSPLD_REG(type,off) (off) | ||
33 | #endif | ||
34 | 29 | ||
35 | #define PLD_INT SYSPLD_REG(u32, 0x000000) | 30 | #define PLD_INT SYSPLD_REG(u32, 0x000000) |
36 | #define PLD_INT_PENIRQ (1 << 5) | 31 | #define PLD_INT_PENIRQ (1 << 5) |
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c index 7680beab4ed2..dd8995027dd4 100644 --- a/arch/arm/mach-clps711x/p720t.c +++ b/arch/arm/mach-clps711x/p720t.c | |||
@@ -39,22 +39,16 @@ | |||
39 | #include "common.h" | 39 | #include "common.h" |
40 | 40 | ||
41 | /* | 41 | /* |
42 | * Map the P720T system PLD. It occupies two address spaces: | 42 | * Map the P720T system PLD. It occupies two address spaces: |
43 | * SYSPLD_PHYS_BASE and SYSPLD_PHYS_BASE + 0x00400000 | 43 | * 0x10000000 and 0x10400000. We map both regions as one. |
44 | * We map both here. | ||
45 | */ | 44 | */ |
46 | static struct map_desc p720t_io_desc[] __initdata = { | 45 | static struct map_desc p720t_io_desc[] __initdata = { |
47 | { | 46 | { |
48 | .virtual = SYSPLD_VIRT_BASE, | 47 | .virtual = SYSPLD_VIRT_BASE, |
49 | .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE), | 48 | .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE), |
50 | .length = SZ_1M, | 49 | .length = SZ_8M, |
51 | .type = MT_DEVICE | 50 | .type = MT_DEVICE, |
52 | }, { | 51 | }, |
53 | .virtual = 0xfe400000, | ||
54 | .pfn = __phys_to_pfn(0x10400000), | ||
55 | .length = SZ_1M, | ||
56 | .type = MT_DEVICE | ||
57 | } | ||
58 | }; | 52 | }; |
59 | 53 | ||
60 | static void __init | 54 | static void __init |