diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-31 21:03:23 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-31 21:03:23 -0400 |
commit | 50440c6dcccbf90ee3629407cb13ca09cab7d900 (patch) | |
tree | 6441432e78ec884863e5104ad4893e2a3dbe8059 | |
parent | 09d692e6ff50e455f936e7e114e11f6ec5e0ea33 (diff) | |
parent | 55fee8d7f7cb011d7f161cf816220ac74e34b6b1 (diff) |
Merge branch 'i2c-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging
* 'i2c-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging:
i2c-i801: Add PCI idents for Patsburg 'IDF' SMBus controllers
i2c-i801: Handle multiple instances instead of keeping global state
i2c-i801: Add Intel Patsburg device ID
i2c: Drop unused I2C_CLASS_TV flags
-rw-r--r-- | Documentation/i2c/busses/i2c-i801 | 6 | ||||
-rw-r--r-- | drivers/i2c/busses/Kconfig | 1 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-i801.c | 333 | ||||
-rw-r--r-- | drivers/staging/tm6000/tm6000-i2c.c | 1 | ||||
-rw-r--r-- | include/linux/i2c.h | 2 | ||||
-rw-r--r-- | include/linux/pci_ids.h | 1 |
6 files changed, 196 insertions, 148 deletions
diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index e307914a3eda..93fe76e56522 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 | |||
@@ -15,10 +15,14 @@ Supported adapters: | |||
15 | * Intel 82801I (ICH9) | 15 | * Intel 82801I (ICH9) |
16 | * Intel EP80579 (Tolapai) | 16 | * Intel EP80579 (Tolapai) |
17 | * Intel 82801JI (ICH10) | 17 | * Intel 82801JI (ICH10) |
18 | * Intel 3400/5 Series (PCH) | 18 | * Intel 5/3400 Series (PCH) |
19 | * Intel Cougar Point (PCH) | 19 | * Intel Cougar Point (PCH) |
20 | * Intel Patsburg (PCH) | ||
20 | Datasheets: Publicly available at the Intel website | 21 | Datasheets: Publicly available at the Intel website |
21 | 22 | ||
23 | On Intel Patsburg and later chipsets, both the normal host SMBus controller | ||
24 | and the additional 'Integrated Device Function' controllers are supported. | ||
25 | |||
22 | Authors: | 26 | Authors: |
23 | Mark Studebaker <mdsxyz123@yahoo.com> | 27 | Mark Studebaker <mdsxyz123@yahoo.com> |
24 | Jean Delvare <khali@linux-fr.org> | 28 | Jean Delvare <khali@linux-fr.org> |
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index c950be3cce21..3a6321cb8030 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig | |||
@@ -99,6 +99,7 @@ config I2C_I801 | |||
99 | ICH10 | 99 | ICH10 |
100 | 5/3400 Series (PCH) | 100 | 5/3400 Series (PCH) |
101 | Cougar Point (PCH) | 101 | Cougar Point (PCH) |
102 | Patsburg (PCH) | ||
102 | 103 | ||
103 | This driver can also be built as a module. If so, the module | 104 | This driver can also be built as a module. If so, the module |
104 | will be called i2c-i801. | 105 | will be called i2c-i801. |
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 59d65981eed7..02835ce7ff4b 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c | |||
@@ -3,6 +3,8 @@ | |||
3 | Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker | 3 | Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker |
4 | <mdsxyz123@yahoo.com> | 4 | <mdsxyz123@yahoo.com> |
5 | Copyright (C) 2007, 2008 Jean Delvare <khali@linux-fr.org> | 5 | Copyright (C) 2007, 2008 Jean Delvare <khali@linux-fr.org> |
6 | Copyright (C) 2010 Intel Corporation, | ||
7 | David Woodhouse <dwmw2@infradead.org> | ||
6 | 8 | ||
7 | This program is free software; you can redistribute it and/or modify | 9 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | 10 | it under the terms of the GNU General Public License as published by |
@@ -43,6 +45,10 @@ | |||
43 | ICH10 0x3a60 32 hard yes yes yes | 45 | ICH10 0x3a60 32 hard yes yes yes |
44 | 5/3400 Series (PCH) 0x3b30 32 hard yes yes yes | 46 | 5/3400 Series (PCH) 0x3b30 32 hard yes yes yes |
45 | Cougar Point (PCH) 0x1c22 32 hard yes yes yes | 47 | Cougar Point (PCH) 0x1c22 32 hard yes yes yes |
48 | Patsburg (PCH) 0x1d22 32 hard yes yes yes | ||
49 | Patsburg (PCH) IDF 0x1d70 32 hard yes yes yes | ||
50 | Patsburg (PCH) IDF 0x1d71 32 hard yes yes yes | ||
51 | Patsburg (PCH) IDF 0x1d72 32 hard yes yes yes | ||
46 | 52 | ||
47 | Features supported by this driver: | 53 | Features supported by this driver: |
48 | Software PEC no | 54 | Software PEC no |
@@ -50,12 +56,11 @@ | |||
50 | Block buffer yes | 56 | Block buffer yes |
51 | Block process call transaction no | 57 | Block process call transaction no |
52 | I2C block read transaction yes (doesn't use the block buffer) | 58 | I2C block read transaction yes (doesn't use the block buffer) |
59 | Slave mode no | ||
53 | 60 | ||
54 | See the file Documentation/i2c/busses/i2c-i801 for details. | 61 | See the file Documentation/i2c/busses/i2c-i801 for details. |
55 | */ | 62 | */ |
56 | 63 | ||
57 | /* Note: we assume there can only be one I801, with one SMBus interface */ | ||
58 | |||
59 | #include <linux/module.h> | 64 | #include <linux/module.h> |
60 | #include <linux/pci.h> | 65 | #include <linux/pci.h> |
61 | #include <linux/kernel.h> | 66 | #include <linux/kernel.h> |
@@ -69,16 +74,16 @@ | |||
69 | #include <linux/dmi.h> | 74 | #include <linux/dmi.h> |
70 | 75 | ||
71 | /* I801 SMBus address offsets */ | 76 | /* I801 SMBus address offsets */ |
72 | #define SMBHSTSTS (0 + i801_smba) | 77 | #define SMBHSTSTS(p) (0 + (p)->smba) |
73 | #define SMBHSTCNT (2 + i801_smba) | 78 | #define SMBHSTCNT(p) (2 + (p)->smba) |
74 | #define SMBHSTCMD (3 + i801_smba) | 79 | #define SMBHSTCMD(p) (3 + (p)->smba) |
75 | #define SMBHSTADD (4 + i801_smba) | 80 | #define SMBHSTADD(p) (4 + (p)->smba) |
76 | #define SMBHSTDAT0 (5 + i801_smba) | 81 | #define SMBHSTDAT0(p) (5 + (p)->smba) |
77 | #define SMBHSTDAT1 (6 + i801_smba) | 82 | #define SMBHSTDAT1(p) (6 + (p)->smba) |
78 | #define SMBBLKDAT (7 + i801_smba) | 83 | #define SMBBLKDAT(p) (7 + (p)->smba) |
79 | #define SMBPEC (8 + i801_smba) /* ICH3 and later */ | 84 | #define SMBPEC(p) (8 + (p)->smba) /* ICH3 and later */ |
80 | #define SMBAUXSTS (12 + i801_smba) /* ICH4 and later */ | 85 | #define SMBAUXSTS(p) (12 + (p)->smba) /* ICH4 and later */ |
81 | #define SMBAUXCTL (13 + i801_smba) /* ICH4 and later */ | 86 | #define SMBAUXCTL(p) (13 + (p)->smba) /* ICH4 and later */ |
82 | 87 | ||
83 | /* PCI Address Constants */ | 88 | /* PCI Address Constants */ |
84 | #define SMBBAR 4 | 89 | #define SMBBAR 4 |
@@ -127,16 +132,25 @@ | |||
127 | SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \ | 132 | SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \ |
128 | SMBHSTSTS_INTR) | 133 | SMBHSTSTS_INTR) |
129 | 134 | ||
130 | static unsigned long i801_smba; | 135 | /* Patsburg also has three 'Integrated Device Function' SMBus controllers */ |
131 | static unsigned char i801_original_hstcfg; | 136 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70 |
137 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71 | ||
138 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72 | ||
139 | |||
140 | struct i801_priv { | ||
141 | struct i2c_adapter adapter; | ||
142 | unsigned long smba; | ||
143 | unsigned char original_hstcfg; | ||
144 | struct pci_dev *pci_dev; | ||
145 | unsigned int features; | ||
146 | }; | ||
147 | |||
132 | static struct pci_driver i801_driver; | 148 | static struct pci_driver i801_driver; |
133 | static struct pci_dev *I801_dev; | ||
134 | 149 | ||
135 | #define FEATURE_SMBUS_PEC (1 << 0) | 150 | #define FEATURE_SMBUS_PEC (1 << 0) |
136 | #define FEATURE_BLOCK_BUFFER (1 << 1) | 151 | #define FEATURE_BLOCK_BUFFER (1 << 1) |
137 | #define FEATURE_BLOCK_PROC (1 << 2) | 152 | #define FEATURE_BLOCK_PROC (1 << 2) |
138 | #define FEATURE_I2C_BLOCK_READ (1 << 3) | 153 | #define FEATURE_I2C_BLOCK_READ (1 << 3) |
139 | static unsigned int i801_features; | ||
140 | 154 | ||
141 | static const char *i801_feature_names[] = { | 155 | static const char *i801_feature_names[] = { |
142 | "SMBus PEC", | 156 | "SMBus PEC", |
@@ -151,24 +165,24 @@ MODULE_PARM_DESC(disable_features, "Disable selected driver features"); | |||
151 | 165 | ||
152 | /* Make sure the SMBus host is ready to start transmitting. | 166 | /* Make sure the SMBus host is ready to start transmitting. |
153 | Return 0 if it is, -EBUSY if it is not. */ | 167 | Return 0 if it is, -EBUSY if it is not. */ |
154 | static int i801_check_pre(void) | 168 | static int i801_check_pre(struct i801_priv *priv) |
155 | { | 169 | { |
156 | int status; | 170 | int status; |
157 | 171 | ||
158 | status = inb_p(SMBHSTSTS); | 172 | status = inb_p(SMBHSTSTS(priv)); |
159 | if (status & SMBHSTSTS_HOST_BUSY) { | 173 | if (status & SMBHSTSTS_HOST_BUSY) { |
160 | dev_err(&I801_dev->dev, "SMBus is busy, can't use it!\n"); | 174 | dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n"); |
161 | return -EBUSY; | 175 | return -EBUSY; |
162 | } | 176 | } |
163 | 177 | ||
164 | status &= STATUS_FLAGS; | 178 | status &= STATUS_FLAGS; |
165 | if (status) { | 179 | if (status) { |
166 | dev_dbg(&I801_dev->dev, "Clearing status flags (%02x)\n", | 180 | dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n", |
167 | status); | 181 | status); |
168 | outb_p(status, SMBHSTSTS); | 182 | outb_p(status, SMBHSTSTS(priv)); |
169 | status = inb_p(SMBHSTSTS) & STATUS_FLAGS; | 183 | status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS; |
170 | if (status) { | 184 | if (status) { |
171 | dev_err(&I801_dev->dev, | 185 | dev_err(&priv->pci_dev->dev, |
172 | "Failed clearing status flags (%02x)\n", | 186 | "Failed clearing status flags (%02x)\n", |
173 | status); | 187 | status); |
174 | return -EBUSY; | 188 | return -EBUSY; |
@@ -179,48 +193,50 @@ static int i801_check_pre(void) | |||
179 | } | 193 | } |
180 | 194 | ||
181 | /* Convert the status register to an error code, and clear it. */ | 195 | /* Convert the status register to an error code, and clear it. */ |
182 | static int i801_check_post(int status, int timeout) | 196 | static int i801_check_post(struct i801_priv *priv, int status, int timeout) |
183 | { | 197 | { |
184 | int result = 0; | 198 | int result = 0; |
185 | 199 | ||
186 | /* If the SMBus is still busy, we give up */ | 200 | /* If the SMBus is still busy, we give up */ |
187 | if (timeout) { | 201 | if (timeout) { |
188 | dev_err(&I801_dev->dev, "Transaction timeout\n"); | 202 | dev_err(&priv->pci_dev->dev, "Transaction timeout\n"); |
189 | /* try to stop the current command */ | 203 | /* try to stop the current command */ |
190 | dev_dbg(&I801_dev->dev, "Terminating the current operation\n"); | 204 | dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n"); |
191 | outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT); | 205 | outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL, |
206 | SMBHSTCNT(priv)); | ||
192 | msleep(1); | 207 | msleep(1); |
193 | outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL), SMBHSTCNT); | 208 | outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL), |
209 | SMBHSTCNT(priv)); | ||
194 | 210 | ||
195 | /* Check if it worked */ | 211 | /* Check if it worked */ |
196 | status = inb_p(SMBHSTSTS); | 212 | status = inb_p(SMBHSTSTS(priv)); |
197 | if ((status & SMBHSTSTS_HOST_BUSY) || | 213 | if ((status & SMBHSTSTS_HOST_BUSY) || |
198 | !(status & SMBHSTSTS_FAILED)) | 214 | !(status & SMBHSTSTS_FAILED)) |
199 | dev_err(&I801_dev->dev, | 215 | dev_err(&priv->pci_dev->dev, |
200 | "Failed terminating the transaction\n"); | 216 | "Failed terminating the transaction\n"); |
201 | outb_p(STATUS_FLAGS, SMBHSTSTS); | 217 | outb_p(STATUS_FLAGS, SMBHSTSTS(priv)); |
202 | return -ETIMEDOUT; | 218 | return -ETIMEDOUT; |
203 | } | 219 | } |
204 | 220 | ||
205 | if (status & SMBHSTSTS_FAILED) { | 221 | if (status & SMBHSTSTS_FAILED) { |
206 | result = -EIO; | 222 | result = -EIO; |
207 | dev_err(&I801_dev->dev, "Transaction failed\n"); | 223 | dev_err(&priv->pci_dev->dev, "Transaction failed\n"); |
208 | } | 224 | } |
209 | if (status & SMBHSTSTS_DEV_ERR) { | 225 | if (status & SMBHSTSTS_DEV_ERR) { |
210 | result = -ENXIO; | 226 | result = -ENXIO; |
211 | dev_dbg(&I801_dev->dev, "No response\n"); | 227 | dev_dbg(&priv->pci_dev->dev, "No response\n"); |
212 | } | 228 | } |
213 | if (status & SMBHSTSTS_BUS_ERR) { | 229 | if (status & SMBHSTSTS_BUS_ERR) { |
214 | result = -EAGAIN; | 230 | result = -EAGAIN; |
215 | dev_dbg(&I801_dev->dev, "Lost arbitration\n"); | 231 | dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n"); |
216 | } | 232 | } |
217 | 233 | ||
218 | if (result) { | 234 | if (result) { |
219 | /* Clear error flags */ | 235 | /* Clear error flags */ |
220 | outb_p(status & STATUS_FLAGS, SMBHSTSTS); | 236 | outb_p(status & STATUS_FLAGS, SMBHSTSTS(priv)); |
221 | status = inb_p(SMBHSTSTS) & STATUS_FLAGS; | 237 | status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS; |
222 | if (status) { | 238 | if (status) { |
223 | dev_warn(&I801_dev->dev, "Failed clearing status " | 239 | dev_warn(&priv->pci_dev->dev, "Failed clearing status " |
224 | "flags at end of transaction (%02x)\n", | 240 | "flags at end of transaction (%02x)\n", |
225 | status); | 241 | status); |
226 | } | 242 | } |
@@ -229,86 +245,88 @@ static int i801_check_post(int status, int timeout) | |||
229 | return result; | 245 | return result; |
230 | } | 246 | } |
231 | 247 | ||
232 | static int i801_transaction(int xact) | 248 | static int i801_transaction(struct i801_priv *priv, int xact) |
233 | { | 249 | { |
234 | int status; | 250 | int status; |
235 | int result; | 251 | int result; |
236 | int timeout = 0; | 252 | int timeout = 0; |
237 | 253 | ||
238 | result = i801_check_pre(); | 254 | result = i801_check_pre(priv); |
239 | if (result < 0) | 255 | if (result < 0) |
240 | return result; | 256 | return result; |
241 | 257 | ||
242 | /* the current contents of SMBHSTCNT can be overwritten, since PEC, | 258 | /* the current contents of SMBHSTCNT can be overwritten, since PEC, |
243 | * INTREN, SMBSCMD are passed in xact */ | 259 | * INTREN, SMBSCMD are passed in xact */ |
244 | outb_p(xact | I801_START, SMBHSTCNT); | 260 | outb_p(xact | I801_START, SMBHSTCNT(priv)); |
245 | 261 | ||
246 | /* We will always wait for a fraction of a second! */ | 262 | /* We will always wait for a fraction of a second! */ |
247 | do { | 263 | do { |
248 | msleep(1); | 264 | msleep(1); |
249 | status = inb_p(SMBHSTSTS); | 265 | status = inb_p(SMBHSTSTS(priv)); |
250 | } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT)); | 266 | } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT)); |
251 | 267 | ||
252 | result = i801_check_post(status, timeout > MAX_TIMEOUT); | 268 | result = i801_check_post(priv, status, timeout > MAX_TIMEOUT); |
253 | if (result < 0) | 269 | if (result < 0) |
254 | return result; | 270 | return result; |
255 | 271 | ||
256 | outb_p(SMBHSTSTS_INTR, SMBHSTSTS); | 272 | outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv)); |
257 | return 0; | 273 | return 0; |
258 | } | 274 | } |
259 | 275 | ||
260 | /* wait for INTR bit as advised by Intel */ | 276 | /* wait for INTR bit as advised by Intel */ |
261 | static void i801_wait_hwpec(void) | 277 | static void i801_wait_hwpec(struct i801_priv *priv) |
262 | { | 278 | { |
263 | int timeout = 0; | 279 | int timeout = 0; |
264 | int status; | 280 | int status; |
265 | 281 | ||
266 | do { | 282 | do { |
267 | msleep(1); | 283 | msleep(1); |
268 | status = inb_p(SMBHSTSTS); | 284 | status = inb_p(SMBHSTSTS(priv)); |
269 | } while ((!(status & SMBHSTSTS_INTR)) | 285 | } while ((!(status & SMBHSTSTS_INTR)) |
270 | && (timeout++ < MAX_TIMEOUT)); | 286 | && (timeout++ < MAX_TIMEOUT)); |
271 | 287 | ||
272 | if (timeout > MAX_TIMEOUT) | 288 | if (timeout > MAX_TIMEOUT) |
273 | dev_dbg(&I801_dev->dev, "PEC Timeout!\n"); | 289 | dev_dbg(&priv->pci_dev->dev, "PEC Timeout!\n"); |
274 | 290 | ||
275 | outb_p(status, SMBHSTSTS); | 291 | outb_p(status, SMBHSTSTS(priv)); |
276 | } | 292 | } |
277 | 293 | ||
278 | static int i801_block_transaction_by_block(union i2c_smbus_data *data, | 294 | static int i801_block_transaction_by_block(struct i801_priv *priv, |
295 | union i2c_smbus_data *data, | ||
279 | char read_write, int hwpec) | 296 | char read_write, int hwpec) |
280 | { | 297 | { |
281 | int i, len; | 298 | int i, len; |
282 | int status; | 299 | int status; |
283 | 300 | ||
284 | inb_p(SMBHSTCNT); /* reset the data buffer index */ | 301 | inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */ |
285 | 302 | ||
286 | /* Use 32-byte buffer to process this transaction */ | 303 | /* Use 32-byte buffer to process this transaction */ |
287 | if (read_write == I2C_SMBUS_WRITE) { | 304 | if (read_write == I2C_SMBUS_WRITE) { |
288 | len = data->block[0]; | 305 | len = data->block[0]; |
289 | outb_p(len, SMBHSTDAT0); | 306 | outb_p(len, SMBHSTDAT0(priv)); |
290 | for (i = 0; i < len; i++) | 307 | for (i = 0; i < len; i++) |
291 | outb_p(data->block[i+1], SMBBLKDAT); | 308 | outb_p(data->block[i+1], SMBBLKDAT(priv)); |
292 | } | 309 | } |
293 | 310 | ||
294 | status = i801_transaction(I801_BLOCK_DATA | ENABLE_INT9 | | 311 | status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 | |
295 | I801_PEC_EN * hwpec); | 312 | I801_PEC_EN * hwpec); |
296 | if (status) | 313 | if (status) |
297 | return status; | 314 | return status; |
298 | 315 | ||
299 | if (read_write == I2C_SMBUS_READ) { | 316 | if (read_write == I2C_SMBUS_READ) { |
300 | len = inb_p(SMBHSTDAT0); | 317 | len = inb_p(SMBHSTDAT0(priv)); |
301 | if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) | 318 | if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) |
302 | return -EPROTO; | 319 | return -EPROTO; |
303 | 320 | ||
304 | data->block[0] = len; | 321 | data->block[0] = len; |
305 | for (i = 0; i < len; i++) | 322 | for (i = 0; i < len; i++) |
306 | data->block[i + 1] = inb_p(SMBBLKDAT); | 323 | data->block[i + 1] = inb_p(SMBBLKDAT(priv)); |
307 | } | 324 | } |
308 | return 0; | 325 | return 0; |
309 | } | 326 | } |
310 | 327 | ||
311 | static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data, | 328 | static int i801_block_transaction_byte_by_byte(struct i801_priv *priv, |
329 | union i2c_smbus_data *data, | ||
312 | char read_write, int command, | 330 | char read_write, int command, |
313 | int hwpec) | 331 | int hwpec) |
314 | { | 332 | { |
@@ -318,15 +336,15 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data, | |||
318 | int result; | 336 | int result; |
319 | int timeout; | 337 | int timeout; |
320 | 338 | ||
321 | result = i801_check_pre(); | 339 | result = i801_check_pre(priv); |
322 | if (result < 0) | 340 | if (result < 0) |
323 | return result; | 341 | return result; |
324 | 342 | ||
325 | len = data->block[0]; | 343 | len = data->block[0]; |
326 | 344 | ||
327 | if (read_write == I2C_SMBUS_WRITE) { | 345 | if (read_write == I2C_SMBUS_WRITE) { |
328 | outb_p(len, SMBHSTDAT0); | 346 | outb_p(len, SMBHSTDAT0(priv)); |
329 | outb_p(data->block[1], SMBBLKDAT); | 347 | outb_p(data->block[1], SMBBLKDAT(priv)); |
330 | } | 348 | } |
331 | 349 | ||
332 | for (i = 1; i <= len; i++) { | 350 | for (i = 1; i <= len; i++) { |
@@ -342,34 +360,37 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data, | |||
342 | else | 360 | else |
343 | smbcmd = I801_BLOCK_DATA; | 361 | smbcmd = I801_BLOCK_DATA; |
344 | } | 362 | } |
345 | outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT); | 363 | outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv)); |
346 | 364 | ||
347 | if (i == 1) | 365 | if (i == 1) |
348 | outb_p(inb(SMBHSTCNT) | I801_START, SMBHSTCNT); | 366 | outb_p(inb(SMBHSTCNT(priv)) | I801_START, |
367 | SMBHSTCNT(priv)); | ||
349 | 368 | ||
350 | /* We will always wait for a fraction of a second! */ | 369 | /* We will always wait for a fraction of a second! */ |
351 | timeout = 0; | 370 | timeout = 0; |
352 | do { | 371 | do { |
353 | msleep(1); | 372 | msleep(1); |
354 | status = inb_p(SMBHSTSTS); | 373 | status = inb_p(SMBHSTSTS(priv)); |
355 | } while ((!(status & SMBHSTSTS_BYTE_DONE)) | 374 | } while ((!(status & SMBHSTSTS_BYTE_DONE)) |
356 | && (timeout++ < MAX_TIMEOUT)); | 375 | && (timeout++ < MAX_TIMEOUT)); |
357 | 376 | ||
358 | result = i801_check_post(status, timeout > MAX_TIMEOUT); | 377 | result = i801_check_post(priv, status, timeout > MAX_TIMEOUT); |
359 | if (result < 0) | 378 | if (result < 0) |
360 | return result; | 379 | return result; |
361 | 380 | ||
362 | if (i == 1 && read_write == I2C_SMBUS_READ | 381 | if (i == 1 && read_write == I2C_SMBUS_READ |
363 | && command != I2C_SMBUS_I2C_BLOCK_DATA) { | 382 | && command != I2C_SMBUS_I2C_BLOCK_DATA) { |
364 | len = inb_p(SMBHSTDAT0); | 383 | len = inb_p(SMBHSTDAT0(priv)); |
365 | if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) { | 384 | if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) { |
366 | dev_err(&I801_dev->dev, | 385 | dev_err(&priv->pci_dev->dev, |
367 | "Illegal SMBus block read size %d\n", | 386 | "Illegal SMBus block read size %d\n", |
368 | len); | 387 | len); |
369 | /* Recover */ | 388 | /* Recover */ |
370 | while (inb_p(SMBHSTSTS) & SMBHSTSTS_HOST_BUSY) | 389 | while (inb_p(SMBHSTSTS(priv)) & |
371 | outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS); | 390 | SMBHSTSTS_HOST_BUSY) |
372 | outb_p(SMBHSTSTS_INTR, SMBHSTSTS); | 391 | outb_p(SMBHSTSTS_BYTE_DONE, |
392 | SMBHSTSTS(priv)); | ||
393 | outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv)); | ||
373 | return -EPROTO; | 394 | return -EPROTO; |
374 | } | 395 | } |
375 | data->block[0] = len; | 396 | data->block[0] = len; |
@@ -377,27 +398,28 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data, | |||
377 | 398 | ||
378 | /* Retrieve/store value in SMBBLKDAT */ | 399 | /* Retrieve/store value in SMBBLKDAT */ |
379 | if (read_write == I2C_SMBUS_READ) | 400 | if (read_write == I2C_SMBUS_READ) |
380 | data->block[i] = inb_p(SMBBLKDAT); | 401 | data->block[i] = inb_p(SMBBLKDAT(priv)); |
381 | if (read_write == I2C_SMBUS_WRITE && i+1 <= len) | 402 | if (read_write == I2C_SMBUS_WRITE && i+1 <= len) |
382 | outb_p(data->block[i+1], SMBBLKDAT); | 403 | outb_p(data->block[i+1], SMBBLKDAT(priv)); |
383 | 404 | ||
384 | /* signals SMBBLKDAT ready */ | 405 | /* signals SMBBLKDAT ready */ |
385 | outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS); | 406 | outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS(priv)); |
386 | } | 407 | } |
387 | 408 | ||
388 | return 0; | 409 | return 0; |
389 | } | 410 | } |
390 | 411 | ||
391 | static int i801_set_block_buffer_mode(void) | 412 | static int i801_set_block_buffer_mode(struct i801_priv *priv) |
392 | { | 413 | { |
393 | outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_E32B, SMBAUXCTL); | 414 | outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv)); |
394 | if ((inb_p(SMBAUXCTL) & SMBAUXCTL_E32B) == 0) | 415 | if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0) |
395 | return -EIO; | 416 | return -EIO; |
396 | return 0; | 417 | return 0; |
397 | } | 418 | } |
398 | 419 | ||
399 | /* Block transaction function */ | 420 | /* Block transaction function */ |
400 | static int i801_block_transaction(union i2c_smbus_data *data, char read_write, | 421 | static int i801_block_transaction(struct i801_priv *priv, |
422 | union i2c_smbus_data *data, char read_write, | ||
401 | int command, int hwpec) | 423 | int command, int hwpec) |
402 | { | 424 | { |
403 | int result = 0; | 425 | int result = 0; |
@@ -406,11 +428,11 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write, | |||
406 | if (command == I2C_SMBUS_I2C_BLOCK_DATA) { | 428 | if (command == I2C_SMBUS_I2C_BLOCK_DATA) { |
407 | if (read_write == I2C_SMBUS_WRITE) { | 429 | if (read_write == I2C_SMBUS_WRITE) { |
408 | /* set I2C_EN bit in configuration register */ | 430 | /* set I2C_EN bit in configuration register */ |
409 | pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc); | 431 | pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc); |
410 | pci_write_config_byte(I801_dev, SMBHSTCFG, | 432 | pci_write_config_byte(priv->pci_dev, SMBHSTCFG, |
411 | hostc | SMBHSTCFG_I2C_EN); | 433 | hostc | SMBHSTCFG_I2C_EN); |
412 | } else if (!(i801_features & FEATURE_I2C_BLOCK_READ)) { | 434 | } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) { |
413 | dev_err(&I801_dev->dev, | 435 | dev_err(&priv->pci_dev->dev, |
414 | "I2C block read is unsupported!\n"); | 436 | "I2C block read is unsupported!\n"); |
415 | return -EOPNOTSUPP; | 437 | return -EOPNOTSUPP; |
416 | } | 438 | } |
@@ -429,22 +451,23 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write, | |||
429 | /* Experience has shown that the block buffer can only be used for | 451 | /* Experience has shown that the block buffer can only be used for |
430 | SMBus (not I2C) block transactions, even though the datasheet | 452 | SMBus (not I2C) block transactions, even though the datasheet |
431 | doesn't mention this limitation. */ | 453 | doesn't mention this limitation. */ |
432 | if ((i801_features & FEATURE_BLOCK_BUFFER) | 454 | if ((priv->features & FEATURE_BLOCK_BUFFER) |
433 | && command != I2C_SMBUS_I2C_BLOCK_DATA | 455 | && command != I2C_SMBUS_I2C_BLOCK_DATA |
434 | && i801_set_block_buffer_mode() == 0) | 456 | && i801_set_block_buffer_mode(priv) == 0) |
435 | result = i801_block_transaction_by_block(data, read_write, | 457 | result = i801_block_transaction_by_block(priv, data, |
436 | hwpec); | 458 | read_write, hwpec); |
437 | else | 459 | else |
438 | result = i801_block_transaction_byte_by_byte(data, read_write, | 460 | result = i801_block_transaction_byte_by_byte(priv, data, |
461 | read_write, | ||
439 | command, hwpec); | 462 | command, hwpec); |
440 | 463 | ||
441 | if (result == 0 && hwpec) | 464 | if (result == 0 && hwpec) |
442 | i801_wait_hwpec(); | 465 | i801_wait_hwpec(priv); |
443 | 466 | ||
444 | if (command == I2C_SMBUS_I2C_BLOCK_DATA | 467 | if (command == I2C_SMBUS_I2C_BLOCK_DATA |
445 | && read_write == I2C_SMBUS_WRITE) { | 468 | && read_write == I2C_SMBUS_WRITE) { |
446 | /* restore saved configuration register value */ | 469 | /* restore saved configuration register value */ |
447 | pci_write_config_byte(I801_dev, SMBHSTCFG, hostc); | 470 | pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc); |
448 | } | 471 | } |
449 | return result; | 472 | return result; |
450 | } | 473 | } |
@@ -457,81 +480,85 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, | |||
457 | int hwpec; | 480 | int hwpec; |
458 | int block = 0; | 481 | int block = 0; |
459 | int ret, xact = 0; | 482 | int ret, xact = 0; |
483 | struct i801_priv *priv = i2c_get_adapdata(adap); | ||
460 | 484 | ||
461 | hwpec = (i801_features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC) | 485 | hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC) |
462 | && size != I2C_SMBUS_QUICK | 486 | && size != I2C_SMBUS_QUICK |
463 | && size != I2C_SMBUS_I2C_BLOCK_DATA; | 487 | && size != I2C_SMBUS_I2C_BLOCK_DATA; |
464 | 488 | ||
465 | switch (size) { | 489 | switch (size) { |
466 | case I2C_SMBUS_QUICK: | 490 | case I2C_SMBUS_QUICK: |
467 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | 491 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
468 | SMBHSTADD); | 492 | SMBHSTADD(priv)); |
469 | xact = I801_QUICK; | 493 | xact = I801_QUICK; |
470 | break; | 494 | break; |
471 | case I2C_SMBUS_BYTE: | 495 | case I2C_SMBUS_BYTE: |
472 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | 496 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
473 | SMBHSTADD); | 497 | SMBHSTADD(priv)); |
474 | if (read_write == I2C_SMBUS_WRITE) | 498 | if (read_write == I2C_SMBUS_WRITE) |
475 | outb_p(command, SMBHSTCMD); | 499 | outb_p(command, SMBHSTCMD(priv)); |
476 | xact = I801_BYTE; | 500 | xact = I801_BYTE; |
477 | break; | 501 | break; |
478 | case I2C_SMBUS_BYTE_DATA: | 502 | case I2C_SMBUS_BYTE_DATA: |
479 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | 503 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
480 | SMBHSTADD); | 504 | SMBHSTADD(priv)); |
481 | outb_p(command, SMBHSTCMD); | 505 | outb_p(command, SMBHSTCMD(priv)); |
482 | if (read_write == I2C_SMBUS_WRITE) | 506 | if (read_write == I2C_SMBUS_WRITE) |
483 | outb_p(data->byte, SMBHSTDAT0); | 507 | outb_p(data->byte, SMBHSTDAT0(priv)); |
484 | xact = I801_BYTE_DATA; | 508 | xact = I801_BYTE_DATA; |
485 | break; | 509 | break; |
486 | case I2C_SMBUS_WORD_DATA: | 510 | case I2C_SMBUS_WORD_DATA: |
487 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | 511 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
488 | SMBHSTADD); | 512 | SMBHSTADD(priv)); |
489 | outb_p(command, SMBHSTCMD); | 513 | outb_p(command, SMBHSTCMD(priv)); |
490 | if (read_write == I2C_SMBUS_WRITE) { | 514 | if (read_write == I2C_SMBUS_WRITE) { |
491 | outb_p(data->word & 0xff, SMBHSTDAT0); | 515 | outb_p(data->word & 0xff, SMBHSTDAT0(priv)); |
492 | outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1); | 516 | outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv)); |
493 | } | 517 | } |
494 | xact = I801_WORD_DATA; | 518 | xact = I801_WORD_DATA; |
495 | break; | 519 | break; |
496 | case I2C_SMBUS_BLOCK_DATA: | 520 | case I2C_SMBUS_BLOCK_DATA: |
497 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | 521 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
498 | SMBHSTADD); | 522 | SMBHSTADD(priv)); |
499 | outb_p(command, SMBHSTCMD); | 523 | outb_p(command, SMBHSTCMD(priv)); |
500 | block = 1; | 524 | block = 1; |
501 | break; | 525 | break; |
502 | case I2C_SMBUS_I2C_BLOCK_DATA: | 526 | case I2C_SMBUS_I2C_BLOCK_DATA: |
503 | /* NB: page 240 of ICH5 datasheet shows that the R/#W | 527 | /* NB: page 240 of ICH5 datasheet shows that the R/#W |
504 | * bit should be cleared here, even when reading */ | 528 | * bit should be cleared here, even when reading */ |
505 | outb_p((addr & 0x7f) << 1, SMBHSTADD); | 529 | outb_p((addr & 0x7f) << 1, SMBHSTADD(priv)); |
506 | if (read_write == I2C_SMBUS_READ) { | 530 | if (read_write == I2C_SMBUS_READ) { |
507 | /* NB: page 240 of ICH5 datasheet also shows | 531 | /* NB: page 240 of ICH5 datasheet also shows |
508 | * that DATA1 is the cmd field when reading */ | 532 | * that DATA1 is the cmd field when reading */ |
509 | outb_p(command, SMBHSTDAT1); | 533 | outb_p(command, SMBHSTDAT1(priv)); |
510 | } else | 534 | } else |
511 | outb_p(command, SMBHSTCMD); | 535 | outb_p(command, SMBHSTCMD(priv)); |
512 | block = 1; | 536 | block = 1; |
513 | break; | 537 | break; |
514 | default: | 538 | default: |
515 | dev_err(&I801_dev->dev, "Unsupported transaction %d\n", size); | 539 | dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n", |
540 | size); | ||
516 | return -EOPNOTSUPP; | 541 | return -EOPNOTSUPP; |
517 | } | 542 | } |
518 | 543 | ||
519 | if (hwpec) /* enable/disable hardware PEC */ | 544 | if (hwpec) /* enable/disable hardware PEC */ |
520 | outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_CRC, SMBAUXCTL); | 545 | outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv)); |
521 | else | 546 | else |
522 | outb_p(inb_p(SMBAUXCTL) & (~SMBAUXCTL_CRC), SMBAUXCTL); | 547 | outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC), |
548 | SMBAUXCTL(priv)); | ||
523 | 549 | ||
524 | if (block) | 550 | if (block) |
525 | ret = i801_block_transaction(data, read_write, size, hwpec); | 551 | ret = i801_block_transaction(priv, data, read_write, size, |
552 | hwpec); | ||
526 | else | 553 | else |
527 | ret = i801_transaction(xact | ENABLE_INT9); | 554 | ret = i801_transaction(priv, xact | ENABLE_INT9); |
528 | 555 | ||
529 | /* Some BIOSes don't like it when PEC is enabled at reboot or resume | 556 | /* Some BIOSes don't like it when PEC is enabled at reboot or resume |
530 | time, so we forcibly disable it after every transaction. Turn off | 557 | time, so we forcibly disable it after every transaction. Turn off |
531 | E32B for the same reason. */ | 558 | E32B for the same reason. */ |
532 | if (hwpec || block) | 559 | if (hwpec || block) |
533 | outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), | 560 | outb_p(inb_p(SMBAUXCTL(priv)) & |
534 | SMBAUXCTL); | 561 | ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); |
535 | 562 | ||
536 | if (block) | 563 | if (block) |
537 | return ret; | 564 | return ret; |
@@ -543,10 +570,11 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, | |||
543 | switch (xact & 0x7f) { | 570 | switch (xact & 0x7f) { |
544 | case I801_BYTE: /* Result put in SMBHSTDAT0 */ | 571 | case I801_BYTE: /* Result put in SMBHSTDAT0 */ |
545 | case I801_BYTE_DATA: | 572 | case I801_BYTE_DATA: |
546 | data->byte = inb_p(SMBHSTDAT0); | 573 | data->byte = inb_p(SMBHSTDAT0(priv)); |
547 | break; | 574 | break; |
548 | case I801_WORD_DATA: | 575 | case I801_WORD_DATA: |
549 | data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8); | 576 | data->word = inb_p(SMBHSTDAT0(priv)) + |
577 | (inb_p(SMBHSTDAT1(priv)) << 8); | ||
550 | break; | 578 | break; |
551 | } | 579 | } |
552 | return 0; | 580 | return 0; |
@@ -555,11 +583,13 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, | |||
555 | 583 | ||
556 | static u32 i801_func(struct i2c_adapter *adapter) | 584 | static u32 i801_func(struct i2c_adapter *adapter) |
557 | { | 585 | { |
586 | struct i801_priv *priv = i2c_get_adapdata(adapter); | ||
587 | |||
558 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | | 588 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | |
559 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | | 589 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | |
560 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | | 590 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | |
561 | ((i801_features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | | 591 | ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | |
562 | ((i801_features & FEATURE_I2C_BLOCK_READ) ? | 592 | ((priv->features & FEATURE_I2C_BLOCK_READ) ? |
563 | I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0); | 593 | I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0); |
564 | } | 594 | } |
565 | 595 | ||
@@ -568,12 +598,6 @@ static const struct i2c_algorithm smbus_algorithm = { | |||
568 | .functionality = i801_func, | 598 | .functionality = i801_func, |
569 | }; | 599 | }; |
570 | 600 | ||
571 | static struct i2c_adapter i801_adapter = { | ||
572 | .owner = THIS_MODULE, | ||
573 | .class = I2C_CLASS_HWMON | I2C_CLASS_SPD, | ||
574 | .algo = &smbus_algorithm, | ||
575 | }; | ||
576 | |||
577 | static const struct pci_device_id i801_ids[] = { | 601 | static const struct pci_device_id i801_ids[] = { |
578 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) }, | 602 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) }, |
579 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) }, | 603 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) }, |
@@ -592,6 +616,10 @@ static const struct pci_device_id i801_ids[] = { | |||
592 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) }, | 616 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) }, |
593 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) }, | 617 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) }, |
594 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) }, | 618 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) }, |
619 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) }, | ||
620 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) }, | ||
621 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) }, | ||
622 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) }, | ||
595 | { 0, } | 623 | { 0, } |
596 | }; | 624 | }; |
597 | 625 | ||
@@ -704,16 +732,25 @@ static int __devinit i801_probe(struct pci_dev *dev, | |||
704 | { | 732 | { |
705 | unsigned char temp; | 733 | unsigned char temp; |
706 | int err, i; | 734 | int err, i; |
735 | struct i801_priv *priv; | ||
736 | |||
737 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | ||
738 | if (!priv) | ||
739 | return -ENOMEM; | ||
740 | |||
741 | i2c_set_adapdata(&priv->adapter, priv); | ||
742 | priv->adapter.owner = THIS_MODULE; | ||
743 | priv->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD; | ||
744 | priv->adapter.algo = &smbus_algorithm; | ||
707 | 745 | ||
708 | I801_dev = dev; | 746 | priv->pci_dev = dev; |
709 | i801_features = 0; | ||
710 | switch (dev->device) { | 747 | switch (dev->device) { |
711 | default: | 748 | default: |
712 | i801_features |= FEATURE_I2C_BLOCK_READ; | 749 | priv->features |= FEATURE_I2C_BLOCK_READ; |
713 | /* fall through */ | 750 | /* fall through */ |
714 | case PCI_DEVICE_ID_INTEL_82801DB_3: | 751 | case PCI_DEVICE_ID_INTEL_82801DB_3: |
715 | i801_features |= FEATURE_SMBUS_PEC; | 752 | priv->features |= FEATURE_SMBUS_PEC; |
716 | i801_features |= FEATURE_BLOCK_BUFFER; | 753 | priv->features |= FEATURE_BLOCK_BUFFER; |
717 | /* fall through */ | 754 | /* fall through */ |
718 | case PCI_DEVICE_ID_INTEL_82801CA_3: | 755 | case PCI_DEVICE_ID_INTEL_82801CA_3: |
719 | case PCI_DEVICE_ID_INTEL_82801BA_2: | 756 | case PCI_DEVICE_ID_INTEL_82801BA_2: |
@@ -724,11 +761,11 @@ static int __devinit i801_probe(struct pci_dev *dev, | |||
724 | 761 | ||
725 | /* Disable features on user request */ | 762 | /* Disable features on user request */ |
726 | for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) { | 763 | for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) { |
727 | if (i801_features & disable_features & (1 << i)) | 764 | if (priv->features & disable_features & (1 << i)) |
728 | dev_notice(&dev->dev, "%s disabled by user\n", | 765 | dev_notice(&dev->dev, "%s disabled by user\n", |
729 | i801_feature_names[i]); | 766 | i801_feature_names[i]); |
730 | } | 767 | } |
731 | i801_features &= ~disable_features; | 768 | priv->features &= ~disable_features; |
732 | 769 | ||
733 | err = pci_enable_device(dev); | 770 | err = pci_enable_device(dev); |
734 | if (err) { | 771 | if (err) { |
@@ -738,8 +775,8 @@ static int __devinit i801_probe(struct pci_dev *dev, | |||
738 | } | 775 | } |
739 | 776 | ||
740 | /* Determine the address of the SMBus area */ | 777 | /* Determine the address of the SMBus area */ |
741 | i801_smba = pci_resource_start(dev, SMBBAR); | 778 | priv->smba = pci_resource_start(dev, SMBBAR); |
742 | if (!i801_smba) { | 779 | if (!priv->smba) { |
743 | dev_err(&dev->dev, "SMBus base address uninitialized, " | 780 | dev_err(&dev->dev, "SMBus base address uninitialized, " |
744 | "upgrade BIOS\n"); | 781 | "upgrade BIOS\n"); |
745 | err = -ENODEV; | 782 | err = -ENODEV; |
@@ -755,19 +792,19 @@ static int __devinit i801_probe(struct pci_dev *dev, | |||
755 | err = pci_request_region(dev, SMBBAR, i801_driver.name); | 792 | err = pci_request_region(dev, SMBBAR, i801_driver.name); |
756 | if (err) { | 793 | if (err) { |
757 | dev_err(&dev->dev, "Failed to request SMBus region " | 794 | dev_err(&dev->dev, "Failed to request SMBus region " |
758 | "0x%lx-0x%Lx\n", i801_smba, | 795 | "0x%lx-0x%Lx\n", priv->smba, |
759 | (unsigned long long)pci_resource_end(dev, SMBBAR)); | 796 | (unsigned long long)pci_resource_end(dev, SMBBAR)); |
760 | goto exit; | 797 | goto exit; |
761 | } | 798 | } |
762 | 799 | ||
763 | pci_read_config_byte(I801_dev, SMBHSTCFG, &temp); | 800 | pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp); |
764 | i801_original_hstcfg = temp; | 801 | priv->original_hstcfg = temp; |
765 | temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ | 802 | temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ |
766 | if (!(temp & SMBHSTCFG_HST_EN)) { | 803 | if (!(temp & SMBHSTCFG_HST_EN)) { |
767 | dev_info(&dev->dev, "Enabling SMBus device\n"); | 804 | dev_info(&dev->dev, "Enabling SMBus device\n"); |
768 | temp |= SMBHSTCFG_HST_EN; | 805 | temp |= SMBHSTCFG_HST_EN; |
769 | } | 806 | } |
770 | pci_write_config_byte(I801_dev, SMBHSTCFG, temp); | 807 | pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp); |
771 | 808 | ||
772 | if (temp & SMBHSTCFG_SMB_SMI_EN) | 809 | if (temp & SMBHSTCFG_SMB_SMI_EN) |
773 | dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n"); | 810 | dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n"); |
@@ -775,19 +812,19 @@ static int __devinit i801_probe(struct pci_dev *dev, | |||
775 | dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n"); | 812 | dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n"); |
776 | 813 | ||
777 | /* Clear special mode bits */ | 814 | /* Clear special mode bits */ |
778 | if (i801_features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER)) | 815 | if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER)) |
779 | outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), | 816 | outb_p(inb_p(SMBAUXCTL(priv)) & |
780 | SMBAUXCTL); | 817 | ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); |
781 | 818 | ||
782 | /* set up the sysfs linkage to our parent device */ | 819 | /* set up the sysfs linkage to our parent device */ |
783 | i801_adapter.dev.parent = &dev->dev; | 820 | priv->adapter.dev.parent = &dev->dev; |
784 | 821 | ||
785 | /* Retry up to 3 times on lost arbitration */ | 822 | /* Retry up to 3 times on lost arbitration */ |
786 | i801_adapter.retries = 3; | 823 | priv->adapter.retries = 3; |
787 | 824 | ||
788 | snprintf(i801_adapter.name, sizeof(i801_adapter.name), | 825 | snprintf(priv->adapter.name, sizeof(priv->adapter.name), |
789 | "SMBus I801 adapter at %04lx", i801_smba); | 826 | "SMBus I801 adapter at %04lx", priv->smba); |
790 | err = i2c_add_adapter(&i801_adapter); | 827 | err = i2c_add_adapter(&priv->adapter); |
791 | if (err) { | 828 | if (err) { |
792 | dev_err(&dev->dev, "Failed to add SMBus adapter\n"); | 829 | dev_err(&dev->dev, "Failed to add SMBus adapter\n"); |
793 | goto exit_release; | 830 | goto exit_release; |
@@ -801,27 +838,33 @@ static int __devinit i801_probe(struct pci_dev *dev, | |||
801 | memset(&info, 0, sizeof(struct i2c_board_info)); | 838 | memset(&info, 0, sizeof(struct i2c_board_info)); |
802 | info.addr = apanel_addr; | 839 | info.addr = apanel_addr; |
803 | strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE); | 840 | strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE); |
804 | i2c_new_device(&i801_adapter, &info); | 841 | i2c_new_device(&priv->adapter, &info); |
805 | } | 842 | } |
806 | #endif | 843 | #endif |
807 | #if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE | 844 | #if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE |
808 | if (dmi_name_in_vendors("FUJITSU")) | 845 | if (dmi_name_in_vendors("FUJITSU")) |
809 | dmi_walk(dmi_check_onboard_devices, &i801_adapter); | 846 | dmi_walk(dmi_check_onboard_devices, &priv->adapter); |
810 | #endif | 847 | #endif |
811 | 848 | ||
849 | pci_set_drvdata(dev, priv); | ||
812 | return 0; | 850 | return 0; |
813 | 851 | ||
814 | exit_release: | 852 | exit_release: |
815 | pci_release_region(dev, SMBBAR); | 853 | pci_release_region(dev, SMBBAR); |
816 | exit: | 854 | exit: |
855 | kfree(priv); | ||
817 | return err; | 856 | return err; |
818 | } | 857 | } |
819 | 858 | ||
820 | static void __devexit i801_remove(struct pci_dev *dev) | 859 | static void __devexit i801_remove(struct pci_dev *dev) |
821 | { | 860 | { |
822 | i2c_del_adapter(&i801_adapter); | 861 | struct i801_priv *priv = pci_get_drvdata(dev); |
823 | pci_write_config_byte(I801_dev, SMBHSTCFG, i801_original_hstcfg); | 862 | |
863 | i2c_del_adapter(&priv->adapter); | ||
864 | pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); | ||
824 | pci_release_region(dev, SMBBAR); | 865 | pci_release_region(dev, SMBBAR); |
866 | pci_set_drvdata(dev, NULL); | ||
867 | kfree(priv); | ||
825 | /* | 868 | /* |
826 | * do not call pci_disable_device(dev) since it can cause hard hangs on | 869 | * do not call pci_disable_device(dev) since it can cause hard hangs on |
827 | * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010) | 870 | * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010) |
@@ -831,8 +874,10 @@ static void __devexit i801_remove(struct pci_dev *dev) | |||
831 | #ifdef CONFIG_PM | 874 | #ifdef CONFIG_PM |
832 | static int i801_suspend(struct pci_dev *dev, pm_message_t mesg) | 875 | static int i801_suspend(struct pci_dev *dev, pm_message_t mesg) |
833 | { | 876 | { |
877 | struct i801_priv *priv = pci_get_drvdata(dev); | ||
878 | |||
834 | pci_save_state(dev); | 879 | pci_save_state(dev); |
835 | pci_write_config_byte(dev, SMBHSTCFG, i801_original_hstcfg); | 880 | pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); |
836 | pci_set_power_state(dev, pci_choose_state(dev, mesg)); | 881 | pci_set_power_state(dev, pci_choose_state(dev, mesg)); |
837 | return 0; | 882 | return 0; |
838 | } | 883 | } |
diff --git a/drivers/staging/tm6000/tm6000-i2c.c b/drivers/staging/tm6000/tm6000-i2c.c index 3e46866dd279..93f625fc852b 100644 --- a/drivers/staging/tm6000/tm6000-i2c.c +++ b/drivers/staging/tm6000/tm6000-i2c.c | |||
@@ -320,7 +320,6 @@ static struct i2c_algorithm tm6000_algo = { | |||
320 | 320 | ||
321 | static struct i2c_adapter tm6000_adap_template = { | 321 | static struct i2c_adapter tm6000_adap_template = { |
322 | .owner = THIS_MODULE, | 322 | .owner = THIS_MODULE, |
323 | .class = I2C_CLASS_TV_ANALOG | I2C_CLASS_TV_DIGITAL, | ||
324 | .name = "tm6000", | 323 | .name = "tm6000", |
325 | .algo = &tm6000_algo, | 324 | .algo = &tm6000_algo, |
326 | }; | 325 | }; |
diff --git a/include/linux/i2c.h b/include/linux/i2c.h index 1f66fa06a97c..889b35abaeda 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h | |||
@@ -407,8 +407,6 @@ void i2c_unlock_adapter(struct i2c_adapter *); | |||
407 | 407 | ||
408 | /* i2c adapter classes (bitmask) */ | 408 | /* i2c adapter classes (bitmask) */ |
409 | #define I2C_CLASS_HWMON (1<<0) /* lm_sensors, ... */ | 409 | #define I2C_CLASS_HWMON (1<<0) /* lm_sensors, ... */ |
410 | #define I2C_CLASS_TV_ANALOG (1<<1) /* bttv + friends */ | ||
411 | #define I2C_CLASS_TV_DIGITAL (1<<2) /* dvb cards */ | ||
412 | #define I2C_CLASS_DDC (1<<3) /* DDC bus on graphics adapters */ | 410 | #define I2C_CLASS_DDC (1<<3) /* DDC bus on graphics adapters */ |
413 | #define I2C_CLASS_SPD (1<<7) /* SPD EEPROMs and similar */ | 411 | #define I2C_CLASS_SPD (1<<7) /* SPD EEPROMs and similar */ |
414 | 412 | ||
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 87e2c2e7aed3..c6bcfe93b9ca 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -2465,6 +2465,7 @@ | |||
2465 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 | 2465 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 |
2466 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41 | 2466 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41 |
2467 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f | 2467 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f |
2468 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 | ||
2468 | #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC 0x1d40 | 2469 | #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC 0x1d40 |
2469 | #define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 | 2470 | #define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 |
2470 | #define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411 | 2471 | #define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411 |