diff options
author | Mattias Wallin <mattias.wallin@stericsson.com> | 2010-09-10 11:47:56 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2010-10-28 18:29:19 -0400 |
commit | 47c1697508f2ec9f6b31ce6c825fe1017871dea6 (patch) | |
tree | e22afa146c3232802abf482caa167e0e2444093b | |
parent | f4ebcab36088d45a5e8889e9b63d77e01c808076 (diff) |
mfd: Align ab8500 with the abx500 interface
This patch makes the ab8500 mixed signal chip expose the same
interface for register access as the ab3100, ab3550 and ab5500 chip.
The ab8500_read() and ab8500_write() is removed and replaced with
abx500_get_register_interruptible() and
abx500_set_register_interruptible().
Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
-rw-r--r-- | drivers/mfd/Kconfig | 4 | ||||
-rw-r--r-- | drivers/mfd/ab8500-core.c | 281 | ||||
-rw-r--r-- | drivers/regulator/ab8500.c | 86 | ||||
-rw-r--r-- | drivers/rtc/rtc-ab8500.c | 103 | ||||
-rw-r--r-- | include/linux/mfd/ab8500.h | 28 | ||||
-rw-r--r-- | include/linux/mfd/abx500.h | 3 |
6 files changed, 296 insertions, 209 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 8a463e6c22a0..ec0af47a9058 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig | |||
@@ -434,7 +434,7 @@ config PCF50633_GPIO | |||
434 | 434 | ||
435 | config ABX500_CORE | 435 | config ABX500_CORE |
436 | bool "ST-Ericsson ABX500 Mixed Signal Circuit register functions" | 436 | bool "ST-Ericsson ABX500 Mixed Signal Circuit register functions" |
437 | default y if ARCH_U300 | 437 | default y if ARCH_U300 || ARCH_U8500 |
438 | help | 438 | help |
439 | Say yes here if you have the ABX500 Mixed Signal IC family | 439 | Say yes here if you have the ABX500 Mixed Signal IC family |
440 | chips. This core driver expose register access functions. | 440 | chips. This core driver expose register access functions. |
@@ -475,7 +475,7 @@ config EZX_PCAP | |||
475 | 475 | ||
476 | config AB8500_CORE | 476 | config AB8500_CORE |
477 | bool "ST-Ericsson AB8500 Mixed Signal Power Management chip" | 477 | bool "ST-Ericsson AB8500 Mixed Signal Power Management chip" |
478 | depends on SPI=y && GENERIC_HARDIRQS | 478 | depends on SPI=y && GENERIC_HARDIRQS && ABX500_CORE |
479 | select MFD_CORE | 479 | select MFD_CORE |
480 | help | 480 | help |
481 | Select this option to enable access to AB8500 power management | 481 | Select this option to enable access to AB8500 power management |
diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index b8c4b80e4c43..373783146b5e 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c | |||
@@ -4,6 +4,7 @@ | |||
4 | * License Terms: GNU General Public License v2 | 4 | * License Terms: GNU General Public License v2 |
5 | * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | 5 | * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> |
6 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> | 6 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> |
7 | * Changes: Mattias Wallin <mattias.wallin@stericsson.com> | ||
7 | */ | 8 | */ |
8 | 9 | ||
9 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
@@ -15,6 +16,7 @@ | |||
15 | #include <linux/module.h> | 16 | #include <linux/module.h> |
16 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
17 | #include <linux/mfd/core.h> | 18 | #include <linux/mfd/core.h> |
19 | #include <linux/mfd/abx500.h> | ||
18 | #include <linux/mfd/ab8500.h> | 20 | #include <linux/mfd/ab8500.h> |
19 | #include <linux/regulator/ab8500.h> | 21 | #include <linux/regulator/ab8500.h> |
20 | 22 | ||
@@ -22,71 +24,71 @@ | |||
22 | * Interrupt register offsets | 24 | * Interrupt register offsets |
23 | * Bank : 0x0E | 25 | * Bank : 0x0E |
24 | */ | 26 | */ |
25 | #define AB8500_IT_SOURCE1_REG 0x0E00 | 27 | #define AB8500_IT_SOURCE1_REG 0x00 |
26 | #define AB8500_IT_SOURCE2_REG 0x0E01 | 28 | #define AB8500_IT_SOURCE2_REG 0x01 |
27 | #define AB8500_IT_SOURCE3_REG 0x0E02 | 29 | #define AB8500_IT_SOURCE3_REG 0x02 |
28 | #define AB8500_IT_SOURCE4_REG 0x0E03 | 30 | #define AB8500_IT_SOURCE4_REG 0x03 |
29 | #define AB8500_IT_SOURCE5_REG 0x0E04 | 31 | #define AB8500_IT_SOURCE5_REG 0x04 |
30 | #define AB8500_IT_SOURCE6_REG 0x0E05 | 32 | #define AB8500_IT_SOURCE6_REG 0x05 |
31 | #define AB8500_IT_SOURCE7_REG 0x0E06 | 33 | #define AB8500_IT_SOURCE7_REG 0x06 |
32 | #define AB8500_IT_SOURCE8_REG 0x0E07 | 34 | #define AB8500_IT_SOURCE8_REG 0x07 |
33 | #define AB8500_IT_SOURCE19_REG 0x0E12 | 35 | #define AB8500_IT_SOURCE19_REG 0x12 |
34 | #define AB8500_IT_SOURCE20_REG 0x0E13 | 36 | #define AB8500_IT_SOURCE20_REG 0x13 |
35 | #define AB8500_IT_SOURCE21_REG 0x0E14 | 37 | #define AB8500_IT_SOURCE21_REG 0x14 |
36 | #define AB8500_IT_SOURCE22_REG 0x0E15 | 38 | #define AB8500_IT_SOURCE22_REG 0x15 |
37 | #define AB8500_IT_SOURCE23_REG 0x0E16 | 39 | #define AB8500_IT_SOURCE23_REG 0x16 |
38 | #define AB8500_IT_SOURCE24_REG 0x0E17 | 40 | #define AB8500_IT_SOURCE24_REG 0x17 |
39 | 41 | ||
40 | /* | 42 | /* |
41 | * latch registers | 43 | * latch registers |
42 | */ | 44 | */ |
43 | #define AB8500_IT_LATCH1_REG 0x0E20 | 45 | #define AB8500_IT_LATCH1_REG 0x20 |
44 | #define AB8500_IT_LATCH2_REG 0x0E21 | 46 | #define AB8500_IT_LATCH2_REG 0x21 |
45 | #define AB8500_IT_LATCH3_REG 0x0E22 | 47 | #define AB8500_IT_LATCH3_REG 0x22 |
46 | #define AB8500_IT_LATCH4_REG 0x0E23 | 48 | #define AB8500_IT_LATCH4_REG 0x23 |
47 | #define AB8500_IT_LATCH5_REG 0x0E24 | 49 | #define AB8500_IT_LATCH5_REG 0x24 |
48 | #define AB8500_IT_LATCH6_REG 0x0E25 | 50 | #define AB8500_IT_LATCH6_REG 0x25 |
49 | #define AB8500_IT_LATCH7_REG 0x0E26 | 51 | #define AB8500_IT_LATCH7_REG 0x26 |
50 | #define AB8500_IT_LATCH8_REG 0x0E27 | 52 | #define AB8500_IT_LATCH8_REG 0x27 |
51 | #define AB8500_IT_LATCH9_REG 0x0E28 | 53 | #define AB8500_IT_LATCH9_REG 0x28 |
52 | #define AB8500_IT_LATCH10_REG 0x0E29 | 54 | #define AB8500_IT_LATCH10_REG 0x29 |
53 | #define AB8500_IT_LATCH19_REG 0x0E32 | 55 | #define AB8500_IT_LATCH19_REG 0x32 |
54 | #define AB8500_IT_LATCH20_REG 0x0E33 | 56 | #define AB8500_IT_LATCH20_REG 0x33 |
55 | #define AB8500_IT_LATCH21_REG 0x0E34 | 57 | #define AB8500_IT_LATCH21_REG 0x34 |
56 | #define AB8500_IT_LATCH22_REG 0x0E35 | 58 | #define AB8500_IT_LATCH22_REG 0x35 |
57 | #define AB8500_IT_LATCH23_REG 0x0E36 | 59 | #define AB8500_IT_LATCH23_REG 0x36 |
58 | #define AB8500_IT_LATCH24_REG 0x0E37 | 60 | #define AB8500_IT_LATCH24_REG 0x37 |
59 | 61 | ||
60 | /* | 62 | /* |
61 | * mask registers | 63 | * mask registers |
62 | */ | 64 | */ |
63 | 65 | ||
64 | #define AB8500_IT_MASK1_REG 0x0E40 | 66 | #define AB8500_IT_MASK1_REG 0x40 |
65 | #define AB8500_IT_MASK2_REG 0x0E41 | 67 | #define AB8500_IT_MASK2_REG 0x41 |
66 | #define AB8500_IT_MASK3_REG 0x0E42 | 68 | #define AB8500_IT_MASK3_REG 0x42 |
67 | #define AB8500_IT_MASK4_REG 0x0E43 | 69 | #define AB8500_IT_MASK4_REG 0x43 |
68 | #define AB8500_IT_MASK5_REG 0x0E44 | 70 | #define AB8500_IT_MASK5_REG 0x44 |
69 | #define AB8500_IT_MASK6_REG 0x0E45 | 71 | #define AB8500_IT_MASK6_REG 0x45 |
70 | #define AB8500_IT_MASK7_REG 0x0E46 | 72 | #define AB8500_IT_MASK7_REG 0x46 |
71 | #define AB8500_IT_MASK8_REG 0x0E47 | 73 | #define AB8500_IT_MASK8_REG 0x47 |
72 | #define AB8500_IT_MASK9_REG 0x0E48 | 74 | #define AB8500_IT_MASK9_REG 0x48 |
73 | #define AB8500_IT_MASK10_REG 0x0E49 | 75 | #define AB8500_IT_MASK10_REG 0x49 |
74 | #define AB8500_IT_MASK11_REG 0x0E4A | 76 | #define AB8500_IT_MASK11_REG 0x4A |
75 | #define AB8500_IT_MASK12_REG 0x0E4B | 77 | #define AB8500_IT_MASK12_REG 0x4B |
76 | #define AB8500_IT_MASK13_REG 0x0E4C | 78 | #define AB8500_IT_MASK13_REG 0x4C |
77 | #define AB8500_IT_MASK14_REG 0x0E4D | 79 | #define AB8500_IT_MASK14_REG 0x4D |
78 | #define AB8500_IT_MASK15_REG 0x0E4E | 80 | #define AB8500_IT_MASK15_REG 0x4E |
79 | #define AB8500_IT_MASK16_REG 0x0E4F | 81 | #define AB8500_IT_MASK16_REG 0x4F |
80 | #define AB8500_IT_MASK17_REG 0x0E50 | 82 | #define AB8500_IT_MASK17_REG 0x50 |
81 | #define AB8500_IT_MASK18_REG 0x0E51 | 83 | #define AB8500_IT_MASK18_REG 0x51 |
82 | #define AB8500_IT_MASK19_REG 0x0E52 | 84 | #define AB8500_IT_MASK19_REG 0x52 |
83 | #define AB8500_IT_MASK20_REG 0x0E53 | 85 | #define AB8500_IT_MASK20_REG 0x53 |
84 | #define AB8500_IT_MASK21_REG 0x0E54 | 86 | #define AB8500_IT_MASK21_REG 0x54 |
85 | #define AB8500_IT_MASK22_REG 0x0E55 | 87 | #define AB8500_IT_MASK22_REG 0x55 |
86 | #define AB8500_IT_MASK23_REG 0x0E56 | 88 | #define AB8500_IT_MASK23_REG 0x56 |
87 | #define AB8500_IT_MASK24_REG 0x0E57 | 89 | #define AB8500_IT_MASK24_REG 0x57 |
88 | 90 | ||
89 | #define AB8500_REV_REG 0x1080 | 91 | #define AB8500_REV_REG 0x80 |
90 | 92 | ||
91 | /* | 93 | /* |
92 | * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt | 94 | * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt |
@@ -99,96 +101,132 @@ static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { | |||
99 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21, | 101 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21, |
100 | }; | 102 | }; |
101 | 103 | ||
102 | static int __ab8500_write(struct ab8500 *ab8500, u16 addr, u8 data) | 104 | static int ab8500_get_chip_id(struct device *dev) |
105 | { | ||
106 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); | ||
107 | return (int)ab8500->chip_id; | ||
108 | } | ||
109 | |||
110 | static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, | ||
111 | u8 reg, u8 data) | ||
103 | { | 112 | { |
104 | int ret; | 113 | int ret; |
114 | /* | ||
115 | * Put the u8 bank and u8 register together into a an u16. | ||
116 | * The bank on higher 8 bits and register in lower 8 bits. | ||
117 | * */ | ||
118 | u16 addr = ((u16)bank) << 8 | reg; | ||
105 | 119 | ||
106 | dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); | 120 | dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); |
107 | 121 | ||
122 | ret = mutex_lock_interruptible(&ab8500->lock); | ||
123 | if (ret) | ||
124 | return ret; | ||
125 | |||
108 | ret = ab8500->write(ab8500, addr, data); | 126 | ret = ab8500->write(ab8500, addr, data); |
109 | if (ret < 0) | 127 | if (ret < 0) |
110 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | 128 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", |
111 | addr, ret); | 129 | addr, ret); |
130 | mutex_unlock(&ab8500->lock); | ||
112 | 131 | ||
113 | return ret; | 132 | return ret; |
114 | } | 133 | } |
115 | 134 | ||
116 | /** | 135 | static int ab8500_set_register(struct device *dev, u8 bank, |
117 | * ab8500_write() - write an AB8500 register | 136 | u8 reg, u8 value) |
118 | * @ab8500: device to write to | ||
119 | * @addr: address of the register | ||
120 | * @data: value to write | ||
121 | */ | ||
122 | int ab8500_write(struct ab8500 *ab8500, u16 addr, u8 data) | ||
123 | { | 137 | { |
124 | int ret; | 138 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
125 | |||
126 | mutex_lock(&ab8500->lock); | ||
127 | ret = __ab8500_write(ab8500, addr, data); | ||
128 | mutex_unlock(&ab8500->lock); | ||
129 | 139 | ||
130 | return ret; | 140 | return set_register_interruptible(ab8500, bank, reg, value); |
131 | } | 141 | } |
132 | EXPORT_SYMBOL_GPL(ab8500_write); | ||
133 | 142 | ||
134 | static int __ab8500_read(struct ab8500 *ab8500, u16 addr) | 143 | static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, |
144 | u8 reg, u8 *value) | ||
135 | { | 145 | { |
136 | int ret; | 146 | int ret; |
147 | /* put the u8 bank and u8 reg together into a an u16. | ||
148 | * bank on higher 8 bits and reg in lower */ | ||
149 | u16 addr = ((u16)bank) << 8 | reg; | ||
150 | |||
151 | ret = mutex_lock_interruptible(&ab8500->lock); | ||
152 | if (ret) | ||
153 | return ret; | ||
137 | 154 | ||
138 | ret = ab8500->read(ab8500, addr); | 155 | ret = ab8500->read(ab8500, addr); |
139 | if (ret < 0) | 156 | if (ret < 0) |
140 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | 157 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", |
141 | addr, ret); | 158 | addr, ret); |
159 | else | ||
160 | *value = ret; | ||
142 | 161 | ||
162 | mutex_unlock(&ab8500->lock); | ||
143 | dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); | 163 | dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); |
144 | 164 | ||
145 | return ret; | 165 | return ret; |
146 | } | 166 | } |
147 | 167 | ||
148 | /** | 168 | static int ab8500_get_register(struct device *dev, u8 bank, |
149 | * ab8500_read() - read an AB8500 register | 169 | u8 reg, u8 *value) |
150 | * @ab8500: device to read from | ||
151 | * @addr: address of the register | ||
152 | */ | ||
153 | int ab8500_read(struct ab8500 *ab8500, u16 addr) | ||
154 | { | 170 | { |
155 | int ret; | 171 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
156 | |||
157 | mutex_lock(&ab8500->lock); | ||
158 | ret = __ab8500_read(ab8500, addr); | ||
159 | mutex_unlock(&ab8500->lock); | ||
160 | 172 | ||
161 | return ret; | 173 | return get_register_interruptible(ab8500, bank, reg, value); |
162 | } | 174 | } |
163 | EXPORT_SYMBOL_GPL(ab8500_read); | 175 | |
164 | 176 | static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
165 | /** | 177 | u8 reg, u8 bitmask, u8 bitvalues) |
166 | * ab8500_set_bits() - set a bitfield in an AB8500 register | ||
167 | * @ab8500: device to read from | ||
168 | * @addr: address of the register | ||
169 | * @mask: mask of the bitfield to modify | ||
170 | * @data: value to set to the bitfield | ||
171 | */ | ||
172 | int ab8500_set_bits(struct ab8500 *ab8500, u16 addr, u8 mask, u8 data) | ||
173 | { | 178 | { |
174 | int ret; | 179 | int ret; |
180 | u8 data; | ||
181 | /* put the u8 bank and u8 reg together into a an u16. | ||
182 | * bank on higher 8 bits and reg in lower */ | ||
183 | u16 addr = ((u16)bank) << 8 | reg; | ||
175 | 184 | ||
176 | mutex_lock(&ab8500->lock); | 185 | ret = mutex_lock_interruptible(&ab8500->lock); |
186 | if (ret) | ||
187 | return ret; | ||
177 | 188 | ||
178 | ret = __ab8500_read(ab8500, addr); | 189 | ret = ab8500->read(ab8500, addr); |
179 | if (ret < 0) | 190 | if (ret < 0) { |
191 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | ||
192 | addr, ret); | ||
180 | goto out; | 193 | goto out; |
194 | } | ||
181 | 195 | ||
182 | ret &= ~mask; | 196 | data = (u8)ret; |
183 | ret |= data; | 197 | data = (~bitmask & data) | (bitmask & bitvalues); |
184 | 198 | ||
185 | ret = __ab8500_write(ab8500, addr, ret); | 199 | ret = ab8500->write(ab8500, addr, data); |
200 | if (ret < 0) | ||
201 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | ||
202 | addr, ret); | ||
186 | 203 | ||
204 | dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data); | ||
187 | out: | 205 | out: |
188 | mutex_unlock(&ab8500->lock); | 206 | mutex_unlock(&ab8500->lock); |
189 | return ret; | 207 | return ret; |
190 | } | 208 | } |
191 | EXPORT_SYMBOL_GPL(ab8500_set_bits); | 209 | |
210 | static int ab8500_mask_and_set_register(struct device *dev, | ||
211 | u8 bank, u8 reg, u8 bitmask, u8 bitvalues) | ||
212 | { | ||
213 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); | ||
214 | |||
215 | return mask_and_set_register_interruptible(ab8500, bank, reg, | ||
216 | bitmask, bitvalues); | ||
217 | |||
218 | } | ||
219 | |||
220 | static struct abx500_ops ab8500_ops = { | ||
221 | .get_chip_id = ab8500_get_chip_id, | ||
222 | .get_register = ab8500_get_register, | ||
223 | .set_register = ab8500_set_register, | ||
224 | .get_register_page = NULL, | ||
225 | .set_register_page = NULL, | ||
226 | .mask_and_set_register = ab8500_mask_and_set_register, | ||
227 | .event_registers_startup_state_get = NULL, | ||
228 | .startup_irq_enabled = NULL, | ||
229 | }; | ||
192 | 230 | ||
193 | static void ab8500_irq_lock(unsigned int irq) | 231 | static void ab8500_irq_lock(unsigned int irq) |
194 | { | 232 | { |
@@ -213,7 +251,7 @@ static void ab8500_irq_sync_unlock(unsigned int irq) | |||
213 | ab8500->oldmask[i] = new; | 251 | ab8500->oldmask[i] = new; |
214 | 252 | ||
215 | reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i]; | 253 | reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i]; |
216 | ab8500_write(ab8500, reg, new); | 254 | set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); |
217 | } | 255 | } |
218 | 256 | ||
219 | mutex_unlock(&ab8500->irq_lock); | 257 | mutex_unlock(&ab8500->irq_lock); |
@@ -257,9 +295,11 @@ static irqreturn_t ab8500_irq(int irq, void *dev) | |||
257 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { | 295 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { |
258 | int regoffset = ab8500_irq_regoffset[i]; | 296 | int regoffset = ab8500_irq_regoffset[i]; |
259 | int status; | 297 | int status; |
298 | u8 value; | ||
260 | 299 | ||
261 | status = ab8500_read(ab8500, AB8500_IT_LATCH1_REG + regoffset); | 300 | status = get_register_interruptible(ab8500, AB8500_INTERRUPT, |
262 | if (status <= 0) | 301 | AB8500_IT_LATCH1_REG + regoffset, &value); |
302 | if (status < 0 || value == 0) | ||
263 | continue; | 303 | continue; |
264 | 304 | ||
265 | do { | 305 | do { |
@@ -267,8 +307,8 @@ static irqreturn_t ab8500_irq(int irq, void *dev) | |||
267 | int line = i * 8 + bit; | 307 | int line = i * 8 + bit; |
268 | 308 | ||
269 | handle_nested_irq(ab8500->irq_base + line); | 309 | handle_nested_irq(ab8500->irq_base + line); |
270 | status &= ~(1 << bit); | 310 | value &= ~(1 << bit); |
271 | } while (status); | 311 | } while (value); |
272 | } | 312 | } |
273 | 313 | ||
274 | return IRQ_HANDLED; | 314 | return IRQ_HANDLED; |
@@ -381,6 +421,7 @@ int __devinit ab8500_init(struct ab8500 *ab8500) | |||
381 | struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); | 421 | struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); |
382 | int ret; | 422 | int ret; |
383 | int i; | 423 | int i; |
424 | u8 value; | ||
384 | 425 | ||
385 | if (plat) | 426 | if (plat) |
386 | ab8500->irq_base = plat->irq_base; | 427 | ab8500->irq_base = plat->irq_base; |
@@ -388,7 +429,8 @@ int __devinit ab8500_init(struct ab8500 *ab8500) | |||
388 | mutex_init(&ab8500->lock); | 429 | mutex_init(&ab8500->lock); |
389 | mutex_init(&ab8500->irq_lock); | 430 | mutex_init(&ab8500->irq_lock); |
390 | 431 | ||
391 | ret = ab8500_read(ab8500, AB8500_REV_REG); | 432 | ret = get_register_interruptible(ab8500, AB8500_MISC, |
433 | AB8500_REV_REG, &value); | ||
392 | if (ret < 0) | 434 | if (ret < 0) |
393 | return ret; | 435 | return ret; |
394 | 436 | ||
@@ -397,28 +439,37 @@ int __devinit ab8500_init(struct ab8500 *ab8500) | |||
397 | * 0x10 - Cut 1.0 | 439 | * 0x10 - Cut 1.0 |
398 | * 0x11 - Cut 1.1 | 440 | * 0x11 - Cut 1.1 |
399 | */ | 441 | */ |
400 | if (ret == 0x0 || ret == 0x10 || ret == 0x11) { | 442 | if (value == 0x0 || value == 0x10 || value == 0x11) { |
401 | ab8500->revision = ret; | 443 | ab8500->revision = value; |
402 | dev_info(ab8500->dev, "detected chip, revision: %#x\n", ret); | 444 | dev_info(ab8500->dev, "detected chip, revision: %#x\n", value); |
403 | } else { | 445 | } else { |
404 | dev_err(ab8500->dev, "unknown chip, revision: %#x\n", ret); | 446 | dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value); |
405 | return -EINVAL; | 447 | return -EINVAL; |
406 | } | 448 | } |
449 | ab8500->chip_id = value; | ||
407 | 450 | ||
408 | if (plat && plat->init) | 451 | if (plat && plat->init) |
409 | plat->init(ab8500); | 452 | plat->init(ab8500); |
410 | 453 | ||
411 | /* Clear and mask all interrupts */ | 454 | /* Clear and mask all interrupts */ |
412 | for (i = 0; i < 10; i++) { | 455 | for (i = 0; i < 10; i++) { |
413 | ab8500_read(ab8500, AB8500_IT_LATCH1_REG + i); | 456 | get_register_interruptible(ab8500, AB8500_INTERRUPT, |
414 | ab8500_write(ab8500, AB8500_IT_MASK1_REG + i, 0xff); | 457 | AB8500_IT_LATCH1_REG + i, &value); |
458 | set_register_interruptible(ab8500, AB8500_INTERRUPT, | ||
459 | AB8500_IT_MASK1_REG + i, 0xff); | ||
415 | } | 460 | } |
416 | 461 | ||
417 | for (i = 18; i < 24; i++) { | 462 | for (i = 18; i < 24; i++) { |
418 | ab8500_read(ab8500, AB8500_IT_LATCH1_REG + i); | 463 | get_register_interruptible(ab8500, AB8500_INTERRUPT, |
419 | ab8500_write(ab8500, AB8500_IT_MASK1_REG + i, 0xff); | 464 | AB8500_IT_LATCH1_REG + i, &value); |
465 | set_register_interruptible(ab8500, AB8500_INTERRUPT, | ||
466 | AB8500_IT_MASK1_REG + i, 0xff); | ||
420 | } | 467 | } |
421 | 468 | ||
469 | ret = abx500_register_ops(ab8500->dev, &ab8500_ops); | ||
470 | if (ret) | ||
471 | return ret; | ||
472 | |||
422 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) | 473 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) |
423 | ab8500->mask[i] = ab8500->oldmask[i] = 0xff; | 474 | ab8500->mask[i] = ab8500->oldmask[i] = 0xff; |
424 | 475 | ||
diff --git a/drivers/regulator/ab8500.c b/drivers/regulator/ab8500.c index 28c7ae67cec9..db6b70f20511 100644 --- a/drivers/regulator/ab8500.c +++ b/drivers/regulator/ab8500.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/err.h> | 21 | #include <linux/err.h> |
22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
23 | #include <linux/mfd/ab8500.h> | 23 | #include <linux/mfd/ab8500.h> |
24 | #include <linux/mfd/abx500.h> | ||
24 | #include <linux/regulator/driver.h> | 25 | #include <linux/regulator/driver.h> |
25 | #include <linux/regulator/machine.h> | 26 | #include <linux/regulator/machine.h> |
26 | #include <linux/regulator/ab8500.h> | 27 | #include <linux/regulator/ab8500.h> |
@@ -33,9 +34,11 @@ | |||
33 | * @max_uV: maximum voltage (for variable voltage supplies) | 34 | * @max_uV: maximum voltage (for variable voltage supplies) |
34 | * @min_uV: minimum voltage (for variable voltage supplies) | 35 | * @min_uV: minimum voltage (for variable voltage supplies) |
35 | * @fixed_uV: typical voltage (for fixed voltage supplies) | 36 | * @fixed_uV: typical voltage (for fixed voltage supplies) |
37 | * @update_bank: bank to control on/off | ||
36 | * @update_reg: register to control on/off | 38 | * @update_reg: register to control on/off |
37 | * @mask: mask to enable/disable regulator | 39 | * @mask: mask to enable/disable regulator |
38 | * @enable: bits to enable the regulator in normal(high power) mode | 40 | * @enable: bits to enable the regulator in normal(high power) mode |
41 | * @voltage_bank: bank to control regulator voltage | ||
39 | * @voltage_reg: register to control regulator voltage | 42 | * @voltage_reg: register to control regulator voltage |
40 | * @voltage_mask: mask to control regulator voltage | 43 | * @voltage_mask: mask to control regulator voltage |
41 | * @supported_voltages: supported voltage table | 44 | * @supported_voltages: supported voltage table |
@@ -49,11 +52,13 @@ struct ab8500_regulator_info { | |||
49 | int max_uV; | 52 | int max_uV; |
50 | int min_uV; | 53 | int min_uV; |
51 | int fixed_uV; | 54 | int fixed_uV; |
52 | int update_reg; | 55 | u8 update_bank; |
53 | int mask; | 56 | u8 update_reg; |
54 | int enable; | 57 | u8 mask; |
55 | int voltage_reg; | 58 | u8 enable; |
56 | int voltage_mask; | 59 | u8 voltage_bank; |
60 | u8 voltage_reg; | ||
61 | u8 voltage_mask; | ||
57 | int const *supported_voltages; | 62 | int const *supported_voltages; |
58 | int voltages_len; | 63 | int voltages_len; |
59 | }; | 64 | }; |
@@ -97,8 +102,8 @@ static int ab8500_regulator_enable(struct regulator_dev *rdev) | |||
97 | if (regulator_id >= AB8500_NUM_REGULATORS) | 102 | if (regulator_id >= AB8500_NUM_REGULATORS) |
98 | return -EINVAL; | 103 | return -EINVAL; |
99 | 104 | ||
100 | ret = ab8500_set_bits(info->ab8500, info->update_reg, | 105 | ret = abx500_mask_and_set_register_interruptible(info->dev, |
101 | info->mask, info->enable); | 106 | info->update_bank, info->update_reg, info->mask, info->enable); |
102 | if (ret < 0) | 107 | if (ret < 0) |
103 | dev_err(rdev_get_dev(rdev), | 108 | dev_err(rdev_get_dev(rdev), |
104 | "couldn't set enable bits for regulator\n"); | 109 | "couldn't set enable bits for regulator\n"); |
@@ -114,8 +119,8 @@ static int ab8500_regulator_disable(struct regulator_dev *rdev) | |||
114 | if (regulator_id >= AB8500_NUM_REGULATORS) | 119 | if (regulator_id >= AB8500_NUM_REGULATORS) |
115 | return -EINVAL; | 120 | return -EINVAL; |
116 | 121 | ||
117 | ret = ab8500_set_bits(info->ab8500, info->update_reg, | 122 | ret = abx500_mask_and_set_register_interruptible(info->dev, |
118 | info->mask, 0x0); | 123 | info->update_bank, info->update_reg, info->mask, 0x0); |
119 | if (ret < 0) | 124 | if (ret < 0) |
120 | dev_err(rdev_get_dev(rdev), | 125 | dev_err(rdev_get_dev(rdev), |
121 | "couldn't set disable bits for regulator\n"); | 126 | "couldn't set disable bits for regulator\n"); |
@@ -126,19 +131,21 @@ static int ab8500_regulator_is_enabled(struct regulator_dev *rdev) | |||
126 | { | 131 | { |
127 | int regulator_id, ret; | 132 | int regulator_id, ret; |
128 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); | 133 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); |
134 | u8 value; | ||
129 | 135 | ||
130 | regulator_id = rdev_get_id(rdev); | 136 | regulator_id = rdev_get_id(rdev); |
131 | if (regulator_id >= AB8500_NUM_REGULATORS) | 137 | if (regulator_id >= AB8500_NUM_REGULATORS) |
132 | return -EINVAL; | 138 | return -EINVAL; |
133 | 139 | ||
134 | ret = ab8500_read(info->ab8500, info->update_reg); | 140 | ret = abx500_get_register_interruptible(info->dev, |
141 | info->update_bank, info->update_reg, &value); | ||
135 | if (ret < 0) { | 142 | if (ret < 0) { |
136 | dev_err(rdev_get_dev(rdev), | 143 | dev_err(rdev_get_dev(rdev), |
137 | "couldn't read 0x%x register\n", info->update_reg); | 144 | "couldn't read 0x%x register\n", info->update_reg); |
138 | return ret; | 145 | return ret; |
139 | } | 146 | } |
140 | 147 | ||
141 | if (ret & info->mask) | 148 | if (value & info->mask) |
142 | return true; | 149 | return true; |
143 | else | 150 | else |
144 | return false; | 151 | return false; |
@@ -165,14 +172,16 @@ static int ab8500_list_voltage(struct regulator_dev *rdev, unsigned selector) | |||
165 | 172 | ||
166 | static int ab8500_regulator_get_voltage(struct regulator_dev *rdev) | 173 | static int ab8500_regulator_get_voltage(struct regulator_dev *rdev) |
167 | { | 174 | { |
168 | int regulator_id, ret, val; | 175 | int regulator_id, ret; |
169 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); | 176 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); |
177 | u8 value; | ||
170 | 178 | ||
171 | regulator_id = rdev_get_id(rdev); | 179 | regulator_id = rdev_get_id(rdev); |
172 | if (regulator_id >= AB8500_NUM_REGULATORS) | 180 | if (regulator_id >= AB8500_NUM_REGULATORS) |
173 | return -EINVAL; | 181 | return -EINVAL; |
174 | 182 | ||
175 | ret = ab8500_read(info->ab8500, info->voltage_reg); | 183 | ret = abx500_get_register_interruptible(info->dev, info->voltage_bank, |
184 | info->voltage_reg, &value); | ||
176 | if (ret < 0) { | 185 | if (ret < 0) { |
177 | dev_err(rdev_get_dev(rdev), | 186 | dev_err(rdev_get_dev(rdev), |
178 | "couldn't read voltage reg for regulator\n"); | 187 | "couldn't read voltage reg for regulator\n"); |
@@ -180,11 +189,11 @@ static int ab8500_regulator_get_voltage(struct regulator_dev *rdev) | |||
180 | } | 189 | } |
181 | 190 | ||
182 | /* vintcore has a different layout */ | 191 | /* vintcore has a different layout */ |
183 | val = ret & info->voltage_mask; | 192 | value &= info->voltage_mask; |
184 | if (regulator_id == AB8500_LDO_INTCORE) | 193 | if (regulator_id == AB8500_LDO_INTCORE) |
185 | ret = info->supported_voltages[val >> 0x3]; | 194 | ret = info->supported_voltages[value >> 0x3]; |
186 | else | 195 | else |
187 | ret = info->supported_voltages[val]; | 196 | ret = info->supported_voltages[value]; |
188 | 197 | ||
189 | return ret; | 198 | return ret; |
190 | } | 199 | } |
@@ -224,8 +233,9 @@ static int ab8500_regulator_set_voltage(struct regulator_dev *rdev, | |||
224 | } | 233 | } |
225 | 234 | ||
226 | /* set the registers for the request */ | 235 | /* set the registers for the request */ |
227 | ret = ab8500_set_bits(info->ab8500, info->voltage_reg, | 236 | ret = abx500_mask_and_set_register_interruptible(info->dev, |
228 | info->voltage_mask, ret); | 237 | info->voltage_bank, info->voltage_reg, |
238 | info->voltage_mask, (u8)ret); | ||
229 | if (ret < 0) | 239 | if (ret < 0) |
230 | dev_err(rdev_get_dev(rdev), | 240 | dev_err(rdev_get_dev(rdev), |
231 | "couldn't set voltage reg for regulator\n"); | 241 | "couldn't set voltage reg for regulator\n"); |
@@ -262,9 +272,9 @@ static struct regulator_ops ab8500_ldo_fixed_ops = { | |||
262 | .list_voltage = ab8500_list_voltage, | 272 | .list_voltage = ab8500_list_voltage, |
263 | }; | 273 | }; |
264 | 274 | ||
265 | #define AB8500_LDO(_id, min, max, reg, reg_mask, reg_enable, \ | 275 | #define AB8500_LDO(_id, min, max, bank, reg, reg_mask, \ |
266 | volt_reg, volt_mask, voltages, \ | 276 | reg_enable, volt_bank, volt_reg, volt_mask, \ |
267 | len_volts) \ | 277 | voltages, len_volts) \ |
268 | { \ | 278 | { \ |
269 | .desc = { \ | 279 | .desc = { \ |
270 | .name = "LDO-" #_id, \ | 280 | .name = "LDO-" #_id, \ |
@@ -275,9 +285,11 @@ static struct regulator_ops ab8500_ldo_fixed_ops = { | |||
275 | }, \ | 285 | }, \ |
276 | .min_uV = (min) * 1000, \ | 286 | .min_uV = (min) * 1000, \ |
277 | .max_uV = (max) * 1000, \ | 287 | .max_uV = (max) * 1000, \ |
288 | .update_bank = bank, \ | ||
278 | .update_reg = reg, \ | 289 | .update_reg = reg, \ |
279 | .mask = reg_mask, \ | 290 | .mask = reg_mask, \ |
280 | .enable = reg_enable, \ | 291 | .enable = reg_enable, \ |
292 | .voltage_bank = volt_bank, \ | ||
281 | .voltage_reg = volt_reg, \ | 293 | .voltage_reg = volt_reg, \ |
282 | .voltage_mask = volt_mask, \ | 294 | .voltage_mask = volt_mask, \ |
283 | .supported_voltages = voltages, \ | 295 | .supported_voltages = voltages, \ |
@@ -285,8 +297,8 @@ static struct regulator_ops ab8500_ldo_fixed_ops = { | |||
285 | .fixed_uV = 0, \ | 297 | .fixed_uV = 0, \ |
286 | } | 298 | } |
287 | 299 | ||
288 | #define AB8500_FIXED_LDO(_id, fixed, reg, reg_mask, \ | 300 | #define AB8500_FIXED_LDO(_id, fixed, bank, reg, \ |
289 | reg_enable) \ | 301 | reg_mask, reg_enable) \ |
290 | { \ | 302 | { \ |
291 | .desc = { \ | 303 | .desc = { \ |
292 | .name = "LDO-" #_id, \ | 304 | .name = "LDO-" #_id, \ |
@@ -296,6 +308,7 @@ static struct regulator_ops ab8500_ldo_fixed_ops = { | |||
296 | .owner = THIS_MODULE, \ | 308 | .owner = THIS_MODULE, \ |
297 | }, \ | 309 | }, \ |
298 | .fixed_uV = fixed * 1000, \ | 310 | .fixed_uV = fixed * 1000, \ |
311 | .update_bank = bank, \ | ||
299 | .update_reg = reg, \ | 312 | .update_reg = reg, \ |
300 | .mask = reg_mask, \ | 313 | .mask = reg_mask, \ |
301 | .enable = reg_enable, \ | 314 | .enable = reg_enable, \ |
@@ -304,28 +317,29 @@ static struct regulator_ops ab8500_ldo_fixed_ops = { | |||
304 | static struct ab8500_regulator_info ab8500_regulator_info[] = { | 317 | static struct ab8500_regulator_info ab8500_regulator_info[] = { |
305 | /* | 318 | /* |
306 | * Variable Voltage LDOs | 319 | * Variable Voltage LDOs |
307 | * name, min uV, max uV, ctrl reg, reg mask, enable mask, | 320 | * name, min uV, max uV, ctrl bank, ctrl reg, reg mask, enable mask, |
308 | * volt ctrl reg, volt ctrl mask, volt table, num supported volts | 321 | * volt ctrl bank, volt ctrl reg, volt ctrl mask, volt table, |
322 | * num supported volts | ||
309 | */ | 323 | */ |
310 | AB8500_LDO(AUX1, 1100, 3300, 0x0409, 0x3, 0x1, 0x041f, 0xf, | 324 | AB8500_LDO(AUX1, 1100, 3300, 0x04, 0x09, 0x3, 0x1, 0x04, 0x1f, 0xf, |
311 | ldo_vauxn_voltages, ARRAY_SIZE(ldo_vauxn_voltages)), | 325 | ldo_vauxn_voltages, ARRAY_SIZE(ldo_vauxn_voltages)), |
312 | AB8500_LDO(AUX2, 1100, 3300, 0x0409, 0xc, 0x4, 0x0420, 0xf, | 326 | AB8500_LDO(AUX2, 1100, 3300, 0x04, 0x09, 0xc, 0x4, 0x04, 0x20, 0xf, |
313 | ldo_vauxn_voltages, ARRAY_SIZE(ldo_vauxn_voltages)), | 327 | ldo_vauxn_voltages, ARRAY_SIZE(ldo_vauxn_voltages)), |
314 | AB8500_LDO(AUX3, 1100, 3300, 0x040a, 0x3, 0x1, 0x0421, 0xf, | 328 | AB8500_LDO(AUX3, 1100, 3300, 0x04, 0x0a, 0x3, 0x1, 0x04, 0x21, 0xf, |
315 | ldo_vauxn_voltages, ARRAY_SIZE(ldo_vauxn_voltages)), | 329 | ldo_vauxn_voltages, ARRAY_SIZE(ldo_vauxn_voltages)), |
316 | AB8500_LDO(INTCORE, 1100, 3300, 0x0380, 0x4, 0x4, 0x0380, 0x38, | 330 | AB8500_LDO(INTCORE, 1100, 3300, 0x03, 0x80, 0x4, 0x4, 0x03, 0x80, 0x38, |
317 | ldo_vintcore_voltages, ARRAY_SIZE(ldo_vintcore_voltages)), | 331 | ldo_vintcore_voltages, ARRAY_SIZE(ldo_vintcore_voltages)), |
318 | 332 | ||
319 | /* | 333 | /* |
320 | * Fixed Voltage LDOs | 334 | * Fixed Voltage LDOs |
321 | * name, o/p uV, ctrl reg, enable, disable | 335 | * name, o/p uV, ctrl bank, ctrl reg, enable, disable |
322 | */ | 336 | */ |
323 | AB8500_FIXED_LDO(TVOUT, 2000, 0x0380, 0x2, 0x2), | 337 | AB8500_FIXED_LDO(TVOUT, 2000, 0x03, 0x80, 0x2, 0x2), |
324 | AB8500_FIXED_LDO(AUDIO, 2000, 0x0383, 0x2, 0x2), | 338 | AB8500_FIXED_LDO(AUDIO, 2000, 0x03, 0x83, 0x2, 0x2), |
325 | AB8500_FIXED_LDO(ANAMIC1, 2050, 0x0383, 0x4, 0x4), | 339 | AB8500_FIXED_LDO(ANAMIC1, 2050, 0x03, 0x83, 0x4, 0x4), |
326 | AB8500_FIXED_LDO(ANAMIC2, 2050, 0x0383, 0x8, 0x8), | 340 | AB8500_FIXED_LDO(ANAMIC2, 2050, 0x03, 0x83, 0x8, 0x8), |
327 | AB8500_FIXED_LDO(DMIC, 1800, 0x0383, 0x10, 0x10), | 341 | AB8500_FIXED_LDO(DMIC, 1800, 0x03, 0x83, 0x10, 0x10), |
328 | AB8500_FIXED_LDO(ANA, 1200, 0x0383, 0xc, 0x4), | 342 | AB8500_FIXED_LDO(ANA, 1200, 0x03, 0x83, 0xc, 0x4), |
329 | }; | 343 | }; |
330 | 344 | ||
331 | static inline struct ab8500_regulator_info *find_regulator_info(int id) | 345 | static inline struct ab8500_regulator_info *find_regulator_info(int id) |
diff --git a/drivers/rtc/rtc-ab8500.c b/drivers/rtc/rtc-ab8500.c index 2fda03125e55..e346705aae92 100644 --- a/drivers/rtc/rtc-ab8500.c +++ b/drivers/rtc/rtc-ab8500.c | |||
@@ -14,26 +14,26 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
16 | #include <linux/rtc.h> | 16 | #include <linux/rtc.h> |
17 | #include <linux/mfd/abx500.h> | ||
17 | #include <linux/mfd/ab8500.h> | 18 | #include <linux/mfd/ab8500.h> |
18 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
19 | 20 | ||
20 | #define AB8500_RTC_SOFF_STAT_REG 0x0F00 | 21 | #define AB8500_RTC_SOFF_STAT_REG 0x00 |
21 | #define AB8500_RTC_CC_CONF_REG 0x0F01 | 22 | #define AB8500_RTC_CC_CONF_REG 0x01 |
22 | #define AB8500_RTC_READ_REQ_REG 0x0F02 | 23 | #define AB8500_RTC_READ_REQ_REG 0x02 |
23 | #define AB8500_RTC_WATCH_TSECMID_REG 0x0F03 | 24 | #define AB8500_RTC_WATCH_TSECMID_REG 0x03 |
24 | #define AB8500_RTC_WATCH_TSECHI_REG 0x0F04 | 25 | #define AB8500_RTC_WATCH_TSECHI_REG 0x04 |
25 | #define AB8500_RTC_WATCH_TMIN_LOW_REG 0x0F05 | 26 | #define AB8500_RTC_WATCH_TMIN_LOW_REG 0x05 |
26 | #define AB8500_RTC_WATCH_TMIN_MID_REG 0x0F06 | 27 | #define AB8500_RTC_WATCH_TMIN_MID_REG 0x06 |
27 | #define AB8500_RTC_WATCH_TMIN_HI_REG 0x0F07 | 28 | #define AB8500_RTC_WATCH_TMIN_HI_REG 0x07 |
28 | #define AB8500_RTC_ALRM_MIN_LOW_REG 0x0F08 | 29 | #define AB8500_RTC_ALRM_MIN_LOW_REG 0x08 |
29 | #define AB8500_RTC_ALRM_MIN_MID_REG 0x0F09 | 30 | #define AB8500_RTC_ALRM_MIN_MID_REG 0x09 |
30 | #define AB8500_RTC_ALRM_MIN_HI_REG 0x0F0A | 31 | #define AB8500_RTC_ALRM_MIN_HI_REG 0x0A |
31 | #define AB8500_RTC_STAT_REG 0x0F0B | 32 | #define AB8500_RTC_STAT_REG 0x0B |
32 | #define AB8500_RTC_BKUP_CHG_REG 0x0F0C | 33 | #define AB8500_RTC_BKUP_CHG_REG 0x0C |
33 | #define AB8500_RTC_FORCE_BKUP_REG 0x0F0D | 34 | #define AB8500_RTC_FORCE_BKUP_REG 0x0D |
34 | #define AB8500_RTC_CALIB_REG 0x0F0E | 35 | #define AB8500_RTC_CALIB_REG 0x0E |
35 | #define AB8500_RTC_SWITCH_STAT_REG 0x0F0F | 36 | #define AB8500_RTC_SWITCH_STAT_REG 0x0F |
36 | #define AB8500_REV_REG 0x1080 | ||
37 | 37 | ||
38 | /* RtcReadRequest bits */ | 38 | /* RtcReadRequest bits */ |
39 | #define RTC_READ_REQUEST 0x01 | 39 | #define RTC_READ_REQUEST 0x01 |
@@ -46,13 +46,13 @@ | |||
46 | #define COUNTS_PER_SEC (0xF000 / 60) | 46 | #define COUNTS_PER_SEC (0xF000 / 60) |
47 | #define AB8500_RTC_EPOCH 2000 | 47 | #define AB8500_RTC_EPOCH 2000 |
48 | 48 | ||
49 | static const unsigned long ab8500_rtc_time_regs[] = { | 49 | static const u8 ab8500_rtc_time_regs[] = { |
50 | AB8500_RTC_WATCH_TMIN_HI_REG, AB8500_RTC_WATCH_TMIN_MID_REG, | 50 | AB8500_RTC_WATCH_TMIN_HI_REG, AB8500_RTC_WATCH_TMIN_MID_REG, |
51 | AB8500_RTC_WATCH_TMIN_LOW_REG, AB8500_RTC_WATCH_TSECHI_REG, | 51 | AB8500_RTC_WATCH_TMIN_LOW_REG, AB8500_RTC_WATCH_TSECHI_REG, |
52 | AB8500_RTC_WATCH_TSECMID_REG | 52 | AB8500_RTC_WATCH_TSECMID_REG |
53 | }; | 53 | }; |
54 | 54 | ||
55 | static const unsigned long ab8500_rtc_alarm_regs[] = { | 55 | static const u8 ab8500_rtc_alarm_regs[] = { |
56 | AB8500_RTC_ALRM_MIN_HI_REG, AB8500_RTC_ALRM_MIN_MID_REG, | 56 | AB8500_RTC_ALRM_MIN_HI_REG, AB8500_RTC_ALRM_MIN_MID_REG, |
57 | AB8500_RTC_ALRM_MIN_LOW_REG | 57 | AB8500_RTC_ALRM_MIN_LOW_REG |
58 | }; | 58 | }; |
@@ -76,29 +76,30 @@ static unsigned long get_elapsed_seconds(int year) | |||
76 | 76 | ||
77 | static int ab8500_rtc_read_time(struct device *dev, struct rtc_time *tm) | 77 | static int ab8500_rtc_read_time(struct device *dev, struct rtc_time *tm) |
78 | { | 78 | { |
79 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); | ||
80 | unsigned long timeout = jiffies + HZ; | 79 | unsigned long timeout = jiffies + HZ; |
81 | int retval, i; | 80 | int retval, i; |
82 | unsigned long mins, secs; | 81 | unsigned long mins, secs; |
83 | unsigned char buf[ARRAY_SIZE(ab8500_rtc_time_regs)]; | 82 | unsigned char buf[ARRAY_SIZE(ab8500_rtc_time_regs)]; |
83 | u8 value; | ||
84 | 84 | ||
85 | /* Request a data read */ | 85 | /* Request a data read */ |
86 | retval = ab8500_write(ab8500, AB8500_RTC_READ_REQ_REG, | 86 | retval = abx500_set_register_interruptible(dev, |
87 | RTC_READ_REQUEST); | 87 | AB8500_RTC, AB8500_RTC_READ_REQ_REG, RTC_READ_REQUEST); |
88 | if (retval < 0) | 88 | if (retval < 0) |
89 | return retval; | 89 | return retval; |
90 | 90 | ||
91 | /* Early AB8500 chips will not clear the rtc read request bit */ | 91 | /* Early AB8500 chips will not clear the rtc read request bit */ |
92 | if (ab8500->revision == 0) { | 92 | if (abx500_get_chip_id(dev) == 0) { |
93 | msleep(1); | 93 | msleep(1); |
94 | } else { | 94 | } else { |
95 | /* Wait for some cycles after enabling the rtc read in ab8500 */ | 95 | /* Wait for some cycles after enabling the rtc read in ab8500 */ |
96 | while (time_before(jiffies, timeout)) { | 96 | while (time_before(jiffies, timeout)) { |
97 | retval = ab8500_read(ab8500, AB8500_RTC_READ_REQ_REG); | 97 | retval = abx500_get_register_interruptible(dev, |
98 | AB8500_RTC, AB8500_RTC_READ_REQ_REG, &value); | ||
98 | if (retval < 0) | 99 | if (retval < 0) |
99 | return retval; | 100 | return retval; |
100 | 101 | ||
101 | if (!(retval & RTC_READ_REQUEST)) | 102 | if (!(value & RTC_READ_REQUEST)) |
102 | break; | 103 | break; |
103 | 104 | ||
104 | msleep(1); | 105 | msleep(1); |
@@ -107,10 +108,11 @@ static int ab8500_rtc_read_time(struct device *dev, struct rtc_time *tm) | |||
107 | 108 | ||
108 | /* Read the Watchtime registers */ | 109 | /* Read the Watchtime registers */ |
109 | for (i = 0; i < ARRAY_SIZE(ab8500_rtc_time_regs); i++) { | 110 | for (i = 0; i < ARRAY_SIZE(ab8500_rtc_time_regs); i++) { |
110 | retval = ab8500_read(ab8500, ab8500_rtc_time_regs[i]); | 111 | retval = abx500_get_register_interruptible(dev, |
112 | AB8500_RTC, ab8500_rtc_time_regs[i], &value); | ||
111 | if (retval < 0) | 113 | if (retval < 0) |
112 | return retval; | 114 | return retval; |
113 | buf[i] = retval; | 115 | buf[i] = value; |
114 | } | 116 | } |
115 | 117 | ||
116 | mins = (buf[0] << 16) | (buf[1] << 8) | buf[2]; | 118 | mins = (buf[0] << 16) | (buf[1] << 8) | buf[2]; |
@@ -128,7 +130,6 @@ static int ab8500_rtc_read_time(struct device *dev, struct rtc_time *tm) | |||
128 | 130 | ||
129 | static int ab8500_rtc_set_time(struct device *dev, struct rtc_time *tm) | 131 | static int ab8500_rtc_set_time(struct device *dev, struct rtc_time *tm) |
130 | { | 132 | { |
131 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); | ||
132 | int retval, i; | 133 | int retval, i; |
133 | unsigned char buf[ARRAY_SIZE(ab8500_rtc_time_regs)]; | 134 | unsigned char buf[ARRAY_SIZE(ab8500_rtc_time_regs)]; |
134 | unsigned long no_secs, no_mins, secs = 0; | 135 | unsigned long no_secs, no_mins, secs = 0; |
@@ -162,27 +163,29 @@ static int ab8500_rtc_set_time(struct device *dev, struct rtc_time *tm) | |||
162 | buf[0] = (no_mins >> 16) & 0xFF; | 163 | buf[0] = (no_mins >> 16) & 0xFF; |
163 | 164 | ||
164 | for (i = 0; i < ARRAY_SIZE(ab8500_rtc_time_regs); i++) { | 165 | for (i = 0; i < ARRAY_SIZE(ab8500_rtc_time_regs); i++) { |
165 | retval = ab8500_write(ab8500, ab8500_rtc_time_regs[i], buf[i]); | 166 | retval = abx500_set_register_interruptible(dev, AB8500_RTC, |
167 | ab8500_rtc_time_regs[i], buf[i]); | ||
166 | if (retval < 0) | 168 | if (retval < 0) |
167 | return retval; | 169 | return retval; |
168 | } | 170 | } |
169 | 171 | ||
170 | /* Request a data write */ | 172 | /* Request a data write */ |
171 | return ab8500_write(ab8500, AB8500_RTC_READ_REQ_REG, RTC_WRITE_REQUEST); | 173 | return abx500_set_register_interruptible(dev, AB8500_RTC, |
174 | AB8500_RTC_READ_REQ_REG, RTC_WRITE_REQUEST); | ||
172 | } | 175 | } |
173 | 176 | ||
174 | static int ab8500_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | 177 | static int ab8500_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
175 | { | 178 | { |
176 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); | ||
177 | int retval, i; | 179 | int retval, i; |
178 | int rtc_ctrl; | 180 | u8 rtc_ctrl, value; |
179 | unsigned char buf[ARRAY_SIZE(ab8500_rtc_alarm_regs)]; | 181 | unsigned char buf[ARRAY_SIZE(ab8500_rtc_alarm_regs)]; |
180 | unsigned long secs, mins; | 182 | unsigned long secs, mins; |
181 | 183 | ||
182 | /* Check if the alarm is enabled or not */ | 184 | /* Check if the alarm is enabled or not */ |
183 | rtc_ctrl = ab8500_read(ab8500, AB8500_RTC_STAT_REG); | 185 | retval = abx500_get_register_interruptible(dev, AB8500_RTC, |
184 | if (rtc_ctrl < 0) | 186 | AB8500_RTC_STAT_REG, &rtc_ctrl); |
185 | return rtc_ctrl; | 187 | if (retval < 0) |
188 | return retval; | ||
186 | 189 | ||
187 | if (rtc_ctrl & RTC_ALARM_ENA) | 190 | if (rtc_ctrl & RTC_ALARM_ENA) |
188 | alarm->enabled = 1; | 191 | alarm->enabled = 1; |
@@ -192,10 +195,11 @@ static int ab8500_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |||
192 | alarm->pending = 0; | 195 | alarm->pending = 0; |
193 | 196 | ||
194 | for (i = 0; i < ARRAY_SIZE(ab8500_rtc_alarm_regs); i++) { | 197 | for (i = 0; i < ARRAY_SIZE(ab8500_rtc_alarm_regs); i++) { |
195 | retval = ab8500_read(ab8500, ab8500_rtc_alarm_regs[i]); | 198 | retval = abx500_get_register_interruptible(dev, AB8500_RTC, |
199 | ab8500_rtc_alarm_regs[i], &value); | ||
196 | if (retval < 0) | 200 | if (retval < 0) |
197 | return retval; | 201 | return retval; |
198 | buf[i] = retval; | 202 | buf[i] = value; |
199 | } | 203 | } |
200 | 204 | ||
201 | mins = (buf[0] << 16) | (buf[1] << 8) | (buf[2]); | 205 | mins = (buf[0] << 16) | (buf[1] << 8) | (buf[2]); |
@@ -211,15 +215,13 @@ static int ab8500_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |||
211 | 215 | ||
212 | static int ab8500_rtc_irq_enable(struct device *dev, unsigned int enabled) | 216 | static int ab8500_rtc_irq_enable(struct device *dev, unsigned int enabled) |
213 | { | 217 | { |
214 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); | 218 | return abx500_mask_and_set_register_interruptible(dev, AB8500_RTC, |
215 | 219 | AB8500_RTC_STAT_REG, RTC_ALARM_ENA, | |
216 | return ab8500_set_bits(ab8500, AB8500_RTC_STAT_REG, RTC_ALARM_ENA, | 220 | enabled ? RTC_ALARM_ENA : 0); |
217 | enabled ? RTC_ALARM_ENA : 0); | ||
218 | } | 221 | } |
219 | 222 | ||
220 | static int ab8500_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | 223 | static int ab8500_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
221 | { | 224 | { |
222 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); | ||
223 | int retval, i; | 225 | int retval, i; |
224 | unsigned char buf[ARRAY_SIZE(ab8500_rtc_alarm_regs)]; | 226 | unsigned char buf[ARRAY_SIZE(ab8500_rtc_alarm_regs)]; |
225 | unsigned long mins, secs = 0; | 227 | unsigned long mins, secs = 0; |
@@ -247,7 +249,8 @@ static int ab8500_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |||
247 | 249 | ||
248 | /* Set the alarm time */ | 250 | /* Set the alarm time */ |
249 | for (i = 0; i < ARRAY_SIZE(ab8500_rtc_alarm_regs); i++) { | 251 | for (i = 0; i < ARRAY_SIZE(ab8500_rtc_alarm_regs); i++) { |
250 | retval = ab8500_write(ab8500, ab8500_rtc_alarm_regs[i], buf[i]); | 252 | retval = abx500_set_register_interruptible(dev, AB8500_RTC, |
253 | ab8500_rtc_alarm_regs[i], buf[i]); | ||
251 | if (retval < 0) | 254 | if (retval < 0) |
252 | return retval; | 255 | return retval; |
253 | } | 256 | } |
@@ -276,10 +279,9 @@ static const struct rtc_class_ops ab8500_rtc_ops = { | |||
276 | 279 | ||
277 | static int __devinit ab8500_rtc_probe(struct platform_device *pdev) | 280 | static int __devinit ab8500_rtc_probe(struct platform_device *pdev) |
278 | { | 281 | { |
279 | struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent); | ||
280 | int err; | 282 | int err; |
281 | struct rtc_device *rtc; | 283 | struct rtc_device *rtc; |
282 | int rtc_ctrl; | 284 | u8 rtc_ctrl; |
283 | int irq; | 285 | int irq; |
284 | 286 | ||
285 | irq = platform_get_irq_byname(pdev, "ALARM"); | 287 | irq = platform_get_irq_byname(pdev, "ALARM"); |
@@ -287,17 +289,18 @@ static int __devinit ab8500_rtc_probe(struct platform_device *pdev) | |||
287 | return irq; | 289 | return irq; |
288 | 290 | ||
289 | /* For RTC supply test */ | 291 | /* For RTC supply test */ |
290 | err = ab8500_set_bits(ab8500, AB8500_RTC_STAT_REG, RTC_STATUS_DATA, | 292 | err = abx500_mask_and_set_register_interruptible(&pdev->dev, AB8500_RTC, |
291 | RTC_STATUS_DATA); | 293 | AB8500_RTC_STAT_REG, RTC_STATUS_DATA, RTC_STATUS_DATA); |
292 | if (err < 0) | 294 | if (err < 0) |
293 | return err; | 295 | return err; |
294 | 296 | ||
295 | /* Wait for reset by the PorRtc */ | 297 | /* Wait for reset by the PorRtc */ |
296 | msleep(1); | 298 | msleep(1); |
297 | 299 | ||
298 | rtc_ctrl = ab8500_read(ab8500, AB8500_RTC_STAT_REG); | 300 | err = abx500_get_register_interruptible(&pdev->dev, AB8500_RTC, |
299 | if (rtc_ctrl < 0) | 301 | AB8500_RTC_STAT_REG, &rtc_ctrl); |
300 | return rtc_ctrl; | 302 | if (err < 0) |
303 | return err; | ||
301 | 304 | ||
302 | /* Check if the RTC Supply fails */ | 305 | /* Check if the RTC Supply fails */ |
303 | if (!(rtc_ctrl & RTC_STATUS_DATA)) { | 306 | if (!(rtc_ctrl & RTC_STATUS_DATA)) { |
diff --git a/include/linux/mfd/ab8500.h b/include/linux/mfd/ab8500.h index f5cec4500f38..d63b6050b183 100644 --- a/include/linux/mfd/ab8500.h +++ b/include/linux/mfd/ab8500.h | |||
@@ -10,6 +10,29 @@ | |||
10 | #include <linux/device.h> | 10 | #include <linux/device.h> |
11 | 11 | ||
12 | /* | 12 | /* |
13 | * AB8500 bank addresses | ||
14 | */ | ||
15 | #define AB8500_SYS_CTRL1_BLOCK 0x1 | ||
16 | #define AB8500_SYS_CTRL2_BLOCK 0x2 | ||
17 | #define AB8500_REGU_CTRL1 0x3 | ||
18 | #define AB8500_REGU_CTRL2 0x4 | ||
19 | #define AB8500_USB 0x5 | ||
20 | #define AB8500_TVOUT 0x6 | ||
21 | #define AB8500_DBI 0x7 | ||
22 | #define AB8500_ECI_AV_ACC 0x8 | ||
23 | #define AB8500_RESERVED 0x9 | ||
24 | #define AB8500_GPADC 0xA | ||
25 | #define AB8500_CHARGER 0xB | ||
26 | #define AB8500_GAS_GAUGE 0xC | ||
27 | #define AB8500_AUDIO 0xD | ||
28 | #define AB8500_INTERRUPT 0xE | ||
29 | #define AB8500_RTC 0xF | ||
30 | #define AB8500_MISC 0x10 | ||
31 | #define AB8500_DEBUG 0x12 | ||
32 | #define AB8500_PROD_TEST 0x13 | ||
33 | #define AB8500_OTP_EMUL 0x15 | ||
34 | |||
35 | /* | ||
13 | * Interrupts | 36 | * Interrupts |
14 | */ | 37 | */ |
15 | 38 | ||
@@ -99,6 +122,7 @@ struct ab8500 { | |||
99 | int revision; | 122 | int revision; |
100 | int irq_base; | 123 | int irq_base; |
101 | int irq; | 124 | int irq; |
125 | u8 chip_id; | ||
102 | 126 | ||
103 | int (*write) (struct ab8500 *a8500, u16 addr, u8 data); | 127 | int (*write) (struct ab8500 *a8500, u16 addr, u8 data); |
104 | int (*read) (struct ab8500 *a8500, u16 addr); | 128 | int (*read) (struct ab8500 *a8500, u16 addr); |
@@ -124,10 +148,6 @@ struct ab8500_platform_data { | |||
124 | struct regulator_init_data *regulator[AB8500_NUM_REGULATORS]; | 148 | struct regulator_init_data *regulator[AB8500_NUM_REGULATORS]; |
125 | }; | 149 | }; |
126 | 150 | ||
127 | extern int ab8500_write(struct ab8500 *a8500, u16 addr, u8 data); | ||
128 | extern int ab8500_read(struct ab8500 *a8500, u16 addr); | ||
129 | extern int ab8500_set_bits(struct ab8500 *a8500, u16 addr, u8 mask, u8 data); | ||
130 | |||
131 | extern int __devinit ab8500_init(struct ab8500 *ab8500); | 151 | extern int __devinit ab8500_init(struct ab8500 *ab8500); |
132 | extern int __devexit ab8500_exit(struct ab8500 *ab8500); | 152 | extern int __devexit ab8500_exit(struct ab8500 *ab8500); |
133 | 153 | ||
diff --git a/include/linux/mfd/abx500.h b/include/linux/mfd/abx500.h index 390726fcbcb1..be7373c79bea 100644 --- a/include/linux/mfd/abx500.h +++ b/include/linux/mfd/abx500.h | |||
@@ -6,8 +6,7 @@ | |||
6 | * | 6 | * |
7 | * ABX500 core access functions. | 7 | * ABX500 core access functions. |
8 | * The abx500 interface is used for the Analog Baseband chip | 8 | * The abx500 interface is used for the Analog Baseband chip |
9 | * ab3100, ab3550, ab5500 and possibly comming. It is not used for | 9 | * ab3100, ab3550, ab5500, and ab8500. |
10 | * ab4500 and ab8500 since they are another family of chip. | ||
11 | * | 10 | * |
12 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> | 11 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> |
13 | * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com> | 12 | * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com> |