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authorLinus Torvalds <torvalds@linux-foundation.org>2014-06-25 15:19:01 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-06-25 15:19:01 -0400
commit456febd299999d268342edf3ad4130075f0fe680 (patch)
treeaa40bbb4850c340cb4a9cb6dbb6766de271ad82e
parent15e52d9a81a66fba97488541bb29c91954a3f4c7 (diff)
parent6c9d16178870315846faa1f59697b801e3fe0531 (diff)
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann: "A new set of bug fixes for 3.16, containing patches for seven platforms: at91: - drivers/misc fix for Kconfig PWM symbol - correction of several values in DT after conversion to CCF - fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc imx: - Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51, because controller base CD/WP is not working in esdhc driver due to runtime PM support - A couple of random ventana gw5xxx board fixes - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving IPUv3 driver out of staging tree - Fix enet/fec clock selection on imx6sl - Fix display node on imx53-m53evk board - A couple of Cubox-i updates from Russell, which were omitted from the merge window due to dependency integrator: - fix an OF-related regression against 3.15 mvebu: - mvebu (v7) - Fix broken SoC ID detection - Select ARM_CPU_SUSPEND for v7 - Remove armada38x compatible string (no users yet) - Enable Dove SoC in mvebu_v7_defconfig - kirkwood - Fix phy-connection-type on GuruPlug board qcom: - enable gsbi driver in defconfig - fix section mismatch warning in serial driver samsung: - use WFI macro in platform_do_lowpower because exynos cpuhotplug includes a hardcoded WFI instruction and it causes compile error in Thumb-2 mode. - fix GIC reg sizes for exynos4 SoCs - remove reset timer counter value during boot and resume for mct to fix a big jump in printk timestamps - fix pm code to check cortex-A9 for another exynos SoCs - don't rely on firmware's secondary_cpu_start for mcpm sti: - Ethernet clocks were wrongly defined for STiH415/416 platforms - STiH416 B2020 revision E DTS file name contained uppercase, change to lowercase" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (33 commits) ARM: at91/dt: sam9261: remove slow RC osc ARM: at91/dt: define sam9261ek slow crystal frequency ARM: at91/dt: sam9261: correctly define mainck ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values misc: atmel_pwm: fix Kconfig symbols ARM: integrator: fix OF-related regression ARM: mvebu: Fix the improper use of the compatible string armada38x using a wildcard ARM: dts: kirkwood: fix phy-connection-type for Guruplug ARM: EXYNOS: Don't rely on firmware's secondary_cpu_start for mcpm ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc. ARM: dts: imx51-babbage: Fix esdhc setup ARM: dts: mx5: Move the display out of soc {} node ARM: dts: mx5: Fix IPU port node placement ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platforms ARM: mvebu: Fix broken SoC ID detection ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE ARM: multi_v7_defconfig: Add QCOM GSBI driver ARM: stih41x: Rename stih416-b2020-revE.dts to stih416-b2020e.dts tty: serial: msm: Fix section mismatch warning ...
-rw-r--r--Documentation/devicetree/bindings/arm/armada-38x.txt14
-rw-r--r--arch/arm/boot/dts/Makefile2
-rw-r--r--arch/arm/boot/dts/armada-380.dtsi2
-rw-r--r--arch/arm/boot/dts/armada-385-db.dts2
-rw-r--r--arch/arm/boot/dts/armada-385-rd.dts2
-rw-r--r--arch/arm/boot/dts/armada-385.dtsi2
-rw-r--r--arch/arm/boot/dts/armada-38x.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9261.dtsi21
-rw-r--r--arch/arm/boot/dts/at91sam9261ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi4
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi2
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts10
-rw-r--r--arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts4
-rw-r--r--arch/arm/boot/dts/imx53-m53evk.dts40
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard.dts10
-rw-r--r--arch/arm/boot/dts/imx6q-gw51xx.dts2
-rw-r--r--arch/arm/boot/dts/imx6qdl-cubox-i.dtsi27
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw51xx.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw52xx.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw53xx.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-microsom.dtsi13
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi2
-rw-r--r--arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts4
-rw-r--r--arch/arm/boot/dts/stih415.dtsi8
-rw-r--r--arch/arm/boot/dts/stih416-b2020e.dts (renamed from arch/arm/boot/dts/stih416-b2020-revE.dts)0
-rw-r--r--arch/arm/boot/dts/stih416.dtsi8
-rw-r--r--arch/arm/configs/imx_v6_v7_defconfig1
-rw-r--r--arch/arm/configs/multi_v7_defconfig1
-rw-r--r--arch/arm/configs/mvebu_v7_defconfig2
-rw-r--r--arch/arm/mach-exynos/hotplug.c8
-rw-r--r--arch/arm/mach-exynos/mcpm-exynos.c11
-rw-r--r--arch/arm/mach-exynos/pm.c15
-rw-r--r--arch/arm/mach-imx/clk-imx6sl.c1
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c26
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c23
-rw-r--r--arch/arm/mach-mvebu/Kconfig2
-rw-r--r--drivers/clocksource/exynos_mct.c9
-rw-r--r--drivers/misc/Kconfig2
-rw-r--r--drivers/tty/serial/msm_serial.c2
-rw-r--r--include/dt-bindings/clock/imx6sl-clock.h3
-rw-r--r--include/dt-bindings/clock/stih415-clks.h1
-rw-r--r--include/dt-bindings/clock/stih416-clks.h1
43 files changed, 158 insertions, 147 deletions
diff --git a/Documentation/devicetree/bindings/arm/armada-38x.txt b/Documentation/devicetree/bindings/arm/armada-38x.txt
index 11f2330a6554..ad9f8ed4d9bd 100644
--- a/Documentation/devicetree/bindings/arm/armada-38x.txt
+++ b/Documentation/devicetree/bindings/arm/armada-38x.txt
@@ -6,5 +6,15 @@ following property:
6 6
7Required root node property: 7Required root node property:
8 8
9 - compatible: must contain either "marvell,armada380" or 9 - compatible: must contain "marvell,armada380"
10 "marvell,armada385" depending on the variant of the SoC being used. 10
11In addition, boards using the Marvell Armada 385 SoC shall have the
12following property before the previous one:
13
14Required root node property:
15
16compatible: must contain "marvell,armada385"
17
18Example:
19
20compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5986ff63b901..adb5ed9e269e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -357,7 +357,7 @@ dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \
357 stih415-b2020.dtb \ 357 stih415-b2020.dtb \
358 stih416-b2000.dtb \ 358 stih416-b2000.dtb \
359 stih416-b2020.dtb \ 359 stih416-b2020.dtb \
360 stih416-b2020-revE.dtb 360 stih416-b2020e.dtb
361dtb-$(CONFIG_MACH_SUN4I) += \ 361dtb-$(CONFIG_MACH_SUN4I) += \
362 sun4i-a10-a1000.dtb \ 362 sun4i-a10-a1000.dtb \
363 sun4i-a10-cubieboard.dtb \ 363 sun4i-a10-cubieboard.dtb \
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index e69bc6759c39..4173a8ab34e7 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -16,7 +16,7 @@
16 16
17/ { 17/ {
18 model = "Marvell Armada 380 family SoC"; 18 model = "Marvell Armada 380 family SoC";
19 compatible = "marvell,armada380", "marvell,armada38x"; 19 compatible = "marvell,armada380";
20 20
21 cpus { 21 cpus {
22 #address-cells = <1>; 22 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
index 5bae4731828b..1af886f1e486 100644
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-385-db.dts
@@ -16,7 +16,7 @@
16 16
17/ { 17/ {
18 model = "Marvell Armada 385 Development Board"; 18 model = "Marvell Armada 385 Development Board";
19 compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada38x"; 19 compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380";
20 20
21 chosen { 21 chosen {
22 bootargs = "console=ttyS0,115200 earlyprintk"; 22 bootargs = "console=ttyS0,115200 earlyprintk";
diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-385-rd.dts
index 40893255a3f0..aaca2861dc87 100644
--- a/arch/arm/boot/dts/armada-385-rd.dts
+++ b/arch/arm/boot/dts/armada-385-rd.dts
@@ -17,7 +17,7 @@
17 17
18/ { 18/ {
19 model = "Marvell Armada 385 Reference Design"; 19 model = "Marvell Armada 385 Reference Design";
20 compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada38x"; 20 compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
21 21
22 chosen { 22 chosen {
23 bootargs = "console=ttyS0,115200 earlyprintk"; 23 bootargs = "console=ttyS0,115200 earlyprintk";
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index f011009bf4cf..6283d7912f71 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -16,7 +16,7 @@
16 16
17/ { 17/ {
18 model = "Marvell Armada 385 family SoC"; 18 model = "Marvell Armada 385 family SoC";
19 compatible = "marvell,armada385", "marvell,armada38x"; 19 compatible = "marvell,armada385", "marvell,armada380";
20 20
21 cpus { 21 cpus {
22 #address-cells = <1>; 22 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 3de364e81b52..689fa1a46728 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -20,7 +20,7 @@
20 20
21/ { 21/ {
22 model = "Marvell Armada 38x family SoC"; 22 model = "Marvell Armada 38x family SoC";
23 compatible = "marvell,armada38x"; 23 compatible = "marvell,armada380";
24 24
25 aliases { 25 aliases {
26 gpio0 = &gpio0; 26 gpio0 = &gpio0;
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index b309c1c6e848..04927db1d6bf 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -568,24 +568,17 @@
568 #size-cells = <0>; 568 #size-cells = <0>;
569 #interrupt-cells = <1>; 569 #interrupt-cells = <1>;
570 570
571 slow_rc_osc: slow_rc_osc { 571 main_osc: main_osc {
572 compatible = "fixed-clock"; 572 compatible = "atmel,at91rm9200-clk-main-osc";
573 #clock-cells = <0>; 573 #clock-cells = <0>;
574 clock-frequency = <32768>; 574 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
575 clock-accuracy = <50000000>; 575 clocks = <&main_xtal>;
576 };
577
578 clk32k: slck {
579 compatible = "atmel,at91sam9260-clk-slow";
580 #clock-cells = <0>;
581 clocks = <&slow_rc_osc &slow_xtal>;
582 }; 576 };
583 577
584 main: mainck { 578 main: mainck {
585 compatible = "atmel,at91rm9200-clk-main"; 579 compatible = "atmel,at91rm9200-clk-main";
586 #clock-cells = <0>; 580 #clock-cells = <0>;
587 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 581 clocks = <&main_osc>;
588 clocks = <&main_xtal>;
589 }; 582 };
590 583
591 plla: pllack { 584 plla: pllack {
@@ -615,7 +608,7 @@
615 compatible = "atmel,at91rm9200-clk-master"; 608 compatible = "atmel,at91rm9200-clk-master";
616 #clock-cells = <0>; 609 #clock-cells = <0>;
617 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 610 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
618 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; 611 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
619 atmel,clk-output-range = <0 94000000>; 612 atmel,clk-output-range = <0 94000000>;
620 atmel,clk-divisors = <1 2 4 0>; 613 atmel,clk-divisors = <1 2 4 0>;
621 }; 614 };
@@ -632,7 +625,7 @@
632 #address-cells = <1>; 625 #address-cells = <1>;
633 #size-cells = <0>; 626 #size-cells = <0>;
634 interrupt-parent = <&pmc>; 627 interrupt-parent = <&pmc>;
635 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; 628 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
636 629
637 prog0: prog0 { 630 prog0: prog0 {
638 #clock-cells = <0>; 631 #clock-cells = <0>;
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index c6683ea8b743..aa35a7aec9a8 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -20,6 +20,10 @@
20 reg = <0x20000000 0x4000000>; 20 reg = <0x20000000 0x4000000>;
21 }; 21 };
22 22
23 slow_xtal {
24 clock-frequency = <32768>;
25 };
26
23 main_xtal { 27 main_xtal {
24 clock-frequency = <18432000>; 28 clock-frequency = <18432000>;
25 }; 29 };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index d1b82e6635d5..287795985e32 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -132,8 +132,8 @@
132 <595000000 650000000 3 0>, 132 <595000000 650000000 3 0>,
133 <545000000 600000000 0 1>, 133 <545000000 600000000 0 1>,
134 <495000000 555000000 1 1>, 134 <495000000 555000000 1 1>,
135 <445000000 500000000 1 2>, 135 <445000000 500000000 2 1>,
136 <400000000 450000000 1 3>; 136 <400000000 450000000 3 1>;
137 }; 137 };
138 138
139 plladiv: plladivck { 139 plladiv: plladivck {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 1a57298636a5..d6133f497207 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -140,8 +140,8 @@
140 595000000 650000000 3 0 140 595000000 650000000 3 0
141 545000000 600000000 0 1 141 545000000 600000000 0 1
142 495000000 555000000 1 1 142 495000000 555000000 1 1
143 445000000 500000000 1 2 143 445000000 500000000 2 1
144 400000000 450000000 1 3>; 144 400000000 450000000 3 1>;
145 }; 145 };
146 146
147 plladiv: plladivck { 147 plladiv: plladivck {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index b8ece4be41ca..fbaf426d2daa 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -113,7 +113,7 @@
113 compatible = "arm,cortex-a9-gic"; 113 compatible = "arm,cortex-a9-gic";
114 #interrupt-cells = <3>; 114 #interrupt-cells = <3>;
115 interrupt-controller; 115 interrupt-controller;
116 reg = <0x10490000 0x1000>, <0x10480000 0x100>; 116 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
117 }; 117 };
118 118
119 combiner: interrupt-controller@10440000 { 119 combiner: interrupt-controller@10440000 {
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 6bc3243a80d3..181d77fa2fa6 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -315,15 +315,15 @@
315&esdhc1 { 315&esdhc1 {
316 pinctrl-names = "default"; 316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_esdhc1>; 317 pinctrl-0 = <&pinctrl_esdhc1>;
318 fsl,cd-controller; 318 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
319 fsl,wp-controller; 319 wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
320 status = "okay"; 320 status = "okay";
321}; 321};
322 322
323&esdhc2 { 323&esdhc2 {
324 pinctrl-names = "default"; 324 pinctrl-names = "default";
325 pinctrl-0 = <&pinctrl_esdhc2>; 325 pinctrl-0 = <&pinctrl_esdhc2>;
326 cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 326 cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
327 wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 327 wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
328 status = "okay"; 328 status = "okay";
329}; 329};
@@ -468,8 +468,8 @@
468 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 468 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
469 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 469 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
470 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 470 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
471 MX51_PAD_GPIO1_0__SD1_CD 0x20d5 471 MX51_PAD_GPIO1_0__GPIO1_0 0x100
472 MX51_PAD_GPIO1_1__SD1_WP 0x20d5 472 MX51_PAD_GPIO1_1__GPIO1_1 0x100
473 >; 473 >;
474 }; 474 };
475 475
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
index 75e66c9c6144..31cfb7f2b02e 100644
--- a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
@@ -107,7 +107,7 @@
107&esdhc1 { 107&esdhc1 {
108 pinctrl-names = "default"; 108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>; 109 pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
110 fsl,cd-controller; 110 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
111 status = "okay"; 111 status = "okay";
112}; 112};
113 113
@@ -206,7 +206,7 @@
206 206
207 pinctrl_esdhc1_cd: esdhc1_cd { 207 pinctrl_esdhc1_cd: esdhc1_cd {
208 fsl,pins = < 208 fsl,pins = <
209 MX51_PAD_GPIO1_0__SD1_CD 0x20d5 209 MX51_PAD_GPIO1_0__GPIO1_0 0xd5
210 >; 210 >;
211 }; 211 };
212 212
diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index d5d146a8b149..c4956b0ffb35 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -21,27 +21,25 @@
21 <0xb0000000 0x20000000>; 21 <0xb0000000 0x20000000>;
22 }; 22 };
23 23
24 soc { 24 display1: display@di1 {
25 display1: display@di1 { 25 compatible = "fsl,imx-parallel-display";
26 compatible = "fsl,imx-parallel-display"; 26 interface-pix-fmt = "bgr666";
27 interface-pix-fmt = "bgr666"; 27 pinctrl-names = "default";
28 pinctrl-names = "default"; 28 pinctrl-0 = <&pinctrl_ipu_disp1>;
29 pinctrl-0 = <&pinctrl_ipu_disp1>; 29
30 30 display-timings {
31 display-timings { 31 800x480p60 {
32 800x480p60 { 32 native-mode;
33 native-mode; 33 clock-frequency = <31500000>;
34 clock-frequency = <31500000>; 34 hactive = <800>;
35 hactive = <800>; 35 vactive = <480>;
36 vactive = <480>; 36 hfront-porch = <40>;
37 hfront-porch = <40>; 37 hback-porch = <88>;
38 hback-porch = <88>; 38 hsync-len = <128>;
39 hsync-len = <128>; 39 vback-porch = <33>;
40 vback-porch = <33>; 40 vfront-porch = <9>;
41 vfront-porch = <9>; 41 vsync-len = <3>;
42 vsync-len = <3>; 42 vsync-active = <1>;
43 vsync-active = <1>;
44 };
45 }; 43 };
46 }; 44 };
47 45
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index 5373a5f2782b..c8e51dd41b8f 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -143,6 +143,14 @@
143 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>; 143 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
144 }; 144 };
145 145
146 pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {
147 /*
148 * Similar to pinctrl_usbotg_2, but we want it
149 * pulled down for a fixed host connection.
150 */
151 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
152 };
153
146 pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus { 154 pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
147 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>; 155 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
148 }; 156 };
@@ -178,6 +186,8 @@
178}; 186};
179 187
180&usbotg { 188&usbotg {
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
181 vbus-supply = <&reg_usbotg_vbus>; 191 vbus-supply = <&reg_usbotg_vbus>;
182 status = "okay"; 192 status = "okay";
183}; 193};
diff --git a/arch/arm/boot/dts/imx6q-gw51xx.dts b/arch/arm/boot/dts/imx6q-gw51xx.dts
index af4929aee075..0e1406e58eff 100644
--- a/arch/arm/boot/dts/imx6q-gw51xx.dts
+++ b/arch/arm/boot/dts/imx6q-gw51xx.dts
@@ -11,7 +11,7 @@
11 11
12/dts-v1/; 12/dts-v1/;
13#include "imx6q.dtsi" 13#include "imx6q.dtsi"
14#include "imx6qdl-gw54xx.dtsi" 14#include "imx6qdl-gw51xx.dtsi"
15 15
16/ { 16/ {
17 model = "Gateworks Ventana i.MX6 Quad GW51XX"; 17 model = "Gateworks Ventana i.MX6 Quad GW51XX";
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index 25da82a03110..e8e781656b3f 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -12,6 +12,19 @@
12 pinctrl-0 = <&pinctrl_cubox_i_ir>; 12 pinctrl-0 = <&pinctrl_cubox_i_ir>;
13 }; 13 };
14 14
15 pwmleds {
16 compatible = "pwm-leds";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_cubox_i_pwm1>;
19
20 front {
21 active-low;
22 label = "imx6:red:front";
23 max-brightness = <248>;
24 pwms = <&pwm1 0 50000>;
25 };
26 };
27
15 regulators { 28 regulators {
16 compatible = "simple-bus"; 29 compatible = "simple-bus";
17 30
@@ -109,6 +122,10 @@
109 >; 122 >;
110 }; 123 };
111 124
125 pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-led {
126 fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0>;
127 };
128
112 pinctrl_cubox_i_spdif: cubox-i-spdif { 129 pinctrl_cubox_i_spdif: cubox-i-spdif {
113 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>; 130 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
114 }; 131 };
@@ -117,6 +134,14 @@
117 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>; 134 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
118 }; 135 };
119 136
137 pinctrl_cubox_i_usbotg_id: cubox-i-usbotg-id {
138 /*
139 * The Cubox-i pulls this low, but as it's pointless
140 * leaving it as a pull-up, even if it is just 10uA.
141 */
142 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
143 };
144
120 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus { 145 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
121 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>; 146 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
122 }; 147 };
@@ -153,6 +178,8 @@
153}; 178};
154 179
155&usbotg { 180&usbotg {
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_cubox_i_usbotg_id>;
156 vbus-supply = <&reg_usbotg_vbus>; 183 vbus-supply = <&reg_usbotg_vbus>;
157 status = "okay"; 184 status = "okay";
158}; 185};
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
index 31665adcbf39..0db15af41cb1 100644
--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
@@ -161,7 +161,7 @@
161 status = "okay"; 161 status = "okay";
162 162
163 pmic: ltc3676@3c { 163 pmic: ltc3676@3c {
164 compatible = "ltc,ltc3676"; 164 compatible = "lltc,ltc3676";
165 reg = <0x3c>; 165 reg = <0x3c>;
166 166
167 regulators { 167 regulators {
diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 367af3ec9435..744c8a2d81f6 100644
--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -220,7 +220,7 @@
220 }; 220 };
221 221
222 pmic: ltc3676@3c { 222 pmic: ltc3676@3c {
223 compatible = "ltc,ltc3676"; 223 compatible = "lltc,ltc3676";
224 reg = <0x3c>; 224 reg = <0x3c>;
225 225
226 regulators { 226 regulators {
@@ -288,7 +288,7 @@
288 codec: sgtl5000@0a { 288 codec: sgtl5000@0a {
289 compatible = "fsl,sgtl5000"; 289 compatible = "fsl,sgtl5000";
290 reg = <0x0a>; 290 reg = <0x0a>;
291 clocks = <&clks 169>; 291 clocks = <&clks 201>;
292 VDDA-supply = <&reg_1p8v>; 292 VDDA-supply = <&reg_1p8v>;
293 VDDIO-supply = <&reg_3p3v>; 293 VDDIO-supply = <&reg_3p3v>;
294 }; 294 };
diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index c91b5a6c769b..adf150c1be90 100644
--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -234,7 +234,7 @@
234 }; 234 };
235 235
236 pmic: ltc3676@3c { 236 pmic: ltc3676@3c {
237 compatible = "ltc,ltc3676"; 237 compatible = "lltc,ltc3676";
238 reg = <0x3c>; 238 reg = <0x3c>;
239 239
240 regulators { 240 regulators {
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
index d729d0b15f25..79eac6849d4c 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
@@ -10,14 +10,6 @@
10 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 10 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
11 >; 11 >;
12 }; 12 };
13
14 pinctrl_microsom_usbotg: microsom-usbotg {
15 /*
16 * Similar to pinctrl_usbotg_2, but we want it
17 * pulled down for a fixed host connection.
18 */
19 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
20 };
21 }; 13 };
22}; 14};
23 15
@@ -26,8 +18,3 @@
26 pinctrl-0 = <&pinctrl_microsom_uart1>; 18 pinctrl-0 = <&pinctrl_microsom_uart1>;
27 status = "okay"; 19 status = "okay";
28}; 20};
29
30&usbotg {
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_microsom_usbotg>;
33};
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 2d4e5285f3f3..57d4abe03a94 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -686,7 +686,7 @@
686 compatible = "fsl,imx6sl-fec", "fsl,imx25-fec"; 686 compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
687 reg = <0x02188000 0x4000>; 687 reg = <0x02188000 0x4000>;
688 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>; 688 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
689 clocks = <&clks IMX6SL_CLK_ENET_REF>, 689 clocks = <&clks IMX6SL_CLK_ENET>,
690 <&clks IMX6SL_CLK_ENET_REF>; 690 <&clks IMX6SL_CLK_ENET_REF>;
691 clock-names = "ipg", "ahb"; 691 clock-names = "ipg", "ahb";
692 status = "disabled"; 692 status = "disabled";
diff --git a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
index c5a1fc75c7a3..b2d9834bf458 100644
--- a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
+++ b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
@@ -105,7 +105,6 @@
105 compatible = "ethernet-phy-id0141.0cb0", 105 compatible = "ethernet-phy-id0141.0cb0",
106 "ethernet-phy-ieee802.3-c22"; 106 "ethernet-phy-ieee802.3-c22";
107 reg = <0>; 107 reg = <0>;
108 phy-connection-type = "rgmii-id";
109 }; 108 };
110 109
111 ethphy1: ethernet-phy@1 { 110 ethphy1: ethernet-phy@1 {
@@ -113,7 +112,6 @@
113 compatible = "ethernet-phy-id0141.0cb0", 112 compatible = "ethernet-phy-id0141.0cb0",
114 "ethernet-phy-ieee802.3-c22"; 113 "ethernet-phy-ieee802.3-c22";
115 reg = <1>; 114 reg = <1>;
116 phy-connection-type = "rgmii-id";
117 }; 115 };
118}; 116};
119 117
@@ -121,6 +119,7 @@
121 status = "okay"; 119 status = "okay";
122 ethernet0-port@0 { 120 ethernet0-port@0 {
123 phy-handle = <&ethphy0>; 121 phy-handle = <&ethphy0>;
122 phy-connection-type = "rgmii-id";
124 }; 123 };
125}; 124};
126 125
@@ -128,5 +127,6 @@
128 status = "okay"; 127 status = "okay";
129 ethernet1-port@0 { 128 ethernet1-port@0 {
130 phy-handle = <&ethphy1>; 129 phy-handle = <&ethphy1>;
130 phy-connection-type = "rgmii-id";
131 }; 131 };
132}; 132};
diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi
index d6f254f302fe..a0f6f75fe3b5 100644
--- a/arch/arm/boot/dts/stih415.dtsi
+++ b/arch/arm/boot/dts/stih415.dtsi
@@ -169,8 +169,8 @@
169 169
170 pinctrl-names = "default"; 170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_mii0>; 171 pinctrl-0 = <&pinctrl_mii0>;
172 clock-names = "stmmaceth"; 172 clock-names = "stmmaceth", "sti-ethclk";
173 clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>; 173 clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
174 }; 174 };
175 175
176 ethernet1: dwmac@fef08000 { 176 ethernet1: dwmac@fef08000 {
@@ -192,8 +192,8 @@
192 reset-names = "stmmaceth"; 192 reset-names = "stmmaceth";
193 pinctrl-names = "default"; 193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_mii1>; 194 pinctrl-0 = <&pinctrl_mii1>;
195 clock-names = "stmmaceth"; 195 clock-names = "stmmaceth", "sti-ethclk";
196 clocks = <&clk_s_a0_ls CLK_ETH1_PHY>; 196 clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
197 }; 197 };
198 198
199 rc: rc@fe518000 { 199 rc: rc@fe518000 {
diff --git a/arch/arm/boot/dts/stih416-b2020-revE.dts b/arch/arm/boot/dts/stih416-b2020e.dts
index ba0fa2caaf18..ba0fa2caaf18 100644
--- a/arch/arm/boot/dts/stih416-b2020-revE.dts
+++ b/arch/arm/boot/dts/stih416-b2020e.dts
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 06473c5d9ea9..84758d76d064 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -175,8 +175,8 @@
175 reset-names = "stmmaceth"; 175 reset-names = "stmmaceth";
176 pinctrl-names = "default"; 176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_mii0>; 177 pinctrl-0 = <&pinctrl_mii0>;
178 clock-names = "stmmaceth"; 178 clock-names = "stmmaceth", "sti-ethclk";
179 clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>; 179 clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
180 }; 180 };
181 181
182 ethernet1: dwmac@fef08000 { 182 ethernet1: dwmac@fef08000 {
@@ -197,8 +197,8 @@
197 reset-names = "stmmaceth"; 197 reset-names = "stmmaceth";
198 pinctrl-names = "default"; 198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_mii1>; 199 pinctrl-0 = <&pinctrl_mii1>;
200 clock-names = "stmmaceth"; 200 clock-names = "stmmaceth", "sti-ethclk";
201 clocks = <&clk_s_a0_ls CLK_ETH1_PHY>; 201 clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
202 }; 202 };
203 203
204 rc: rc@fe518000 { 204 rc: rc@fe518000 {
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index ef8815327e5b..59b7e45142d8 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -186,6 +186,7 @@ CONFIG_VIDEO_MX3=y
186CONFIG_V4L_MEM2MEM_DRIVERS=y 186CONFIG_V4L_MEM2MEM_DRIVERS=y
187CONFIG_VIDEO_CODA=y 187CONFIG_VIDEO_CODA=y
188CONFIG_SOC_CAMERA_OV2640=y 188CONFIG_SOC_CAMERA_OV2640=y
189CONFIG_IMX_IPUV3_CORE=y
189CONFIG_DRM=y 190CONFIG_DRM=y
190CONFIG_DRM_PANEL_SIMPLE=y 191CONFIG_DRM_PANEL_SIMPLE=y
191CONFIG_BACKLIGHT_LCD_SUPPORT=y 192CONFIG_BACKLIGHT_LCD_SUPPORT=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 17d9462b9fb9..be1a3455a9fe 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -353,6 +353,7 @@ CONFIG_MFD_NVEC=y
353CONFIG_KEYBOARD_NVEC=y 353CONFIG_KEYBOARD_NVEC=y
354CONFIG_SERIO_NVEC_PS2=y 354CONFIG_SERIO_NVEC_PS2=y
355CONFIG_NVEC_POWER=y 355CONFIG_NVEC_POWER=y
356CONFIG_QCOM_GSBI=y
356CONFIG_COMMON_CLK_QCOM=y 357CONFIG_COMMON_CLK_QCOM=y
357CONFIG_MSM_GCC_8660=y 358CONFIG_MSM_GCC_8660=y
358CONFIG_MSM_MMCC_8960=y 359CONFIG_MSM_MMCC_8960=y
diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index e11170e37442..b0bfefa23902 100644
--- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -14,6 +14,7 @@ CONFIG_MACH_ARMADA_370=y
14CONFIG_MACH_ARMADA_375=y 14CONFIG_MACH_ARMADA_375=y
15CONFIG_MACH_ARMADA_38X=y 15CONFIG_MACH_ARMADA_38X=y
16CONFIG_MACH_ARMADA_XP=y 16CONFIG_MACH_ARMADA_XP=y
17CONFIG_MACH_DOVE=y
17CONFIG_NEON=y 18CONFIG_NEON=y
18# CONFIG_CACHE_L2X0 is not set 19# CONFIG_CACHE_L2X0 is not set
19# CONFIG_SWP_EMULATE is not set 20# CONFIG_SWP_EMULATE is not set
@@ -52,6 +53,7 @@ CONFIG_INPUT_EVDEV=y
52CONFIG_KEYBOARD_GPIO=y 53CONFIG_KEYBOARD_GPIO=y
53CONFIG_SERIAL_8250=y 54CONFIG_SERIAL_8250=y
54CONFIG_SERIAL_8250_CONSOLE=y 55CONFIG_SERIAL_8250_CONSOLE=y
56CONFIG_SERIAL_OF_PLATFORM=y
55CONFIG_I2C=y 57CONFIG_I2C=y
56CONFIG_SPI=y 58CONFIG_SPI=y
57CONFIG_SPI_ORION=y 59CONFIG_SPI_ORION=y
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 69fa48397394..8a134d019cb3 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -46,13 +46,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
46 if (cpu == 1) 46 if (cpu == 1)
47 exynos_cpu_power_down(cpu); 47 exynos_cpu_power_down(cpu);
48 48
49 /* 49 wfi();
50 * here's the WFI
51 */
52 asm(".word 0xe320f003\n"
53 :
54 :
55 : "memory", "cc");
56 50
57 if (pen_release == cpu_logical_map(cpu)) { 51 if (pen_release == cpu_logical_map(cpu)) {
58 /* 52 /*
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index 0498d0b887ef..ace0ed617476 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -25,7 +25,6 @@
25 25
26#define EXYNOS5420_CPUS_PER_CLUSTER 4 26#define EXYNOS5420_CPUS_PER_CLUSTER 4
27#define EXYNOS5420_NR_CLUSTERS 2 27#define EXYNOS5420_NR_CLUSTERS 2
28#define MCPM_BOOT_ADDR_OFFSET 0x1c
29 28
30/* 29/*
31 * The common v7_exit_coherency_flush API could not be used because of the 30 * The common v7_exit_coherency_flush API could not be used because of the
@@ -343,11 +342,13 @@ static int __init exynos_mcpm_init(void)
343 pr_info("Exynos MCPM support installed\n"); 342 pr_info("Exynos MCPM support installed\n");
344 343
345 /* 344 /*
346 * Future entries into the kernel can now go 345 * U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
347 * through the cluster entry vectors. 346 * as part of secondary_cpu_start(). Let's redirect it to the
347 * mcpm_entry_point().
348 */ 348 */
349 __raw_writel(virt_to_phys(mcpm_entry_point), 349 __raw_writel(0xe59f0000, ns_sram_base_addr); /* ldr r0, [pc, #0] */
350 ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET); 350 __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx r0 */
351 __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
351 352
352 iounmap(ns_sram_base_addr); 353 iounmap(ns_sram_base_addr);
353 354
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 87c0d34c7fba..202ca73e49c4 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -300,7 +300,7 @@ static int exynos_pm_suspend(void)
300 tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0); 300 tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
301 __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION); 301 __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
302 302
303 if (!soc_is_exynos5250()) 303 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
304 exynos_cpu_save_register(); 304 exynos_cpu_save_register();
305 305
306 return 0; 306 return 0;
@@ -334,7 +334,7 @@ static void exynos_pm_resume(void)
334 if (exynos_pm_central_resume()) 334 if (exynos_pm_central_resume())
335 goto early_wakeup; 335 goto early_wakeup;
336 336
337 if (!soc_is_exynos5250()) 337 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
338 exynos_cpu_restore_register(); 338 exynos_cpu_restore_register();
339 339
340 /* For release retention */ 340 /* For release retention */
@@ -353,7 +353,7 @@ static void exynos_pm_resume(void)
353 353
354 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 354 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
355 355
356 if (!soc_is_exynos5250()) 356 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
357 scu_enable(S5P_VA_SCU); 357 scu_enable(S5P_VA_SCU);
358 358
359early_wakeup: 359early_wakeup:
@@ -440,15 +440,18 @@ static int exynos_cpu_pm_notifier(struct notifier_block *self,
440 case CPU_PM_ENTER: 440 case CPU_PM_ENTER:
441 if (cpu == 0) { 441 if (cpu == 0) {
442 exynos_pm_central_suspend(); 442 exynos_pm_central_suspend();
443 exynos_cpu_save_register(); 443 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
444 exynos_cpu_save_register();
444 } 445 }
445 break; 446 break;
446 447
447 case CPU_PM_EXIT: 448 case CPU_PM_EXIT:
448 if (cpu == 0) { 449 if (cpu == 0) {
449 if (!soc_is_exynos5250()) 450 if (read_cpuid_part_number() ==
451 ARM_CPU_PART_CORTEX_A9) {
450 scu_enable(S5P_VA_SCU); 452 scu_enable(S5P_VA_SCU);
451 exynos_cpu_restore_register(); 453 exynos_cpu_restore_register();
454 }
452 exynos_pm_central_resume(); 455 exynos_pm_central_resume();
453 } 456 }
454 break; 457 break;
diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index 21cf06cebade..5408ca70c8d6 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -312,6 +312,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
312 clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2); 312 clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2);
313 clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4); 313 clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4);
314 clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6); 314 clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6);
315 clks[IMX6SL_CLK_ENET] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
315 clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12); 316 clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12);
316 clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14); 317 clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14);
317 clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16); 318 clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16);
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index dd0cc677d596..660ca6feff40 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -480,25 +480,18 @@ static const struct of_device_id ebi_match[] = {
480static void __init ap_init_of(void) 480static void __init ap_init_of(void)
481{ 481{
482 unsigned long sc_dec; 482 unsigned long sc_dec;
483 struct device_node *root;
484 struct device_node *syscon; 483 struct device_node *syscon;
485 struct device_node *ebi; 484 struct device_node *ebi;
486 struct device *parent; 485 struct device *parent;
487 struct soc_device *soc_dev; 486 struct soc_device *soc_dev;
488 struct soc_device_attribute *soc_dev_attr; 487 struct soc_device_attribute *soc_dev_attr;
489 u32 ap_sc_id; 488 u32 ap_sc_id;
490 int err;
491 int i; 489 int i;
492 490
493 /* Here we create an SoC device for the root node */ 491 syscon = of_find_matching_node(NULL, ap_syscon_match);
494 root = of_find_node_by_path("/");
495 if (!root)
496 return;
497
498 syscon = of_find_matching_node(root, ap_syscon_match);
499 if (!syscon) 492 if (!syscon)
500 return; 493 return;
501 ebi = of_find_matching_node(root, ebi_match); 494 ebi = of_find_matching_node(NULL, ebi_match);
502 if (!ebi) 495 if (!ebi)
503 return; 496 return;
504 497
@@ -509,19 +502,17 @@ static void __init ap_init_of(void)
509 if (!ebi_base) 502 if (!ebi_base)
510 return; 503 return;
511 504
505 of_platform_populate(NULL, of_default_bus_match_table,
506 ap_auxdata_lookup, NULL);
507
512 ap_sc_id = readl(ap_syscon_base); 508 ap_sc_id = readl(ap_syscon_base);
513 509
514 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 510 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
515 if (!soc_dev_attr) 511 if (!soc_dev_attr)
516 return; 512 return;
517 513
518 err = of_property_read_string(root, "compatible", 514 soc_dev_attr->soc_id = "XVC";
519 &soc_dev_attr->soc_id); 515 soc_dev_attr->machine = "Integrator/AP";
520 if (err)
521 return;
522 err = of_property_read_string(root, "model", &soc_dev_attr->machine);
523 if (err)
524 return;
525 soc_dev_attr->family = "Integrator"; 516 soc_dev_attr->family = "Integrator";
526 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c", 517 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
527 'A' + (ap_sc_id & 0x0f)); 518 'A' + (ap_sc_id & 0x0f));
@@ -536,9 +527,6 @@ static void __init ap_init_of(void)
536 parent = soc_device_to_device(soc_dev); 527 parent = soc_device_to_device(soc_dev);
537 integrator_init_sysfs(parent, ap_sc_id); 528 integrator_init_sysfs(parent, ap_sc_id);
538 529
539 of_platform_populate(root, of_default_bus_match_table,
540 ap_auxdata_lookup, parent);
541
542 sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET); 530 sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
543 for (i = 0; i < 4; i++) { 531 for (i = 0; i < 4; i++) {
544 struct lm_device *lmdev; 532 struct lm_device *lmdev;
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index a938242b0c95..0e57f8f820a5 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -279,20 +279,13 @@ static const struct of_device_id intcp_syscon_match[] = {
279 279
280static void __init intcp_init_of(void) 280static void __init intcp_init_of(void)
281{ 281{
282 struct device_node *root;
283 struct device_node *cpcon; 282 struct device_node *cpcon;
284 struct device *parent; 283 struct device *parent;
285 struct soc_device *soc_dev; 284 struct soc_device *soc_dev;
286 struct soc_device_attribute *soc_dev_attr; 285 struct soc_device_attribute *soc_dev_attr;
287 u32 intcp_sc_id; 286 u32 intcp_sc_id;
288 int err;
289 287
290 /* Here we create an SoC device for the root node */ 288 cpcon = of_find_matching_node(NULL, intcp_syscon_match);
291 root = of_find_node_by_path("/");
292 if (!root)
293 return;
294
295 cpcon = of_find_matching_node(root, intcp_syscon_match);
296 if (!cpcon) 289 if (!cpcon)
297 return; 290 return;
298 291
@@ -300,19 +293,17 @@ static void __init intcp_init_of(void)
300 if (!intcp_con_base) 293 if (!intcp_con_base)
301 return; 294 return;
302 295
296 of_platform_populate(NULL, of_default_bus_match_table,
297 intcp_auxdata_lookup, NULL);
298
303 intcp_sc_id = readl(intcp_con_base); 299 intcp_sc_id = readl(intcp_con_base);
304 300
305 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 301 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
306 if (!soc_dev_attr) 302 if (!soc_dev_attr)
307 return; 303 return;
308 304
309 err = of_property_read_string(root, "compatible", 305 soc_dev_attr->soc_id = "XCV";
310 &soc_dev_attr->soc_id); 306 soc_dev_attr->machine = "Integrator/CP";
311 if (err)
312 return;
313 err = of_property_read_string(root, "model", &soc_dev_attr->machine);
314 if (err)
315 return;
316 soc_dev_attr->family = "Integrator"; 307 soc_dev_attr->family = "Integrator";
317 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c", 308 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
318 'A' + (intcp_sc_id & 0x0f)); 309 'A' + (intcp_sc_id & 0x0f));
@@ -326,8 +317,6 @@ static void __init intcp_init_of(void)
326 317
327 parent = soc_device_to_device(soc_dev); 318 parent = soc_device_to_device(soc_dev);
328 integrator_init_sysfs(parent, intcp_sc_id); 319 integrator_init_sysfs(parent, intcp_sc_id);
329 of_platform_populate(root, of_default_bus_match_table,
330 intcp_auxdata_lookup, parent);
331} 320}
332 321
333static const char * intcp_dt_board_compat[] = { 322static const char * intcp_dt_board_compat[] = {
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 4a7c250c9a30..b9bc599a5fd0 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -10,6 +10,7 @@ menuconfig ARCH_MVEBU
10 select ZONE_DMA if ARM_LPAE 10 select ZONE_DMA if ARM_LPAE
11 select ARCH_REQUIRE_GPIOLIB 11 select ARCH_REQUIRE_GPIOLIB
12 select PCI_QUIRKS if PCI 12 select PCI_QUIRKS if PCI
13 select OF_ADDRESS_PCI
13 14
14if ARCH_MVEBU 15if ARCH_MVEBU
15 16
@@ -17,6 +18,7 @@ config MACH_MVEBU_V7
17 bool 18 bool
18 select ARMADA_370_XP_TIMER 19 select ARMADA_370_XP_TIMER
19 select CACHE_L2X0 20 select CACHE_L2X0
21 select ARM_CPU_SUSPEND
20 22
21config MACH_ARMADA_370 23config MACH_ARMADA_370
22 bool "Marvell Armada 370 boards" if ARCH_MULTI_V7 24 bool "Marvell Armada 370 boards" if ARCH_MULTI_V7
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 8d6420013a04..f71d55f5e6e5 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -153,13 +153,10 @@ static void exynos4_mct_write(unsigned int value, unsigned long offset)
153} 153}
154 154
155/* Clocksource handling */ 155/* Clocksource handling */
156static void exynos4_mct_frc_start(u32 hi, u32 lo) 156static void exynos4_mct_frc_start(void)
157{ 157{
158 u32 reg; 158 u32 reg;
159 159
160 exynos4_mct_write(lo, EXYNOS4_MCT_G_CNT_L);
161 exynos4_mct_write(hi, EXYNOS4_MCT_G_CNT_U);
162
163 reg = __raw_readl(reg_base + EXYNOS4_MCT_G_TCON); 160 reg = __raw_readl(reg_base + EXYNOS4_MCT_G_TCON);
164 reg |= MCT_G_TCON_START; 161 reg |= MCT_G_TCON_START;
165 exynos4_mct_write(reg, EXYNOS4_MCT_G_TCON); 162 exynos4_mct_write(reg, EXYNOS4_MCT_G_TCON);
@@ -181,7 +178,7 @@ static cycle_t exynos4_frc_read(struct clocksource *cs)
181 178
182static void exynos4_frc_resume(struct clocksource *cs) 179static void exynos4_frc_resume(struct clocksource *cs)
183{ 180{
184 exynos4_mct_frc_start(0, 0); 181 exynos4_mct_frc_start();
185} 182}
186 183
187struct clocksource mct_frc = { 184struct clocksource mct_frc = {
@@ -200,7 +197,7 @@ static u64 notrace exynos4_read_sched_clock(void)
200 197
201static void __init exynos4_clocksource_init(void) 198static void __init exynos4_clocksource_init(void)
202{ 199{
203 exynos4_mct_frc_start(0, 0); 200 exynos4_mct_frc_start();
204 201
205 if (clocksource_register_hz(&mct_frc, clk_rate)) 202 if (clocksource_register_hz(&mct_frc, clk_rate))
206 panic("%s: can't register clocksource\n", mct_frc.name); 203 panic("%s: can't register clocksource\n", mct_frc.name);
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index a43d0c467274..ee9402324a23 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -54,7 +54,7 @@ config AD525X_DPOT_SPI
54config ATMEL_PWM 54config ATMEL_PWM
55 tristate "Atmel AT32/AT91 PWM support" 55 tristate "Atmel AT32/AT91 PWM support"
56 depends on HAVE_CLK 56 depends on HAVE_CLK
57 depends on AVR32 || AT91SAM9263 || AT91SAM9RL || AT91SAM9G45 57 depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
58 help 58 help
59 This option enables device driver support for the PWM channels 59 This option enables device driver support for the PWM channels
60 on certain Atmel processors. Pulse Width Modulation is used for 60 on certain Atmel processors. Pulse Width Modulation is used for
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index c41aca4dfc43..72000a6d5af0 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -991,7 +991,7 @@ static const struct of_device_id msm_uartdm_table[] = {
991 { } 991 { }
992}; 992};
993 993
994static int __init msm_serial_probe(struct platform_device *pdev) 994static int msm_serial_probe(struct platform_device *pdev)
995{ 995{
996 struct msm_port *msm_port; 996 struct msm_port *msm_port;
997 struct resource *resource; 997 struct resource *resource;
diff --git a/include/dt-bindings/clock/imx6sl-clock.h b/include/dt-bindings/clock/imx6sl-clock.h
index 7cf5c9969336..b91dd462ba85 100644
--- a/include/dt-bindings/clock/imx6sl-clock.h
+++ b/include/dt-bindings/clock/imx6sl-clock.h
@@ -145,6 +145,7 @@
145#define IMX6SL_CLK_USDHC4 132 145#define IMX6SL_CLK_USDHC4 132
146#define IMX6SL_CLK_PLL4_AUDIO_DIV 133 146#define IMX6SL_CLK_PLL4_AUDIO_DIV 133
147#define IMX6SL_CLK_SPBA 134 147#define IMX6SL_CLK_SPBA 134
148#define IMX6SL_CLK_END 135 148#define IMX6SL_CLK_ENET 135
149#define IMX6SL_CLK_END 136
149 150
150#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */ 151#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */
diff --git a/include/dt-bindings/clock/stih415-clks.h b/include/dt-bindings/clock/stih415-clks.h
index 0d2c7397e028..d80caa68aebd 100644
--- a/include/dt-bindings/clock/stih415-clks.h
+++ b/include/dt-bindings/clock/stih415-clks.h
@@ -10,6 +10,7 @@
10#define CLK_ETH1_PHY 4 10#define CLK_ETH1_PHY 4
11 11
12/* CLOCKGEN A1 */ 12/* CLOCKGEN A1 */
13#define CLK_ICN_IF_2 0
13#define CLK_GMAC0_PHY 3 14#define CLK_GMAC0_PHY 3
14 15
15#endif 16#endif
diff --git a/include/dt-bindings/clock/stih416-clks.h b/include/dt-bindings/clock/stih416-clks.h
index 552c779eb6af..f9bdbd13568d 100644
--- a/include/dt-bindings/clock/stih416-clks.h
+++ b/include/dt-bindings/clock/stih416-clks.h
@@ -10,6 +10,7 @@
10#define CLK_ETH1_PHY 4 10#define CLK_ETH1_PHY 4
11 11
12/* CLOCKGEN A1 */ 12/* CLOCKGEN A1 */
13#define CLK_ICN_IF_2 0
13#define CLK_GMAC0_PHY 3 14#define CLK_GMAC0_PHY 3
14 15
15#endif 16#endif