diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-13 10:59:34 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-13 10:59:34 -0400 |
commit | 299cc3c166f7a11f6cc3b66aafbaf75c2aa0e0e2 (patch) | |
tree | 79418db8c437a57d771ae12e3e4cc052fa827c5e | |
parent | 2f4ba45a75d6383b4a1201169a808ffea416ffa0 (diff) |
Fix up more strange byte writes to the PCI_ROM_ADDRESS config word
It's a dword thing, and the value we write is a dword. Doing a byte
write to it is nonsensical, and writes only the low byte, which only
contains the enable bit. So we enable a nonsensical address (usually
zero), which causes the controller no end of problems.
Trivial fix, but nasty to find.
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r-- | drivers/ide/pci/cmd64x.c | 2 | ||||
-rw-r--r-- | drivers/ide/pci/hpt34x.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index 3de9ab897e42..3d9c7afc8695 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c | |||
@@ -608,7 +608,7 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha | |||
608 | 608 | ||
609 | #ifdef __i386__ | 609 | #ifdef __i386__ |
610 | if (dev->resource[PCI_ROM_RESOURCE].start) { | 610 | if (dev->resource[PCI_ROM_RESOURCE].start) { |
611 | pci_write_config_byte(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); | 611 | pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); |
612 | printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start); | 612 | printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start); |
613 | } | 613 | } |
614 | #endif | 614 | #endif |
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c index bbde46279984..be334da7a754 100644 --- a/drivers/ide/pci/hpt34x.c +++ b/drivers/ide/pci/hpt34x.c | |||
@@ -173,7 +173,7 @@ static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const cha | |||
173 | 173 | ||
174 | if (cmd & PCI_COMMAND_MEMORY) { | 174 | if (cmd & PCI_COMMAND_MEMORY) { |
175 | if (pci_resource_start(dev, PCI_ROM_RESOURCE)) { | 175 | if (pci_resource_start(dev, PCI_ROM_RESOURCE)) { |
176 | pci_write_config_byte(dev, PCI_ROM_ADDRESS, | 176 | pci_write_config_dword(dev, PCI_ROM_ADDRESS, |
177 | dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); | 177 | dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); |
178 | printk(KERN_INFO "HPT345: ROM enabled at 0x%08lx\n", | 178 | printk(KERN_INFO "HPT345: ROM enabled at 0x%08lx\n", |
179 | dev->resource[PCI_ROM_RESOURCE].start); | 179 | dev->resource[PCI_ROM_RESOURCE].start); |