diff options
author | Robert Jarzmik <robert.jarzmik@free.fr> | 2015-04-24 17:22:35 -0400 |
---|---|---|
committer | Robert Jarzmik <robert.jarzmik@free.fr> | 2015-04-30 16:52:31 -0400 |
commit | 277688639f98a9e34a6f109f9cd6129f92e718c1 (patch) | |
tree | b00673f27a3ae16ec001419f7fe71144838b3b48 | |
parent | aa8d6b73ea33c2167c543663ab66039ec94d58f1 (diff) |
ARM: pxa: mainstone: use new pxa_cplds driver
As the interrupt handling was transferred to the pxa_cplds driver,
make the switch in mainstone platform code.
Fixes: 157d2644cb0c ("ARM: pxa: change gpio to platform device")
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mainstone.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-pxa/mainstone.c | 115 |
2 files changed, 31 insertions, 90 deletions
diff --git a/arch/arm/mach-pxa/include/mach/mainstone.h b/arch/arm/mach-pxa/include/mach/mainstone.h index 1bfc4e822a41..e82a7d31104e 100644 --- a/arch/arm/mach-pxa/include/mach/mainstone.h +++ b/arch/arm/mach-pxa/include/mach/mainstone.h | |||
@@ -120,7 +120,9 @@ | |||
120 | #define MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */ | 120 | #define MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */ |
121 | 121 | ||
122 | /* board specific IRQs */ | 122 | /* board specific IRQs */ |
123 | #define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x)) | 123 | #define MAINSTONE_NR_IRQS IRQ_BOARD_START |
124 | |||
125 | #define MAINSTONE_IRQ(x) (MAINSTONE_NR_IRQS + (x)) | ||
124 | #define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) | 126 | #define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) |
125 | #define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) | 127 | #define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) |
126 | #define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) | 128 | #define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) |
@@ -136,6 +138,4 @@ | |||
136 | #define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) | 138 | #define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) |
137 | #define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) | 139 | #define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) |
138 | 140 | ||
139 | #define MAINSTONE_NR_IRQS (IRQ_BOARD_START + 16) | ||
140 | |||
141 | #endif | 141 | #endif |
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 78b84c0dfc79..2c0658cf6be2 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
@@ -13,6 +13,7 @@ | |||
13 | * published by the Free Software Foundation. | 13 | * published by the Free Software Foundation. |
14 | */ | 14 | */ |
15 | #include <linux/gpio.h> | 15 | #include <linux/gpio.h> |
16 | #include <linux/gpio/machine.h> | ||
16 | #include <linux/init.h> | 17 | #include <linux/init.h> |
17 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
18 | #include <linux/syscore_ops.h> | 19 | #include <linux/syscore_ops.h> |
@@ -122,92 +123,6 @@ static unsigned long mainstone_pin_config[] = { | |||
122 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, | 123 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, |
123 | }; | 124 | }; |
124 | 125 | ||
125 | static unsigned long mainstone_irq_enabled; | ||
126 | |||
127 | static void mainstone_mask_irq(struct irq_data *d) | ||
128 | { | ||
129 | int mainstone_irq = (d->irq - MAINSTONE_IRQ(0)); | ||
130 | MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); | ||
131 | } | ||
132 | |||
133 | static void mainstone_unmask_irq(struct irq_data *d) | ||
134 | { | ||
135 | int mainstone_irq = (d->irq - MAINSTONE_IRQ(0)); | ||
136 | /* the irq can be acknowledged only if deasserted, so it's done here */ | ||
137 | MST_INTSETCLR &= ~(1 << mainstone_irq); | ||
138 | MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); | ||
139 | } | ||
140 | |||
141 | static struct irq_chip mainstone_irq_chip = { | ||
142 | .name = "FPGA", | ||
143 | .irq_ack = mainstone_mask_irq, | ||
144 | .irq_mask = mainstone_mask_irq, | ||
145 | .irq_unmask = mainstone_unmask_irq, | ||
146 | }; | ||
147 | |||
148 | static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) | ||
149 | { | ||
150 | unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; | ||
151 | do { | ||
152 | /* clear useless edge notification */ | ||
153 | desc->irq_data.chip->irq_ack(&desc->irq_data); | ||
154 | if (likely(pending)) { | ||
155 | irq = MAINSTONE_IRQ(0) + __ffs(pending); | ||
156 | generic_handle_irq(irq); | ||
157 | } | ||
158 | pending = MST_INTSETCLR & mainstone_irq_enabled; | ||
159 | } while (pending); | ||
160 | } | ||
161 | |||
162 | static void __init mainstone_init_irq(void) | ||
163 | { | ||
164 | int irq; | ||
165 | |||
166 | pxa27x_init_irq(); | ||
167 | |||
168 | /* setup extra Mainstone irqs */ | ||
169 | for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { | ||
170 | irq_set_chip_and_handler(irq, &mainstone_irq_chip, | ||
171 | handle_level_irq); | ||
172 | if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) | ||
173 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); | ||
174 | else | ||
175 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
176 | } | ||
177 | set_irq_flags(MAINSTONE_IRQ(8), 0); | ||
178 | set_irq_flags(MAINSTONE_IRQ(12), 0); | ||
179 | |||
180 | MST_INTMSKENA = 0; | ||
181 | MST_INTSETCLR = 0; | ||
182 | |||
183 | irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler); | ||
184 | irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING); | ||
185 | } | ||
186 | |||
187 | #ifdef CONFIG_PM | ||
188 | |||
189 | static void mainstone_irq_resume(void) | ||
190 | { | ||
191 | MST_INTMSKENA = mainstone_irq_enabled; | ||
192 | } | ||
193 | |||
194 | static struct syscore_ops mainstone_irq_syscore_ops = { | ||
195 | .resume = mainstone_irq_resume, | ||
196 | }; | ||
197 | |||
198 | static int __init mainstone_irq_device_init(void) | ||
199 | { | ||
200 | if (machine_is_mainstone()) | ||
201 | register_syscore_ops(&mainstone_irq_syscore_ops); | ||
202 | |||
203 | return 0; | ||
204 | } | ||
205 | |||
206 | device_initcall(mainstone_irq_device_init); | ||
207 | |||
208 | #endif | ||
209 | |||
210 | |||
211 | static struct resource smc91x_resources[] = { | 126 | static struct resource smc91x_resources[] = { |
212 | [0] = { | 127 | [0] = { |
213 | .start = (MST_ETH_PHYS + 0x300), | 128 | .start = (MST_ETH_PHYS + 0x300), |
@@ -487,11 +402,37 @@ static struct platform_device mst_gpio_keys_device = { | |||
487 | }, | 402 | }, |
488 | }; | 403 | }; |
489 | 404 | ||
405 | static struct resource mst_cplds_resources[] = { | ||
406 | [0] = { | ||
407 | .start = MST_FPGA_PHYS + 0xc0, | ||
408 | .end = MST_FPGA_PHYS + 0xe0 - 1, | ||
409 | .flags = IORESOURCE_MEM, | ||
410 | }, | ||
411 | [1] = { | ||
412 | .start = PXA_GPIO_TO_IRQ(0), | ||
413 | .end = PXA_GPIO_TO_IRQ(0), | ||
414 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, | ||
415 | }, | ||
416 | [2] = { | ||
417 | .start = MAINSTONE_IRQ(0), | ||
418 | .end = MAINSTONE_IRQ(15), | ||
419 | .flags = IORESOURCE_IRQ, | ||
420 | }, | ||
421 | }; | ||
422 | |||
423 | static struct platform_device mst_cplds_device = { | ||
424 | .name = "pxa_cplds_irqs", | ||
425 | .id = -1, | ||
426 | .resource = &mst_cplds_resources[0], | ||
427 | .num_resources = 3, | ||
428 | }; | ||
429 | |||
490 | static struct platform_device *platform_devices[] __initdata = { | 430 | static struct platform_device *platform_devices[] __initdata = { |
491 | &smc91x_device, | 431 | &smc91x_device, |
492 | &mst_flash_device[0], | 432 | &mst_flash_device[0], |
493 | &mst_flash_device[1], | 433 | &mst_flash_device[1], |
494 | &mst_gpio_keys_device, | 434 | &mst_gpio_keys_device, |
435 | &mst_cplds_device, | ||
495 | }; | 436 | }; |
496 | 437 | ||
497 | static struct pxaohci_platform_data mainstone_ohci_platform_data = { | 438 | static struct pxaohci_platform_data mainstone_ohci_platform_data = { |
@@ -718,7 +659,7 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") | |||
718 | .atag_offset = 0x100, /* BLOB boot parameter setting */ | 659 | .atag_offset = 0x100, /* BLOB boot parameter setting */ |
719 | .map_io = mainstone_map_io, | 660 | .map_io = mainstone_map_io, |
720 | .nr_irqs = MAINSTONE_NR_IRQS, | 661 | .nr_irqs = MAINSTONE_NR_IRQS, |
721 | .init_irq = mainstone_init_irq, | 662 | .init_irq = pxa27x_init_irq, |
722 | .handle_irq = pxa27x_handle_irq, | 663 | .handle_irq = pxa27x_handle_irq, |
723 | .init_time = pxa_timer_init, | 664 | .init_time = pxa_timer_init, |
724 | .init_machine = mainstone_init, | 665 | .init_machine = mainstone_init, |