diff options
author | Borislav Petkov <borislav.petkov@amd.com> | 2011-08-10 08:43:30 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-11-01 08:01:50 -0400 |
commit | 168eb34dedf2f9456cc26f513d27de65c64fc608 (patch) | |
tree | dc4de94b3f66d30beaebd66168e058b83a7827f4 | |
parent | 4055759145b421537207ed0d034041f1774ab41d (diff) |
EDAC: Correct Kconfig dependencies
Both AMD and Intel i7 EDAC drivers use MCE features and are thus
dependent of this functionality present in the kernel. Express this in
Kconfig so that randconfig builds don't break.
Reported-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Acked-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r-- | drivers/edac/Kconfig | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index f888fb599184..d057d6c40208 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig | |||
@@ -41,7 +41,7 @@ config EDAC_DEBUG | |||
41 | 41 | ||
42 | config EDAC_DECODE_MCE | 42 | config EDAC_DECODE_MCE |
43 | tristate "Decode MCEs in human-readable form (only on AMD for now)" | 43 | tristate "Decode MCEs in human-readable form (only on AMD for now)" |
44 | depends on CPU_SUP_AMD && X86_MCE | 44 | depends on CPU_SUP_AMD && X86_MCE_AMD |
45 | default y | 45 | default y |
46 | ---help--- | 46 | ---help--- |
47 | Enable this option if you want to decode Machine Check Exceptions | 47 | Enable this option if you want to decode Machine Check Exceptions |
@@ -170,8 +170,7 @@ config EDAC_I5400 | |||
170 | 170 | ||
171 | config EDAC_I7CORE | 171 | config EDAC_I7CORE |
172 | tristate "Intel i7 Core (Nehalem) processors" | 172 | tristate "Intel i7 Core (Nehalem) processors" |
173 | depends on EDAC_MM_EDAC && PCI && X86 | 173 | depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL |
174 | select EDAC_MCE | ||
175 | help | 174 | help |
176 | Support for error detection and correction the Intel | 175 | Support for error detection and correction the Intel |
177 | i7 Core (Nehalem) Integrated Memory Controller that exists on | 176 | i7 Core (Nehalem) Integrated Memory Controller that exists on |