diff options
| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2012-09-05 07:21:22 -0400 |
|---|---|---|
| committer | Benoit Cousson <b-cousson@ti.com> | 2012-09-07 13:22:51 -0400 |
| commit | 0be484bf4d0e9a78520b9e576de03de89e9d5882 (patch) | |
| tree | df79f7af54b345e057f5499676ce65fb57177669 | |
| parent | 40c9e5cacfc186b537b402a59319cd6a88ce338b (diff) | |
ARM: dts: omap3: Add McBSP entries
Create the needed sections to be able to probe McBSP ports via DT.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
| -rw-r--r-- | arch/arm/boot/dts/omap3.dtsi | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 810947198208..f024bb3034a6 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi | |||
| @@ -220,5 +220,74 @@ | |||
| 220 | compatible = "ti,omap3-wdt"; | 220 | compatible = "ti,omap3-wdt"; |
| 221 | ti,hwmods = "wd_timer2"; | 221 | ti,hwmods = "wd_timer2"; |
| 222 | }; | 222 | }; |
| 223 | |||
| 224 | mcbsp1: mcbsp@48074000 { | ||
| 225 | compatible = "ti,omap3-mcbsp"; | ||
| 226 | reg = <0x48074000 0xff>; | ||
| 227 | reg-names = "mpu"; | ||
| 228 | interrupts = <16>, /* OCP compliant interrupt */ | ||
| 229 | <59>, /* TX interrupt */ | ||
| 230 | <60>; /* RX interrupt */ | ||
| 231 | interrupt-names = "common", "tx", "rx"; | ||
| 232 | interrupt-parent = <&intc>; | ||
| 233 | ti,buffer-size = <128>; | ||
| 234 | ti,hwmods = "mcbsp1"; | ||
| 235 | }; | ||
| 236 | |||
| 237 | mcbsp2: mcbsp@49022000 { | ||
| 238 | compatible = "ti,omap3-mcbsp"; | ||
| 239 | reg = <0x49022000 0xff>, | ||
| 240 | <0x49028000 0xff>; | ||
| 241 | reg-names = "mpu", "sidetone"; | ||
| 242 | interrupts = <17>, /* OCP compliant interrupt */ | ||
| 243 | <62>, /* TX interrupt */ | ||
| 244 | <63>, /* RX interrupt */ | ||
| 245 | <4>; /* Sidetone */ | ||
| 246 | interrupt-names = "common", "tx", "rx", "sidetone"; | ||
| 247 | interrupt-parent = <&intc>; | ||
| 248 | ti,buffer-size = <1280>; | ||
| 249 | ti,hwmods = "mcbsp2"; | ||
| 250 | }; | ||
| 251 | |||
| 252 | mcbsp3: mcbsp@49024000 { | ||
| 253 | compatible = "ti,omap3-mcbsp"; | ||
| 254 | reg = <0x49024000 0xff>, | ||
| 255 | <0x4902a000 0xff>; | ||
| 256 | reg-names = "mpu", "sidetone"; | ||
| 257 | interrupts = <22>, /* OCP compliant interrupt */ | ||
| 258 | <89>, /* TX interrupt */ | ||
| 259 | <90>, /* RX interrupt */ | ||
| 260 | <5>; /* Sidetone */ | ||
| 261 | interrupt-names = "common", "tx", "rx", "sidetone"; | ||
| 262 | interrupt-parent = <&intc>; | ||
| 263 | ti,buffer-size = <128>; | ||
| 264 | ti,hwmods = "mcbsp3"; | ||
| 265 | }; | ||
| 266 | |||
| 267 | mcbsp4: mcbsp@49026000 { | ||
| 268 | compatible = "ti,omap3-mcbsp"; | ||
| 269 | reg = <0x49026000 0xff>; | ||
| 270 | reg-names = "mpu"; | ||
| 271 | interrupts = <23>, /* OCP compliant interrupt */ | ||
| 272 | <54>, /* TX interrupt */ | ||
| 273 | <55>; /* RX interrupt */ | ||
| 274 | interrupt-names = "common", "tx", "rx"; | ||
| 275 | interrupt-parent = <&intc>; | ||
| 276 | ti,buffer-size = <128>; | ||
| 277 | ti,hwmods = "mcbsp4"; | ||
| 278 | }; | ||
| 279 | |||
| 280 | mcbsp5: mcbsp@48096000 { | ||
| 281 | compatible = "ti,omap3-mcbsp"; | ||
| 282 | reg = <0x48096000 0xff>; | ||
| 283 | reg-names = "mpu"; | ||
| 284 | interrupts = <27>, /* OCP compliant interrupt */ | ||
| 285 | <81>, /* TX interrupt */ | ||
| 286 | <82>; /* RX interrupt */ | ||
| 287 | interrupt-names = "common", "tx", "rx"; | ||
| 288 | interrupt-parent = <&intc>; | ||
| 289 | ti,buffer-size = <128>; | ||
| 290 | ti,hwmods = "mcbsp5"; | ||
| 291 | }; | ||
| 223 | }; | 292 | }; |
| 224 | }; | 293 | }; |