diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-28 13:56:34 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-28 13:56:34 -0400 |
commit | 04830fccdcafa7e0ea913990ae56437253553fef (patch) | |
tree | 16d423628a516f544a0e5bb8fd4f00d88a55395f | |
parent | 571503e10045c89af951962ea0bb783482663aad (diff) | |
parent | 1486a7409b42ec434be310e091ef68660a2f6cd0 (diff) |
Merge branch 'gpio/next' of git://git.secretlab.ca/git/linux-2.6
* 'gpio/next' of git://git.secretlab.ca/git/linux-2.6:
gpio/pch_gpio: Support new device ML7223
gpio: make gpio_{request,free}_array gpio array parameter const
GPIO: OMAP: move to drivers/gpio
GPIO: OMAP: move register offset defines into <plat/gpio.h>
gpio: Convert gpio_is_valid to return bool
gpio: Move the s5pc100 GPIO to drivers/gpio
gpio: Move the s5pv210 GPIO to drivers/gpio
gpio: Move the exynos4 GPIO to drivers/gpio
gpio: Move to Samsung common GPIO library to drivers/gpio
gpio/nomadik: add function to read GPIO pull down status
gpio/nomadik: show all pins in debug
gpio: move Nomadik GPIO driver to drivers/gpio
gpio: move U300 GPIO driver to drivers/gpio
langwell_gpio: add runtime pm support
gpio/pca953x: Add support for pca9574 and pca9575 devices
gpio/cs5535: Show explicit dependency between gpio_cs5535 and mfd_cs5535
27 files changed, 475 insertions, 198 deletions
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile index 683fc387c8af..a9bb94fabaa7 100644 --- a/arch/arm/mach-exynos4/Makefile +++ b/arch/arm/mach-exynos4/Makefile | |||
@@ -13,7 +13,7 @@ obj- := | |||
13 | # Core support for EXYNOS4 system | 13 | # Core support for EXYNOS4 system |
14 | 14 | ||
15 | obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o | 15 | obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o |
16 | obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o gpiolib.o irq-eint.o dma.o | 16 | obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o |
17 | obj-$(CONFIG_PM) += pm.o sleep.o | 17 | obj-$(CONFIG_PM) += pm.o sleep.o |
18 | obj-$(CONFIG_CPU_FREQ) += cpufreq.o | 18 | obj-$(CONFIG_CPU_FREQ) += cpufreq.o |
19 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | 19 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig index 71f3ea623974..3c5e0f522e9c 100644 --- a/arch/arm/mach-nomadik/Kconfig +++ b/arch/arm/mach-nomadik/Kconfig | |||
@@ -6,7 +6,6 @@ config MACH_NOMADIK_8815NHK | |||
6 | bool "ST 8815 Nomadik Hardware Kit (evaluation board)" | 6 | bool "ST 8815 Nomadik Hardware Kit (evaluation board)" |
7 | select NOMADIK_8815 | 7 | select NOMADIK_8815 |
8 | select HAS_MTU | 8 | select HAS_MTU |
9 | select NOMADIK_GPIO | ||
10 | 9 | ||
11 | endmenu | 10 | endmenu |
12 | 11 | ||
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile index eecab57d2e5d..a5e6e608b498 100644 --- a/arch/arm/mach-s5pc100/Makefile +++ b/arch/arm/mach-s5pc100/Makefile | |||
@@ -11,7 +11,7 @@ obj- := | |||
11 | 11 | ||
12 | # Core support for S5PC100 system | 12 | # Core support for S5PC100 system |
13 | 13 | ||
14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o gpiolib.o | 14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o |
15 | obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o | 15 | obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o |
16 | obj-$(CONFIG_CPU_S5PC100) += dma.o | 16 | obj-$(CONFIG_CPU_S5PC100) += dma.o |
17 | 17 | ||
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 11f17907b4e8..50907aca006c 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile | |||
@@ -12,7 +12,7 @@ obj- := | |||
12 | 12 | ||
13 | # Core support for S5PV210 system | 13 | # Core support for S5PV210 system |
14 | 14 | ||
15 | obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o gpiolib.o | 15 | obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o |
16 | obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o | 16 | obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o |
17 | obj-$(CONFIG_S5PV210_PM) += pm.o sleep.o | 17 | obj-$(CONFIG_S5PV210_PM) += pm.o sleep.o |
18 | obj-$(CONFIG_CPU_FREQ) += cpufreq.o | 18 | obj-$(CONFIG_CPU_FREQ) += cpufreq.o |
diff --git a/arch/arm/mach-u300/Makefile b/arch/arm/mach-u300/Makefile index fab46fe9a71f..8fd354aaf0a7 100644 --- a/arch/arm/mach-u300/Makefile +++ b/arch/arm/mach-u300/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for the linux kernel, U300 machine. | 2 | # Makefile for the linux kernel, U300 machine. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := core.o clock.o timer.o gpio.o padmux.o | 5 | obj-y := core.o clock.o timer.o padmux.o |
6 | obj-m := | 6 | obj-m := |
7 | obj-n := | 7 | obj-n := |
8 | obj- := | 8 | obj- := |
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig index 54429d015954..f8b9392ee347 100644 --- a/arch/arm/mach-ux500/Kconfig +++ b/arch/arm/mach-ux500/Kconfig | |||
@@ -5,7 +5,6 @@ config UX500_SOC_COMMON | |||
5 | default y | 5 | default y |
6 | select ARM_GIC | 6 | select ARM_GIC |
7 | select HAS_MTU | 7 | select HAS_MTU |
8 | select NOMADIK_GPIO | ||
9 | select ARM_ERRATA_753970 | 8 | select ARM_ERRATA_753970 |
10 | 9 | ||
11 | menu "Ux500 SoC" | 10 | menu "Ux500 SoC" |
diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig index 18296ee68802..ce659015535e 100644 --- a/arch/arm/plat-nomadik/Kconfig +++ b/arch/arm/plat-nomadik/Kconfig | |||
@@ -21,9 +21,4 @@ config HAS_MTU | |||
21 | to multiple interrupt generating programmable | 21 | to multiple interrupt generating programmable |
22 | 32-bit free running decrementing counters. | 22 | 32-bit free running decrementing counters. |
23 | 23 | ||
24 | config NOMADIK_GPIO | ||
25 | bool | ||
26 | help | ||
27 | Support for the Nomadik GPIO controller. | ||
28 | |||
29 | endif | 24 | endif |
diff --git a/arch/arm/plat-nomadik/Makefile b/arch/arm/plat-nomadik/Makefile index c33547361bd7..37c7cdd0f8f0 100644 --- a/arch/arm/plat-nomadik/Makefile +++ b/arch/arm/plat-nomadik/Makefile | |||
@@ -3,4 +3,3 @@ | |||
3 | # Licensed under GPLv2 | 3 | # Licensed under GPLv2 |
4 | 4 | ||
5 | obj-$(CONFIG_HAS_MTU) += timer.o | 5 | obj-$(CONFIG_HAS_MTU) += timer.o |
6 | obj-$(CONFIG_NOMADIK_GPIO) += gpio.o | ||
diff --git a/arch/arm/plat-nomadik/include/plat/gpio.h b/arch/arm/plat-nomadik/include/plat/gpio.h index 1b9f6f0843d1..ea19a5b2f227 100644 --- a/arch/arm/plat-nomadik/include/plat/gpio.h +++ b/arch/arm/plat-nomadik/include/plat/gpio.h | |||
@@ -78,6 +78,8 @@ extern int nmk_gpio_get_mode(int gpio); | |||
78 | extern void nmk_gpio_wakeups_suspend(void); | 78 | extern void nmk_gpio_wakeups_suspend(void); |
79 | extern void nmk_gpio_wakeups_resume(void); | 79 | extern void nmk_gpio_wakeups_resume(void); |
80 | 80 | ||
81 | extern void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up); | ||
82 | |||
81 | /* | 83 | /* |
82 | * Platform data to register a block: only the initial gpio/irq number. | 84 | * Platform data to register a block: only the initial gpio/irq number. |
83 | */ | 85 | */ |
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index a4a12859fdd5..f0233e6abcdf 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile | |||
@@ -3,7 +3,7 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | # Common support | 5 | # Common support |
6 | obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \ | 6 | obj-y := common.o sram.o clock.o devices.o dma.o mux.o \ |
7 | usb.o fb.o io.o counter_32k.o | 7 | usb.o fb.o io.o counter_32k.o |
8 | obj-m := | 8 | obj-m := |
9 | obj-n := | 9 | obj-n := |
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h index cac2e8ac6968..ec97e00cb581 100644 --- a/arch/arm/plat-omap/include/plat/gpio.h +++ b/arch/arm/plat-omap/include/plat/gpio.h | |||
@@ -52,6 +52,109 @@ | |||
52 | 52 | ||
53 | #define OMAP34XX_NR_GPIOS 6 | 53 | #define OMAP34XX_NR_GPIOS 6 |
54 | 54 | ||
55 | /* | ||
56 | * OMAP1510 GPIO registers | ||
57 | */ | ||
58 | #define OMAP1510_GPIO_DATA_INPUT 0x00 | ||
59 | #define OMAP1510_GPIO_DATA_OUTPUT 0x04 | ||
60 | #define OMAP1510_GPIO_DIR_CONTROL 0x08 | ||
61 | #define OMAP1510_GPIO_INT_CONTROL 0x0c | ||
62 | #define OMAP1510_GPIO_INT_MASK 0x10 | ||
63 | #define OMAP1510_GPIO_INT_STATUS 0x14 | ||
64 | #define OMAP1510_GPIO_PIN_CONTROL 0x18 | ||
65 | |||
66 | #define OMAP1510_IH_GPIO_BASE 64 | ||
67 | |||
68 | /* | ||
69 | * OMAP1610 specific GPIO registers | ||
70 | */ | ||
71 | #define OMAP1610_GPIO_REVISION 0x0000 | ||
72 | #define OMAP1610_GPIO_SYSCONFIG 0x0010 | ||
73 | #define OMAP1610_GPIO_SYSSTATUS 0x0014 | ||
74 | #define OMAP1610_GPIO_IRQSTATUS1 0x0018 | ||
75 | #define OMAP1610_GPIO_IRQENABLE1 0x001c | ||
76 | #define OMAP1610_GPIO_WAKEUPENABLE 0x0028 | ||
77 | #define OMAP1610_GPIO_DATAIN 0x002c | ||
78 | #define OMAP1610_GPIO_DATAOUT 0x0030 | ||
79 | #define OMAP1610_GPIO_DIRECTION 0x0034 | ||
80 | #define OMAP1610_GPIO_EDGE_CTRL1 0x0038 | ||
81 | #define OMAP1610_GPIO_EDGE_CTRL2 0x003c | ||
82 | #define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c | ||
83 | #define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8 | ||
84 | #define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0 | ||
85 | #define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc | ||
86 | #define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8 | ||
87 | #define OMAP1610_GPIO_SET_DATAOUT 0x00f0 | ||
88 | |||
89 | /* | ||
90 | * OMAP7XX specific GPIO registers | ||
91 | */ | ||
92 | #define OMAP7XX_GPIO_DATA_INPUT 0x00 | ||
93 | #define OMAP7XX_GPIO_DATA_OUTPUT 0x04 | ||
94 | #define OMAP7XX_GPIO_DIR_CONTROL 0x08 | ||
95 | #define OMAP7XX_GPIO_INT_CONTROL 0x0c | ||
96 | #define OMAP7XX_GPIO_INT_MASK 0x10 | ||
97 | #define OMAP7XX_GPIO_INT_STATUS 0x14 | ||
98 | |||
99 | /* | ||
100 | * omap2+ specific GPIO registers | ||
101 | */ | ||
102 | #define OMAP24XX_GPIO_REVISION 0x0000 | ||
103 | #define OMAP24XX_GPIO_IRQSTATUS1 0x0018 | ||
104 | #define OMAP24XX_GPIO_IRQSTATUS2 0x0028 | ||
105 | #define OMAP24XX_GPIO_IRQENABLE2 0x002c | ||
106 | #define OMAP24XX_GPIO_IRQENABLE1 0x001c | ||
107 | #define OMAP24XX_GPIO_WAKE_EN 0x0020 | ||
108 | #define OMAP24XX_GPIO_CTRL 0x0030 | ||
109 | #define OMAP24XX_GPIO_OE 0x0034 | ||
110 | #define OMAP24XX_GPIO_DATAIN 0x0038 | ||
111 | #define OMAP24XX_GPIO_DATAOUT 0x003c | ||
112 | #define OMAP24XX_GPIO_LEVELDETECT0 0x0040 | ||
113 | #define OMAP24XX_GPIO_LEVELDETECT1 0x0044 | ||
114 | #define OMAP24XX_GPIO_RISINGDETECT 0x0048 | ||
115 | #define OMAP24XX_GPIO_FALLINGDETECT 0x004c | ||
116 | #define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050 | ||
117 | #define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054 | ||
118 | #define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060 | ||
119 | #define OMAP24XX_GPIO_SETIRQENABLE1 0x0064 | ||
120 | #define OMAP24XX_GPIO_CLEARWKUENA 0x0080 | ||
121 | #define OMAP24XX_GPIO_SETWKUENA 0x0084 | ||
122 | #define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 | ||
123 | #define OMAP24XX_GPIO_SETDATAOUT 0x0094 | ||
124 | |||
125 | #define OMAP4_GPIO_REVISION 0x0000 | ||
126 | #define OMAP4_GPIO_EOI 0x0020 | ||
127 | #define OMAP4_GPIO_IRQSTATUSRAW0 0x0024 | ||
128 | #define OMAP4_GPIO_IRQSTATUSRAW1 0x0028 | ||
129 | #define OMAP4_GPIO_IRQSTATUS0 0x002c | ||
130 | #define OMAP4_GPIO_IRQSTATUS1 0x0030 | ||
131 | #define OMAP4_GPIO_IRQSTATUSSET0 0x0034 | ||
132 | #define OMAP4_GPIO_IRQSTATUSSET1 0x0038 | ||
133 | #define OMAP4_GPIO_IRQSTATUSCLR0 0x003c | ||
134 | #define OMAP4_GPIO_IRQSTATUSCLR1 0x0040 | ||
135 | #define OMAP4_GPIO_IRQWAKEN0 0x0044 | ||
136 | #define OMAP4_GPIO_IRQWAKEN1 0x0048 | ||
137 | #define OMAP4_GPIO_IRQENABLE1 0x011c | ||
138 | #define OMAP4_GPIO_WAKE_EN 0x0120 | ||
139 | #define OMAP4_GPIO_IRQSTATUS2 0x0128 | ||
140 | #define OMAP4_GPIO_IRQENABLE2 0x012c | ||
141 | #define OMAP4_GPIO_CTRL 0x0130 | ||
142 | #define OMAP4_GPIO_OE 0x0134 | ||
143 | #define OMAP4_GPIO_DATAIN 0x0138 | ||
144 | #define OMAP4_GPIO_DATAOUT 0x013c | ||
145 | #define OMAP4_GPIO_LEVELDETECT0 0x0140 | ||
146 | #define OMAP4_GPIO_LEVELDETECT1 0x0144 | ||
147 | #define OMAP4_GPIO_RISINGDETECT 0x0148 | ||
148 | #define OMAP4_GPIO_FALLINGDETECT 0x014c | ||
149 | #define OMAP4_GPIO_DEBOUNCENABLE 0x0150 | ||
150 | #define OMAP4_GPIO_DEBOUNCINGTIME 0x0154 | ||
151 | #define OMAP4_GPIO_CLEARIRQENABLE1 0x0160 | ||
152 | #define OMAP4_GPIO_SETIRQENABLE1 0x0164 | ||
153 | #define OMAP4_GPIO_CLEARWKUENA 0x0180 | ||
154 | #define OMAP4_GPIO_SETWKUENA 0x0184 | ||
155 | #define OMAP4_GPIO_CLEARDATAOUT 0x0190 | ||
156 | #define OMAP4_GPIO_SETDATAOUT 0x0194 | ||
157 | |||
55 | #define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) | 158 | #define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) |
56 | #define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) | 159 | #define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) |
57 | 160 | ||
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index e9de58a2e294..53eb15b0a07d 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile | |||
@@ -19,7 +19,6 @@ obj-y += gpio.o | |||
19 | obj-y += gpio-config.o | 19 | obj-y += gpio-config.o |
20 | obj-y += dev-asocdma.o | 20 | obj-y += dev-asocdma.o |
21 | 21 | ||
22 | obj-$(CONFIG_SAMSUNG_GPIOLIB_4BIT) += gpiolib.o | ||
23 | obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o | 22 | obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o |
24 | 23 | ||
25 | obj-$(CONFIG_SAMSUNG_IRQ_UART) += irq-uart.o | 24 | obj-$(CONFIG_SAMSUNG_IRQ_UART) += irq-uart.o |
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d21364603755..592397629ddc 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -86,6 +86,30 @@ config GPIO_IT8761E | |||
86 | help | 86 | help |
87 | Say yes here to support GPIO functionality of IT8761E super I/O chip. | 87 | Say yes here to support GPIO functionality of IT8761E super I/O chip. |
88 | 88 | ||
89 | config GPIO_EXYNOS4 | ||
90 | bool "Samsung Exynos4 GPIO library support" | ||
91 | default y if CPU_EXYNOS4210 | ||
92 | help | ||
93 | Say yes here to support Samsung Exynos4 series SoCs GPIO library | ||
94 | |||
95 | config GPIO_PLAT_SAMSUNG | ||
96 | bool "Samsung SoCs GPIO library support" | ||
97 | default y if SAMSUNG_GPIOLIB_4BIT | ||
98 | help | ||
99 | Say yes here to support Samsung SoCs GPIO library | ||
100 | |||
101 | config GPIO_S5PC100 | ||
102 | bool "Samsung S5PC100 GPIO library support" | ||
103 | default y if CPU_S5PC100 | ||
104 | help | ||
105 | Say yes here to support Samsung S5PC100 SoCs GPIO library | ||
106 | |||
107 | config GPIO_S5PV210 | ||
108 | bool "Samsung S5PV210/S5PC110 GPIO library support" | ||
109 | default y if CPU_S5PV210 | ||
110 | help | ||
111 | Say yes here to support Samsung S5PV210/S5PC110 SoCs GPIO library | ||
112 | |||
89 | config GPIO_PL061 | 113 | config GPIO_PL061 |
90 | bool "PrimeCell PL061 GPIO support" | 114 | bool "PrimeCell PL061 GPIO support" |
91 | depends on ARM_AMBA | 115 | depends on ARM_AMBA |
@@ -303,7 +327,7 @@ comment "PCI GPIO expanders:" | |||
303 | 327 | ||
304 | config GPIO_CS5535 | 328 | config GPIO_CS5535 |
305 | tristate "AMD CS5535/CS5536 GPIO support" | 329 | tristate "AMD CS5535/CS5536 GPIO support" |
306 | depends on PCI && X86 && !CS5535_GPIO | 330 | depends on PCI && X86 && !CS5535_GPIO && MFD_CS5535 |
307 | help | 331 | help |
308 | The AMD CS5535 and CS5536 southbridges support 28 GPIO pins that | 332 | The AMD CS5535 and CS5536 southbridges support 28 GPIO pins that |
309 | can be used for quite a number of things. The CS5535/6 is found on | 333 | can be used for quite a number of things. The CS5535/6 is found on |
@@ -334,13 +358,19 @@ config GPIO_LANGWELL | |||
334 | Say Y here to support Intel Langwell/Penwell GPIO. | 358 | Say Y here to support Intel Langwell/Penwell GPIO. |
335 | 359 | ||
336 | config GPIO_PCH | 360 | config GPIO_PCH |
337 | tristate "PCH GPIO of Intel Topcliff" | 361 | tristate "Intel EG20T PCH / OKI SEMICONDUCTOR ML7223 IOH GPIO" |
338 | depends on PCI && X86 | 362 | depends on PCI && X86 |
339 | help | 363 | help |
340 | This driver is for PCH(Platform controller Hub) GPIO of Intel Topcliff | 364 | This driver is for PCH(Platform controller Hub) GPIO of Intel Topcliff |
341 | which is an IOH(Input/Output Hub) for x86 embedded processor. | 365 | which is an IOH(Input/Output Hub) for x86 embedded processor. |
342 | This driver can access PCH GPIO device. | 366 | This driver can access PCH GPIO device. |
343 | 367 | ||
368 | This driver also can be used for OKI SEMICONDUCTOR IOH(Input/ | ||
369 | Output Hub), ML7223. | ||
370 | ML7223 IOH is for MP(Media Phone) use. | ||
371 | ML7223 is companion chip for Intel Atom E6xx series. | ||
372 | ML7223 is completely compatible for Intel EG20T PCH. | ||
373 | |||
344 | config GPIO_ML_IOH | 374 | config GPIO_ML_IOH |
345 | tristate "OKI SEMICONDUCTOR ML7213 IOH GPIO support" | 375 | tristate "OKI SEMICONDUCTOR ML7213 IOH GPIO support" |
346 | depends on PCI | 376 | depends on PCI |
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 6a3387acc0e5..b605f8ec6fbe 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile | |||
@@ -8,6 +8,10 @@ obj-$(CONFIG_GPIO_ADP5520) += adp5520-gpio.o | |||
8 | obj-$(CONFIG_GPIO_ADP5588) += adp5588-gpio.o | 8 | obj-$(CONFIG_GPIO_ADP5588) += adp5588-gpio.o |
9 | obj-$(CONFIG_GPIO_BASIC_MMIO_CORE) += basic_mmio_gpio.o | 9 | obj-$(CONFIG_GPIO_BASIC_MMIO_CORE) += basic_mmio_gpio.o |
10 | obj-$(CONFIG_GPIO_BASIC_MMIO) += basic_mmio_gpio.o | 10 | obj-$(CONFIG_GPIO_BASIC_MMIO) += basic_mmio_gpio.o |
11 | obj-$(CONFIG_GPIO_EXYNOS4) += gpio-exynos4.o | ||
12 | obj-$(CONFIG_GPIO_PLAT_SAMSUNG) += gpio-plat-samsung.o | ||
13 | obj-$(CONFIG_GPIO_S5PC100) += gpio-s5pc100.o | ||
14 | obj-$(CONFIG_GPIO_S5PV210) += gpio-s5pv210.o | ||
11 | obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o | 15 | obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o |
12 | obj-$(CONFIG_GPIO_MAX730X) += max730x.o | 16 | obj-$(CONFIG_GPIO_MAX730X) += max730x.o |
13 | obj-$(CONFIG_GPIO_MAX7300) += max7300.o | 17 | obj-$(CONFIG_GPIO_MAX7300) += max7300.o |
@@ -16,6 +20,7 @@ obj-$(CONFIG_GPIO_MAX732X) += max732x.o | |||
16 | obj-$(CONFIG_GPIO_MC33880) += mc33880.o | 20 | obj-$(CONFIG_GPIO_MC33880) += mc33880.o |
17 | obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o | 21 | obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o |
18 | obj-$(CONFIG_GPIO_74X164) += 74x164.o | 22 | obj-$(CONFIG_GPIO_74X164) += 74x164.o |
23 | obj-$(CONFIG_ARCH_OMAP) += gpio-omap.o | ||
19 | obj-$(CONFIG_GPIO_PCA953X) += pca953x.o | 24 | obj-$(CONFIG_GPIO_PCA953X) += pca953x.o |
20 | obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o | 25 | obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o |
21 | obj-$(CONFIG_GPIO_PCH) += pch_gpio.o | 26 | obj-$(CONFIG_GPIO_PCH) += pch_gpio.o |
@@ -34,6 +39,8 @@ obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o | |||
34 | obj-$(CONFIG_GPIO_WM8350) += wm8350-gpiolib.o | 39 | obj-$(CONFIG_GPIO_WM8350) += wm8350-gpiolib.o |
35 | obj-$(CONFIG_GPIO_WM8994) += wm8994-gpio.o | 40 | obj-$(CONFIG_GPIO_WM8994) += wm8994-gpio.o |
36 | obj-$(CONFIG_GPIO_SCH) += sch_gpio.o | 41 | obj-$(CONFIG_GPIO_SCH) += sch_gpio.o |
42 | obj-$(CONFIG_MACH_U300) += gpio-u300.o | ||
43 | obj-$(CONFIG_PLAT_NOMADIK) += gpio-nomadik.o | ||
37 | obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o | 44 | obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o |
38 | obj-$(CONFIG_GPIO_JANZ_TTL) += janz-ttl.o | 45 | obj-$(CONFIG_GPIO_JANZ_TTL) += janz-ttl.o |
39 | obj-$(CONFIG_GPIO_SX150X) += sx150x.o | 46 | obj-$(CONFIG_GPIO_SX150X) += sx150x.o |
diff --git a/arch/arm/mach-exynos4/gpiolib.c b/drivers/gpio/gpio-exynos4.c index d54ca6adb660..d54ca6adb660 100644 --- a/arch/arm/mach-exynos4/gpiolib.c +++ b/drivers/gpio/gpio-exynos4.c | |||
diff --git a/arch/arm/plat-nomadik/gpio.c b/drivers/gpio/gpio-nomadik.c index 307b8131aa8c..4961ef9bc153 100644 --- a/arch/arm/plat-nomadik/gpio.c +++ b/drivers/gpio/gpio-nomadik.c | |||
@@ -57,6 +57,7 @@ struct nmk_gpio_chip { | |||
57 | u32 fwimsc; | 57 | u32 fwimsc; |
58 | u32 slpm; | 58 | u32 slpm; |
59 | u32 enabled; | 59 | u32 enabled; |
60 | u32 pull_up; | ||
60 | }; | 61 | }; |
61 | 62 | ||
62 | static struct nmk_gpio_chip * | 63 | static struct nmk_gpio_chip * |
@@ -103,16 +104,22 @@ static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, | |||
103 | u32 pdis; | 104 | u32 pdis; |
104 | 105 | ||
105 | pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS); | 106 | pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS); |
106 | if (pull == NMK_GPIO_PULL_NONE) | 107 | if (pull == NMK_GPIO_PULL_NONE) { |
107 | pdis |= bit; | 108 | pdis |= bit; |
108 | else | 109 | nmk_chip->pull_up &= ~bit; |
110 | } else { | ||
109 | pdis &= ~bit; | 111 | pdis &= ~bit; |
112 | } | ||
113 | |||
110 | writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS); | 114 | writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS); |
111 | 115 | ||
112 | if (pull == NMK_GPIO_PULL_UP) | 116 | if (pull == NMK_GPIO_PULL_UP) { |
117 | nmk_chip->pull_up |= bit; | ||
113 | writel(bit, nmk_chip->addr + NMK_GPIO_DATS); | 118 | writel(bit, nmk_chip->addr + NMK_GPIO_DATS); |
114 | else if (pull == NMK_GPIO_PULL_DOWN) | 119 | } else if (pull == NMK_GPIO_PULL_DOWN) { |
120 | nmk_chip->pull_up &= ~bit; | ||
115 | writel(bit, nmk_chip->addr + NMK_GPIO_DATC); | 121 | writel(bit, nmk_chip->addr + NMK_GPIO_DATC); |
122 | } | ||
116 | } | 123 | } |
117 | 124 | ||
118 | static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip, | 125 | static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip, |
@@ -811,20 +818,43 @@ static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | |||
811 | bool pull; | 818 | bool pull; |
812 | u32 bit = 1 << i; | 819 | u32 bit = 1 << i; |
813 | 820 | ||
814 | if (!label) | ||
815 | continue; | ||
816 | |||
817 | is_out = readl(nmk_chip->addr + NMK_GPIO_DIR) & bit; | 821 | is_out = readl(nmk_chip->addr + NMK_GPIO_DIR) & bit; |
818 | pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & bit); | 822 | pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & bit); |
819 | mode = nmk_gpio_get_mode(gpio); | 823 | mode = nmk_gpio_get_mode(gpio); |
820 | seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s", | 824 | seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s", |
821 | gpio, label, | 825 | gpio, label ?: "(none)", |
822 | is_out ? "out" : "in ", | 826 | is_out ? "out" : "in ", |
823 | chip->get | 827 | chip->get |
824 | ? (chip->get(chip, i) ? "hi" : "lo") | 828 | ? (chip->get(chip, i) ? "hi" : "lo") |
825 | : "? ", | 829 | : "? ", |
826 | (mode < 0) ? "unknown" : modes[mode], | 830 | (mode < 0) ? "unknown" : modes[mode], |
827 | pull ? "pull" : "none"); | 831 | pull ? "pull" : "none"); |
832 | |||
833 | if (label && !is_out) { | ||
834 | int irq = gpio_to_irq(gpio); | ||
835 | struct irq_desc *desc = irq_to_desc(irq); | ||
836 | |||
837 | /* This races with request_irq(), set_irq_type(), | ||
838 | * and set_irq_wake() ... but those are "rare". | ||
839 | */ | ||
840 | if (irq >= 0 && desc->action) { | ||
841 | char *trigger; | ||
842 | u32 bitmask = nmk_gpio_get_bitmask(gpio); | ||
843 | |||
844 | if (nmk_chip->edge_rising & bitmask) | ||
845 | trigger = "edge-rising"; | ||
846 | else if (nmk_chip->edge_falling & bitmask) | ||
847 | trigger = "edge-falling"; | ||
848 | else | ||
849 | trigger = "edge-undefined"; | ||
850 | |||
851 | seq_printf(s, " irq-%d %s%s", | ||
852 | irq, trigger, | ||
853 | irqd_is_wakeup_set(&desc->irq_data) | ||
854 | ? " wakeup" : ""); | ||
855 | } | ||
856 | } | ||
857 | |||
828 | seq_printf(s, "\n"); | 858 | seq_printf(s, "\n"); |
829 | } | 859 | } |
830 | } | 860 | } |
@@ -898,6 +928,25 @@ void nmk_gpio_wakeups_resume(void) | |||
898 | } | 928 | } |
899 | } | 929 | } |
900 | 930 | ||
931 | /* | ||
932 | * Read the pull up/pull down status. | ||
933 | * A bit set in 'pull_up' means that pull up | ||
934 | * is selected if pull is enabled in PDIS register. | ||
935 | * Note: only pull up/down set via this driver can | ||
936 | * be detected due to HW limitations. | ||
937 | */ | ||
938 | void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up) | ||
939 | { | ||
940 | if (gpio_bank < NUM_BANKS) { | ||
941 | struct nmk_gpio_chip *chip = nmk_gpio_chips[gpio_bank]; | ||
942 | |||
943 | if (!chip) | ||
944 | return; | ||
945 | |||
946 | *pull_up = chip->pull_up; | ||
947 | } | ||
948 | } | ||
949 | |||
901 | static int __devinit nmk_gpio_probe(struct platform_device *dev) | 950 | static int __devinit nmk_gpio_probe(struct platform_device *dev) |
902 | { | 951 | { |
903 | struct nmk_gpio_platform_data *pdata = dev->dev.platform_data; | 952 | struct nmk_gpio_platform_data *pdata = dev->dev.platform_data; |
diff --git a/arch/arm/plat-omap/gpio.c b/drivers/gpio/gpio-omap.c index efb869390199..6c51191da567 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/drivers/gpio/gpio-omap.c | |||
@@ -1,6 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/plat-omap/gpio.c | ||
3 | * | ||
4 | * Support functions for OMAP GPIO | 2 | * Support functions for OMAP GPIO |
5 | * | 3 | * |
6 | * Copyright (C) 2003-2005 Nokia Corporation | 4 | * Copyright (C) 2003-2005 Nokia Corporation |
@@ -30,109 +28,6 @@ | |||
30 | #include <mach/gpio.h> | 28 | #include <mach/gpio.h> |
31 | #include <asm/mach/irq.h> | 29 | #include <asm/mach/irq.h> |
32 | 30 | ||
33 | /* | ||
34 | * OMAP1510 GPIO registers | ||
35 | */ | ||
36 | #define OMAP1510_GPIO_DATA_INPUT 0x00 | ||
37 | #define OMAP1510_GPIO_DATA_OUTPUT 0x04 | ||
38 | #define OMAP1510_GPIO_DIR_CONTROL 0x08 | ||
39 | #define OMAP1510_GPIO_INT_CONTROL 0x0c | ||
40 | #define OMAP1510_GPIO_INT_MASK 0x10 | ||
41 | #define OMAP1510_GPIO_INT_STATUS 0x14 | ||
42 | #define OMAP1510_GPIO_PIN_CONTROL 0x18 | ||
43 | |||
44 | #define OMAP1510_IH_GPIO_BASE 64 | ||
45 | |||
46 | /* | ||
47 | * OMAP1610 specific GPIO registers | ||
48 | */ | ||
49 | #define OMAP1610_GPIO_REVISION 0x0000 | ||
50 | #define OMAP1610_GPIO_SYSCONFIG 0x0010 | ||
51 | #define OMAP1610_GPIO_SYSSTATUS 0x0014 | ||
52 | #define OMAP1610_GPIO_IRQSTATUS1 0x0018 | ||
53 | #define OMAP1610_GPIO_IRQENABLE1 0x001c | ||
54 | #define OMAP1610_GPIO_WAKEUPENABLE 0x0028 | ||
55 | #define OMAP1610_GPIO_DATAIN 0x002c | ||
56 | #define OMAP1610_GPIO_DATAOUT 0x0030 | ||
57 | #define OMAP1610_GPIO_DIRECTION 0x0034 | ||
58 | #define OMAP1610_GPIO_EDGE_CTRL1 0x0038 | ||
59 | #define OMAP1610_GPIO_EDGE_CTRL2 0x003c | ||
60 | #define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c | ||
61 | #define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8 | ||
62 | #define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0 | ||
63 | #define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc | ||
64 | #define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8 | ||
65 | #define OMAP1610_GPIO_SET_DATAOUT 0x00f0 | ||
66 | |||
67 | /* | ||
68 | * OMAP7XX specific GPIO registers | ||
69 | */ | ||
70 | #define OMAP7XX_GPIO_DATA_INPUT 0x00 | ||
71 | #define OMAP7XX_GPIO_DATA_OUTPUT 0x04 | ||
72 | #define OMAP7XX_GPIO_DIR_CONTROL 0x08 | ||
73 | #define OMAP7XX_GPIO_INT_CONTROL 0x0c | ||
74 | #define OMAP7XX_GPIO_INT_MASK 0x10 | ||
75 | #define OMAP7XX_GPIO_INT_STATUS 0x14 | ||
76 | |||
77 | /* | ||
78 | * omap2+ specific GPIO registers | ||
79 | */ | ||
80 | #define OMAP24XX_GPIO_REVISION 0x0000 | ||
81 | #define OMAP24XX_GPIO_IRQSTATUS1 0x0018 | ||
82 | #define OMAP24XX_GPIO_IRQSTATUS2 0x0028 | ||
83 | #define OMAP24XX_GPIO_IRQENABLE2 0x002c | ||
84 | #define OMAP24XX_GPIO_IRQENABLE1 0x001c | ||
85 | #define OMAP24XX_GPIO_WAKE_EN 0x0020 | ||
86 | #define OMAP24XX_GPIO_CTRL 0x0030 | ||
87 | #define OMAP24XX_GPIO_OE 0x0034 | ||
88 | #define OMAP24XX_GPIO_DATAIN 0x0038 | ||
89 | #define OMAP24XX_GPIO_DATAOUT 0x003c | ||
90 | #define OMAP24XX_GPIO_LEVELDETECT0 0x0040 | ||
91 | #define OMAP24XX_GPIO_LEVELDETECT1 0x0044 | ||
92 | #define OMAP24XX_GPIO_RISINGDETECT 0x0048 | ||
93 | #define OMAP24XX_GPIO_FALLINGDETECT 0x004c | ||
94 | #define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050 | ||
95 | #define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054 | ||
96 | #define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060 | ||
97 | #define OMAP24XX_GPIO_SETIRQENABLE1 0x0064 | ||
98 | #define OMAP24XX_GPIO_CLEARWKUENA 0x0080 | ||
99 | #define OMAP24XX_GPIO_SETWKUENA 0x0084 | ||
100 | #define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 | ||
101 | #define OMAP24XX_GPIO_SETDATAOUT 0x0094 | ||
102 | |||
103 | #define OMAP4_GPIO_REVISION 0x0000 | ||
104 | #define OMAP4_GPIO_EOI 0x0020 | ||
105 | #define OMAP4_GPIO_IRQSTATUSRAW0 0x0024 | ||
106 | #define OMAP4_GPIO_IRQSTATUSRAW1 0x0028 | ||
107 | #define OMAP4_GPIO_IRQSTATUS0 0x002c | ||
108 | #define OMAP4_GPIO_IRQSTATUS1 0x0030 | ||
109 | #define OMAP4_GPIO_IRQSTATUSSET0 0x0034 | ||
110 | #define OMAP4_GPIO_IRQSTATUSSET1 0x0038 | ||
111 | #define OMAP4_GPIO_IRQSTATUSCLR0 0x003c | ||
112 | #define OMAP4_GPIO_IRQSTATUSCLR1 0x0040 | ||
113 | #define OMAP4_GPIO_IRQWAKEN0 0x0044 | ||
114 | #define OMAP4_GPIO_IRQWAKEN1 0x0048 | ||
115 | #define OMAP4_GPIO_IRQENABLE1 0x011c | ||
116 | #define OMAP4_GPIO_WAKE_EN 0x0120 | ||
117 | #define OMAP4_GPIO_IRQSTATUS2 0x0128 | ||
118 | #define OMAP4_GPIO_IRQENABLE2 0x012c | ||
119 | #define OMAP4_GPIO_CTRL 0x0130 | ||
120 | #define OMAP4_GPIO_OE 0x0134 | ||
121 | #define OMAP4_GPIO_DATAIN 0x0138 | ||
122 | #define OMAP4_GPIO_DATAOUT 0x013c | ||
123 | #define OMAP4_GPIO_LEVELDETECT0 0x0140 | ||
124 | #define OMAP4_GPIO_LEVELDETECT1 0x0144 | ||
125 | #define OMAP4_GPIO_RISINGDETECT 0x0148 | ||
126 | #define OMAP4_GPIO_FALLINGDETECT 0x014c | ||
127 | #define OMAP4_GPIO_DEBOUNCENABLE 0x0150 | ||
128 | #define OMAP4_GPIO_DEBOUNCINGTIME 0x0154 | ||
129 | #define OMAP4_GPIO_CLEARIRQENABLE1 0x0160 | ||
130 | #define OMAP4_GPIO_SETIRQENABLE1 0x0164 | ||
131 | #define OMAP4_GPIO_CLEARWKUENA 0x0180 | ||
132 | #define OMAP4_GPIO_SETWKUENA 0x0184 | ||
133 | #define OMAP4_GPIO_CLEARDATAOUT 0x0190 | ||
134 | #define OMAP4_GPIO_SETDATAOUT 0x0194 | ||
135 | |||
136 | struct gpio_bank { | 31 | struct gpio_bank { |
137 | unsigned long pbase; | 32 | unsigned long pbase; |
138 | void __iomem *base; | 33 | void __iomem *base; |
diff --git a/arch/arm/plat-samsung/gpiolib.c b/drivers/gpio/gpio-plat-samsung.c index ea37c0461788..ea37c0461788 100644 --- a/arch/arm/plat-samsung/gpiolib.c +++ b/drivers/gpio/gpio-plat-samsung.c | |||
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/drivers/gpio/gpio-s5pc100.c index 2842394b28b5..2842394b28b5 100644 --- a/arch/arm/mach-s5pc100/gpiolib.c +++ b/drivers/gpio/gpio-s5pc100.c | |||
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/drivers/gpio/gpio-s5pv210.c index 1ba20a703e05..1ba20a703e05 100644 --- a/arch/arm/mach-s5pv210/gpiolib.c +++ b/drivers/gpio/gpio-s5pv210.c | |||
diff --git a/arch/arm/mach-u300/gpio.c b/drivers/gpio/gpio-u300.c index d92790140fe5..d92790140fe5 100644 --- a/arch/arm/mach-u300/gpio.c +++ b/drivers/gpio/gpio-u300.c | |||
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 137a8ca67822..a971e3d043ba 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c | |||
@@ -1296,7 +1296,7 @@ EXPORT_SYMBOL_GPL(gpio_request_one); | |||
1296 | * @array: array of the 'struct gpio' | 1296 | * @array: array of the 'struct gpio' |
1297 | * @num: how many GPIOs in the array | 1297 | * @num: how many GPIOs in the array |
1298 | */ | 1298 | */ |
1299 | int gpio_request_array(struct gpio *array, size_t num) | 1299 | int gpio_request_array(const struct gpio *array, size_t num) |
1300 | { | 1300 | { |
1301 | int i, err; | 1301 | int i, err; |
1302 | 1302 | ||
@@ -1319,7 +1319,7 @@ EXPORT_SYMBOL_GPL(gpio_request_array); | |||
1319 | * @array: array of the 'struct gpio' | 1319 | * @array: array of the 'struct gpio' |
1320 | * @num: how many GPIOs in the array | 1320 | * @num: how many GPIOs in the array |
1321 | */ | 1321 | */ |
1322 | void gpio_free_array(struct gpio *array, size_t num) | 1322 | void gpio_free_array(const struct gpio *array, size_t num) |
1323 | { | 1323 | { |
1324 | while (num--) | 1324 | while (num--) |
1325 | gpio_free((array++)->gpio); | 1325 | gpio_free((array++)->gpio); |
diff --git a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c index 1b06f67e1f69..bd6571e0097a 100644 --- a/drivers/gpio/langwell_gpio.c +++ b/drivers/gpio/langwell_gpio.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/io.h> | 33 | #include <linux/io.h> |
34 | #include <linux/gpio.h> | 34 | #include <linux/gpio.h> |
35 | #include <linux/slab.h> | 35 | #include <linux/slab.h> |
36 | #include <linux/pm_runtime.h> | ||
36 | 37 | ||
37 | /* | 38 | /* |
38 | * Langwell chip has 64 pins and thus there are 2 32bit registers to control | 39 | * Langwell chip has 64 pins and thus there are 2 32bit registers to control |
@@ -63,6 +64,7 @@ struct lnw_gpio { | |||
63 | void *reg_base; | 64 | void *reg_base; |
64 | spinlock_t lock; | 65 | spinlock_t lock; |
65 | unsigned irq_base; | 66 | unsigned irq_base; |
67 | struct pci_dev *pdev; | ||
66 | }; | 68 | }; |
67 | 69 | ||
68 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, | 70 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, |
@@ -104,11 +106,18 @@ static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
104 | u32 value; | 106 | u32 value; |
105 | unsigned long flags; | 107 | unsigned long flags; |
106 | 108 | ||
109 | if (lnw->pdev) | ||
110 | pm_runtime_get(&lnw->pdev->dev); | ||
111 | |||
107 | spin_lock_irqsave(&lnw->lock, flags); | 112 | spin_lock_irqsave(&lnw->lock, flags); |
108 | value = readl(gpdr); | 113 | value = readl(gpdr); |
109 | value &= ~BIT(offset % 32); | 114 | value &= ~BIT(offset % 32); |
110 | writel(value, gpdr); | 115 | writel(value, gpdr); |
111 | spin_unlock_irqrestore(&lnw->lock, flags); | 116 | spin_unlock_irqrestore(&lnw->lock, flags); |
117 | |||
118 | if (lnw->pdev) | ||
119 | pm_runtime_put(&lnw->pdev->dev); | ||
120 | |||
112 | return 0; | 121 | return 0; |
113 | } | 122 | } |
114 | 123 | ||
@@ -120,11 +129,19 @@ static int lnw_gpio_direction_output(struct gpio_chip *chip, | |||
120 | unsigned long flags; | 129 | unsigned long flags; |
121 | 130 | ||
122 | lnw_gpio_set(chip, offset, value); | 131 | lnw_gpio_set(chip, offset, value); |
132 | |||
133 | if (lnw->pdev) | ||
134 | pm_runtime_get(&lnw->pdev->dev); | ||
135 | |||
123 | spin_lock_irqsave(&lnw->lock, flags); | 136 | spin_lock_irqsave(&lnw->lock, flags); |
124 | value = readl(gpdr); | 137 | value = readl(gpdr); |
125 | value |= BIT(offset % 32); | 138 | value |= BIT(offset % 32); |
126 | writel(value, gpdr); | 139 | writel(value, gpdr); |
127 | spin_unlock_irqrestore(&lnw->lock, flags); | 140 | spin_unlock_irqrestore(&lnw->lock, flags); |
141 | |||
142 | if (lnw->pdev) | ||
143 | pm_runtime_put(&lnw->pdev->dev); | ||
144 | |||
128 | return 0; | 145 | return 0; |
129 | } | 146 | } |
130 | 147 | ||
@@ -145,6 +162,10 @@ static int lnw_irq_type(struct irq_data *d, unsigned type) | |||
145 | 162 | ||
146 | if (gpio >= lnw->chip.ngpio) | 163 | if (gpio >= lnw->chip.ngpio) |
147 | return -EINVAL; | 164 | return -EINVAL; |
165 | |||
166 | if (lnw->pdev) | ||
167 | pm_runtime_get(&lnw->pdev->dev); | ||
168 | |||
148 | spin_lock_irqsave(&lnw->lock, flags); | 169 | spin_lock_irqsave(&lnw->lock, flags); |
149 | if (type & IRQ_TYPE_EDGE_RISING) | 170 | if (type & IRQ_TYPE_EDGE_RISING) |
150 | value = readl(grer) | BIT(gpio % 32); | 171 | value = readl(grer) | BIT(gpio % 32); |
@@ -159,6 +180,9 @@ static int lnw_irq_type(struct irq_data *d, unsigned type) | |||
159 | writel(value, gfer); | 180 | writel(value, gfer); |
160 | spin_unlock_irqrestore(&lnw->lock, flags); | 181 | spin_unlock_irqrestore(&lnw->lock, flags); |
161 | 182 | ||
183 | if (lnw->pdev) | ||
184 | pm_runtime_put(&lnw->pdev->dev); | ||
185 | |||
162 | return 0; | 186 | return 0; |
163 | } | 187 | } |
164 | 188 | ||
@@ -211,6 +235,39 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc) | |||
211 | chip->irq_eoi(data); | 235 | chip->irq_eoi(data); |
212 | } | 236 | } |
213 | 237 | ||
238 | #ifdef CONFIG_PM | ||
239 | static int lnw_gpio_runtime_resume(struct device *dev) | ||
240 | { | ||
241 | return 0; | ||
242 | } | ||
243 | |||
244 | static int lnw_gpio_runtime_suspend(struct device *dev) | ||
245 | { | ||
246 | return 0; | ||
247 | } | ||
248 | |||
249 | static int lnw_gpio_runtime_idle(struct device *dev) | ||
250 | { | ||
251 | int err = pm_schedule_suspend(dev, 500); | ||
252 | |||
253 | if (!err) | ||
254 | return 0; | ||
255 | |||
256 | return -EBUSY; | ||
257 | } | ||
258 | |||
259 | #else | ||
260 | #define lnw_gpio_runtime_suspend NULL | ||
261 | #define lnw_gpio_runtime_resume NULL | ||
262 | #define lnw_gpio_runtime_idle NULL | ||
263 | #endif | ||
264 | |||
265 | static const struct dev_pm_ops lnw_gpio_pm_ops = { | ||
266 | .runtime_suspend = lnw_gpio_runtime_suspend, | ||
267 | .runtime_resume = lnw_gpio_runtime_resume, | ||
268 | .runtime_idle = lnw_gpio_runtime_idle, | ||
269 | }; | ||
270 | |||
214 | static int __devinit lnw_gpio_probe(struct pci_dev *pdev, | 271 | static int __devinit lnw_gpio_probe(struct pci_dev *pdev, |
215 | const struct pci_device_id *id) | 272 | const struct pci_device_id *id) |
216 | { | 273 | { |
@@ -270,6 +327,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, | |||
270 | lnw->chip.base = gpio_base; | 327 | lnw->chip.base = gpio_base; |
271 | lnw->chip.ngpio = id->driver_data; | 328 | lnw->chip.ngpio = id->driver_data; |
272 | lnw->chip.can_sleep = 0; | 329 | lnw->chip.can_sleep = 0; |
330 | lnw->pdev = pdev; | ||
273 | pci_set_drvdata(pdev, lnw); | 331 | pci_set_drvdata(pdev, lnw); |
274 | retval = gpiochip_add(&lnw->chip); | 332 | retval = gpiochip_add(&lnw->chip); |
275 | if (retval) { | 333 | if (retval) { |
@@ -285,6 +343,10 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, | |||
285 | } | 343 | } |
286 | 344 | ||
287 | spin_lock_init(&lnw->lock); | 345 | spin_lock_init(&lnw->lock); |
346 | |||
347 | pm_runtime_put_noidle(&pdev->dev); | ||
348 | pm_runtime_allow(&pdev->dev); | ||
349 | |||
288 | goto done; | 350 | goto done; |
289 | err5: | 351 | err5: |
290 | kfree(lnw); | 352 | kfree(lnw); |
@@ -302,6 +364,9 @@ static struct pci_driver lnw_gpio_driver = { | |||
302 | .name = "langwell_gpio", | 364 | .name = "langwell_gpio", |
303 | .id_table = lnw_gpio_ids, | 365 | .id_table = lnw_gpio_ids, |
304 | .probe = lnw_gpio_probe, | 366 | .probe = lnw_gpio_probe, |
367 | .driver = { | ||
368 | .pm = &lnw_gpio_pm_ops, | ||
369 | }, | ||
305 | }; | 370 | }; |
306 | 371 | ||
307 | 372 | ||
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c index 78a843947d82..0451d7ac94ac 100644 --- a/drivers/gpio/pca953x.c +++ b/drivers/gpio/pca953x.c | |||
@@ -24,33 +24,46 @@ | |||
24 | #include <linux/of_gpio.h> | 24 | #include <linux/of_gpio.h> |
25 | #endif | 25 | #endif |
26 | 26 | ||
27 | #define PCA953X_INPUT 0 | 27 | #define PCA953X_INPUT 0 |
28 | #define PCA953X_OUTPUT 1 | 28 | #define PCA953X_OUTPUT 1 |
29 | #define PCA953X_INVERT 2 | 29 | #define PCA953X_INVERT 2 |
30 | #define PCA953X_DIRECTION 3 | 30 | #define PCA953X_DIRECTION 3 |
31 | 31 | ||
32 | #define PCA953X_GPIOS 0x00FF | 32 | #define PCA957X_IN 0 |
33 | #define PCA953X_INT 0x0100 | 33 | #define PCA957X_INVRT 1 |
34 | #define PCA957X_BKEN 2 | ||
35 | #define PCA957X_PUPD 3 | ||
36 | #define PCA957X_CFG 4 | ||
37 | #define PCA957X_OUT 5 | ||
38 | #define PCA957X_MSK 6 | ||
39 | #define PCA957X_INTS 7 | ||
40 | |||
41 | #define PCA_GPIO_MASK 0x00FF | ||
42 | #define PCA_INT 0x0100 | ||
43 | #define PCA953X_TYPE 0x1000 | ||
44 | #define PCA957X_TYPE 0x2000 | ||
34 | 45 | ||
35 | static const struct i2c_device_id pca953x_id[] = { | 46 | static const struct i2c_device_id pca953x_id[] = { |
36 | { "pca9534", 8 | PCA953X_INT, }, | 47 | { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, |
37 | { "pca9535", 16 | PCA953X_INT, }, | 48 | { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, |
38 | { "pca9536", 4, }, | 49 | { "pca9536", 4 | PCA953X_TYPE, }, |
39 | { "pca9537", 4 | PCA953X_INT, }, | 50 | { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, |
40 | { "pca9538", 8 | PCA953X_INT, }, | 51 | { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, |
41 | { "pca9539", 16 | PCA953X_INT, }, | 52 | { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, |
42 | { "pca9554", 8 | PCA953X_INT, }, | 53 | { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, |
43 | { "pca9555", 16 | PCA953X_INT, }, | 54 | { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, |
44 | { "pca9556", 8, }, | 55 | { "pca9556", 8 | PCA953X_TYPE, }, |
45 | { "pca9557", 8, }, | 56 | { "pca9557", 8 | PCA953X_TYPE, }, |
46 | 57 | { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, | |
47 | { "max7310", 8, }, | 58 | { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, |
48 | { "max7312", 16 | PCA953X_INT, }, | 59 | |
49 | { "max7313", 16 | PCA953X_INT, }, | 60 | { "max7310", 8 | PCA953X_TYPE, }, |
50 | { "max7315", 8 | PCA953X_INT, }, | 61 | { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, |
51 | { "pca6107", 8 | PCA953X_INT, }, | 62 | { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, |
52 | { "tca6408", 8 | PCA953X_INT, }, | 63 | { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, |
53 | { "tca6416", 16 | PCA953X_INT, }, | 64 | { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, |
65 | { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, | ||
66 | { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, | ||
54 | /* NYET: { "tca6424", 24, }, */ | 67 | /* NYET: { "tca6424", 24, }, */ |
55 | { } | 68 | { } |
56 | }; | 69 | }; |
@@ -75,16 +88,32 @@ struct pca953x_chip { | |||
75 | struct pca953x_platform_data *dyn_pdata; | 88 | struct pca953x_platform_data *dyn_pdata; |
76 | struct gpio_chip gpio_chip; | 89 | struct gpio_chip gpio_chip; |
77 | const char *const *names; | 90 | const char *const *names; |
91 | int chip_type; | ||
78 | }; | 92 | }; |
79 | 93 | ||
80 | static int pca953x_write_reg(struct pca953x_chip *chip, int reg, uint16_t val) | 94 | static int pca953x_write_reg(struct pca953x_chip *chip, int reg, uint16_t val) |
81 | { | 95 | { |
82 | int ret; | 96 | int ret = 0; |
83 | 97 | ||
84 | if (chip->gpio_chip.ngpio <= 8) | 98 | if (chip->gpio_chip.ngpio <= 8) |
85 | ret = i2c_smbus_write_byte_data(chip->client, reg, val); | 99 | ret = i2c_smbus_write_byte_data(chip->client, reg, val); |
86 | else | 100 | else { |
87 | ret = i2c_smbus_write_word_data(chip->client, reg << 1, val); | 101 | switch (chip->chip_type) { |
102 | case PCA953X_TYPE: | ||
103 | ret = i2c_smbus_write_word_data(chip->client, | ||
104 | reg << 1, val); | ||
105 | break; | ||
106 | case PCA957X_TYPE: | ||
107 | ret = i2c_smbus_write_byte_data(chip->client, reg << 1, | ||
108 | val & 0xff); | ||
109 | if (ret < 0) | ||
110 | break; | ||
111 | ret = i2c_smbus_write_byte_data(chip->client, | ||
112 | (reg << 1) + 1, | ||
113 | (val & 0xff00) >> 8); | ||
114 | break; | ||
115 | } | ||
116 | } | ||
88 | 117 | ||
89 | if (ret < 0) { | 118 | if (ret < 0) { |
90 | dev_err(&chip->client->dev, "failed writing register\n"); | 119 | dev_err(&chip->client->dev, "failed writing register\n"); |
@@ -116,13 +145,22 @@ static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) | |||
116 | { | 145 | { |
117 | struct pca953x_chip *chip; | 146 | struct pca953x_chip *chip; |
118 | uint16_t reg_val; | 147 | uint16_t reg_val; |
119 | int ret; | 148 | int ret, offset = 0; |
120 | 149 | ||
121 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | 150 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
122 | 151 | ||
123 | mutex_lock(&chip->i2c_lock); | 152 | mutex_lock(&chip->i2c_lock); |
124 | reg_val = chip->reg_direction | (1u << off); | 153 | reg_val = chip->reg_direction | (1u << off); |
125 | ret = pca953x_write_reg(chip, PCA953X_DIRECTION, reg_val); | 154 | |
155 | switch (chip->chip_type) { | ||
156 | case PCA953X_TYPE: | ||
157 | offset = PCA953X_DIRECTION; | ||
158 | break; | ||
159 | case PCA957X_TYPE: | ||
160 | offset = PCA957X_CFG; | ||
161 | break; | ||
162 | } | ||
163 | ret = pca953x_write_reg(chip, offset, reg_val); | ||
126 | if (ret) | 164 | if (ret) |
127 | goto exit; | 165 | goto exit; |
128 | 166 | ||
@@ -138,7 +176,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, | |||
138 | { | 176 | { |
139 | struct pca953x_chip *chip; | 177 | struct pca953x_chip *chip; |
140 | uint16_t reg_val; | 178 | uint16_t reg_val; |
141 | int ret; | 179 | int ret, offset = 0; |
142 | 180 | ||
143 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | 181 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
144 | 182 | ||
@@ -149,7 +187,15 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, | |||
149 | else | 187 | else |
150 | reg_val = chip->reg_output & ~(1u << off); | 188 | reg_val = chip->reg_output & ~(1u << off); |
151 | 189 | ||
152 | ret = pca953x_write_reg(chip, PCA953X_OUTPUT, reg_val); | 190 | switch (chip->chip_type) { |
191 | case PCA953X_TYPE: | ||
192 | offset = PCA953X_OUTPUT; | ||
193 | break; | ||
194 | case PCA957X_TYPE: | ||
195 | offset = PCA957X_OUT; | ||
196 | break; | ||
197 | } | ||
198 | ret = pca953x_write_reg(chip, offset, reg_val); | ||
153 | if (ret) | 199 | if (ret) |
154 | goto exit; | 200 | goto exit; |
155 | 201 | ||
@@ -157,7 +203,15 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, | |||
157 | 203 | ||
158 | /* then direction */ | 204 | /* then direction */ |
159 | reg_val = chip->reg_direction & ~(1u << off); | 205 | reg_val = chip->reg_direction & ~(1u << off); |
160 | ret = pca953x_write_reg(chip, PCA953X_DIRECTION, reg_val); | 206 | switch (chip->chip_type) { |
207 | case PCA953X_TYPE: | ||
208 | offset = PCA953X_DIRECTION; | ||
209 | break; | ||
210 | case PCA957X_TYPE: | ||
211 | offset = PCA957X_CFG; | ||
212 | break; | ||
213 | } | ||
214 | ret = pca953x_write_reg(chip, offset, reg_val); | ||
161 | if (ret) | 215 | if (ret) |
162 | goto exit; | 216 | goto exit; |
163 | 217 | ||
@@ -172,12 +226,20 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) | |||
172 | { | 226 | { |
173 | struct pca953x_chip *chip; | 227 | struct pca953x_chip *chip; |
174 | uint16_t reg_val; | 228 | uint16_t reg_val; |
175 | int ret; | 229 | int ret, offset = 0; |
176 | 230 | ||
177 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | 231 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
178 | 232 | ||
179 | mutex_lock(&chip->i2c_lock); | 233 | mutex_lock(&chip->i2c_lock); |
180 | ret = pca953x_read_reg(chip, PCA953X_INPUT, ®_val); | 234 | switch (chip->chip_type) { |
235 | case PCA953X_TYPE: | ||
236 | offset = PCA953X_INPUT; | ||
237 | break; | ||
238 | case PCA957X_TYPE: | ||
239 | offset = PCA957X_IN; | ||
240 | break; | ||
241 | } | ||
242 | ret = pca953x_read_reg(chip, offset, ®_val); | ||
181 | mutex_unlock(&chip->i2c_lock); | 243 | mutex_unlock(&chip->i2c_lock); |
182 | if (ret < 0) { | 244 | if (ret < 0) { |
183 | /* NOTE: diagnostic already emitted; that's all we should | 245 | /* NOTE: diagnostic already emitted; that's all we should |
@@ -194,7 +256,7 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) | |||
194 | { | 256 | { |
195 | struct pca953x_chip *chip; | 257 | struct pca953x_chip *chip; |
196 | uint16_t reg_val; | 258 | uint16_t reg_val; |
197 | int ret; | 259 | int ret, offset = 0; |
198 | 260 | ||
199 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | 261 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
200 | 262 | ||
@@ -204,7 +266,15 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) | |||
204 | else | 266 | else |
205 | reg_val = chip->reg_output & ~(1u << off); | 267 | reg_val = chip->reg_output & ~(1u << off); |
206 | 268 | ||
207 | ret = pca953x_write_reg(chip, PCA953X_OUTPUT, reg_val); | 269 | switch (chip->chip_type) { |
270 | case PCA953X_TYPE: | ||
271 | offset = PCA953X_OUTPUT; | ||
272 | break; | ||
273 | case PCA957X_TYPE: | ||
274 | offset = PCA957X_OUT; | ||
275 | break; | ||
276 | } | ||
277 | ret = pca953x_write_reg(chip, offset, reg_val); | ||
208 | if (ret) | 278 | if (ret) |
209 | goto exit; | 279 | goto exit; |
210 | 280 | ||
@@ -322,9 +392,17 @@ static uint16_t pca953x_irq_pending(struct pca953x_chip *chip) | |||
322 | uint16_t old_stat; | 392 | uint16_t old_stat; |
323 | uint16_t pending; | 393 | uint16_t pending; |
324 | uint16_t trigger; | 394 | uint16_t trigger; |
325 | int ret; | 395 | int ret, offset = 0; |
326 | 396 | ||
327 | ret = pca953x_read_reg(chip, PCA953X_INPUT, &cur_stat); | 397 | switch (chip->chip_type) { |
398 | case PCA953X_TYPE: | ||
399 | offset = PCA953X_INPUT; | ||
400 | break; | ||
401 | case PCA957X_TYPE: | ||
402 | offset = PCA957X_IN; | ||
403 | break; | ||
404 | } | ||
405 | ret = pca953x_read_reg(chip, offset, &cur_stat); | ||
328 | if (ret) | 406 | if (ret) |
329 | return 0; | 407 | return 0; |
330 | 408 | ||
@@ -372,14 +450,21 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, | |||
372 | { | 450 | { |
373 | struct i2c_client *client = chip->client; | 451 | struct i2c_client *client = chip->client; |
374 | struct pca953x_platform_data *pdata = client->dev.platform_data; | 452 | struct pca953x_platform_data *pdata = client->dev.platform_data; |
375 | int ret; | 453 | int ret, offset = 0; |
376 | 454 | ||
377 | if (pdata->irq_base != -1 | 455 | if (pdata->irq_base != -1 |
378 | && (id->driver_data & PCA953X_INT)) { | 456 | && (id->driver_data & PCA_INT)) { |
379 | int lvl; | 457 | int lvl; |
380 | 458 | ||
381 | ret = pca953x_read_reg(chip, PCA953X_INPUT, | 459 | switch (chip->chip_type) { |
382 | &chip->irq_stat); | 460 | case PCA953X_TYPE: |
461 | offset = PCA953X_INPUT; | ||
462 | break; | ||
463 | case PCA957X_TYPE: | ||
464 | offset = PCA957X_IN; | ||
465 | break; | ||
466 | } | ||
467 | ret = pca953x_read_reg(chip, offset, &chip->irq_stat); | ||
383 | if (ret) | 468 | if (ret) |
384 | goto out_failed; | 469 | goto out_failed; |
385 | 470 | ||
@@ -439,7 +524,7 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, | |||
439 | struct i2c_client *client = chip->client; | 524 | struct i2c_client *client = chip->client; |
440 | struct pca953x_platform_data *pdata = client->dev.platform_data; | 525 | struct pca953x_platform_data *pdata = client->dev.platform_data; |
441 | 526 | ||
442 | if (pdata->irq_base != -1 && (id->driver_data & PCA953X_INT)) | 527 | if (pdata->irq_base != -1 && (id->driver_data & PCA_INT)) |
443 | dev_warn(&client->dev, "interrupt support not compiled in\n"); | 528 | dev_warn(&client->dev, "interrupt support not compiled in\n"); |
444 | 529 | ||
445 | return 0; | 530 | return 0; |
@@ -499,12 +584,65 @@ pca953x_get_alt_pdata(struct i2c_client *client) | |||
499 | } | 584 | } |
500 | #endif | 585 | #endif |
501 | 586 | ||
587 | static int __devinit device_pca953x_init(struct pca953x_chip *chip, int invert) | ||
588 | { | ||
589 | int ret; | ||
590 | |||
591 | ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output); | ||
592 | if (ret) | ||
593 | goto out; | ||
594 | |||
595 | ret = pca953x_read_reg(chip, PCA953X_DIRECTION, | ||
596 | &chip->reg_direction); | ||
597 | if (ret) | ||
598 | goto out; | ||
599 | |||
600 | /* set platform specific polarity inversion */ | ||
601 | ret = pca953x_write_reg(chip, PCA953X_INVERT, invert); | ||
602 | if (ret) | ||
603 | goto out; | ||
604 | return 0; | ||
605 | out: | ||
606 | return ret; | ||
607 | } | ||
608 | |||
609 | static int __devinit device_pca957x_init(struct pca953x_chip *chip, int invert) | ||
610 | { | ||
611 | int ret; | ||
612 | uint16_t val = 0; | ||
613 | |||
614 | /* Let every port in proper state, that could save power */ | ||
615 | pca953x_write_reg(chip, PCA957X_PUPD, 0x0); | ||
616 | pca953x_write_reg(chip, PCA957X_CFG, 0xffff); | ||
617 | pca953x_write_reg(chip, PCA957X_OUT, 0x0); | ||
618 | |||
619 | ret = pca953x_read_reg(chip, PCA957X_IN, &val); | ||
620 | if (ret) | ||
621 | goto out; | ||
622 | ret = pca953x_read_reg(chip, PCA957X_OUT, &chip->reg_output); | ||
623 | if (ret) | ||
624 | goto out; | ||
625 | ret = pca953x_read_reg(chip, PCA957X_CFG, &chip->reg_direction); | ||
626 | if (ret) | ||
627 | goto out; | ||
628 | |||
629 | /* set platform specific polarity inversion */ | ||
630 | pca953x_write_reg(chip, PCA957X_INVRT, invert); | ||
631 | |||
632 | /* To enable register 6, 7 to controll pull up and pull down */ | ||
633 | pca953x_write_reg(chip, PCA957X_BKEN, 0x202); | ||
634 | |||
635 | return 0; | ||
636 | out: | ||
637 | return ret; | ||
638 | } | ||
639 | |||
502 | static int __devinit pca953x_probe(struct i2c_client *client, | 640 | static int __devinit pca953x_probe(struct i2c_client *client, |
503 | const struct i2c_device_id *id) | 641 | const struct i2c_device_id *id) |
504 | { | 642 | { |
505 | struct pca953x_platform_data *pdata; | 643 | struct pca953x_platform_data *pdata; |
506 | struct pca953x_chip *chip; | 644 | struct pca953x_chip *chip; |
507 | int ret; | 645 | int ret = 0; |
508 | 646 | ||
509 | chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL); | 647 | chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL); |
510 | if (chip == NULL) | 648 | if (chip == NULL) |
@@ -531,25 +669,20 @@ static int __devinit pca953x_probe(struct i2c_client *client, | |||
531 | chip->gpio_start = pdata->gpio_base; | 669 | chip->gpio_start = pdata->gpio_base; |
532 | 670 | ||
533 | chip->names = pdata->names; | 671 | chip->names = pdata->names; |
672 | chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE); | ||
534 | 673 | ||
535 | mutex_init(&chip->i2c_lock); | 674 | mutex_init(&chip->i2c_lock); |
536 | 675 | ||
537 | /* initialize cached registers from their original values. | 676 | /* initialize cached registers from their original values. |
538 | * we can't share this chip with another i2c master. | 677 | * we can't share this chip with another i2c master. |
539 | */ | 678 | */ |
540 | pca953x_setup_gpio(chip, id->driver_data & PCA953X_GPIOS); | 679 | pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK); |
541 | 680 | ||
542 | ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output); | 681 | if (chip->chip_type == PCA953X_TYPE) |
543 | if (ret) | 682 | device_pca953x_init(chip, pdata->invert); |
544 | goto out_failed; | 683 | else if (chip->chip_type == PCA957X_TYPE) |
545 | 684 | device_pca957x_init(chip, pdata->invert); | |
546 | ret = pca953x_read_reg(chip, PCA953X_DIRECTION, &chip->reg_direction); | 685 | else |
547 | if (ret) | ||
548 | goto out_failed; | ||
549 | |||
550 | /* set platform specific polarity inversion */ | ||
551 | ret = pca953x_write_reg(chip, PCA953X_INVERT, pdata->invert); | ||
552 | if (ret) | ||
553 | goto out_failed; | 686 | goto out_failed; |
554 | 687 | ||
555 | ret = pca953x_irq_setup(chip, id); | 688 | ret = pca953x_irq_setup(chip, id); |
diff --git a/drivers/gpio/pch_gpio.c b/drivers/gpio/pch_gpio.c index f970a5f3585e..36919e77c495 100644 --- a/drivers/gpio/pch_gpio.c +++ b/drivers/gpio/pch_gpio.c | |||
@@ -283,8 +283,10 @@ static int pch_gpio_resume(struct pci_dev *pdev) | |||
283 | #define pch_gpio_resume NULL | 283 | #define pch_gpio_resume NULL |
284 | #endif | 284 | #endif |
285 | 285 | ||
286 | #define PCI_VENDOR_ID_ROHM 0x10DB | ||
286 | static DEFINE_PCI_DEVICE_TABLE(pch_gpio_pcidev_id) = { | 287 | static DEFINE_PCI_DEVICE_TABLE(pch_gpio_pcidev_id) = { |
287 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8803) }, | 288 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8803) }, |
289 | { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8014) }, | ||
288 | { 0, } | 290 | { 0, } |
289 | }; | 291 | }; |
290 | MODULE_DEVICE_TABLE(pci, pch_gpio_pcidev_id); | 292 | MODULE_DEVICE_TABLE(pci, pch_gpio_pcidev_id); |
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index ff5c66080c8c..fcdcb5d5c995 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h | |||
@@ -35,9 +35,9 @@ | |||
35 | * platform data and other tables. | 35 | * platform data and other tables. |
36 | */ | 36 | */ |
37 | 37 | ||
38 | static inline int gpio_is_valid(int number) | 38 | static inline bool gpio_is_valid(int number) |
39 | { | 39 | { |
40 | return ((unsigned)number) < ARCH_NR_GPIOS; | 40 | return number >= 0 && number < ARCH_NR_GPIOS; |
41 | } | 41 | } |
42 | 42 | ||
43 | struct device; | 43 | struct device; |
@@ -193,8 +193,8 @@ struct gpio { | |||
193 | }; | 193 | }; |
194 | 194 | ||
195 | extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *label); | 195 | extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *label); |
196 | extern int gpio_request_array(struct gpio *array, size_t num); | 196 | extern int gpio_request_array(const struct gpio *array, size_t num); |
197 | extern void gpio_free_array(struct gpio *array, size_t num); | 197 | extern void gpio_free_array(const struct gpio *array, size_t num); |
198 | 198 | ||
199 | #ifdef CONFIG_GPIO_SYSFS | 199 | #ifdef CONFIG_GPIO_SYSFS |
200 | 200 | ||
@@ -212,7 +212,7 @@ extern void gpio_unexport(unsigned gpio); | |||
212 | 212 | ||
213 | #else /* !CONFIG_GPIOLIB */ | 213 | #else /* !CONFIG_GPIOLIB */ |
214 | 214 | ||
215 | static inline int gpio_is_valid(int number) | 215 | static inline bool gpio_is_valid(int number) |
216 | { | 216 | { |
217 | /* only non-negative numbers are valid */ | 217 | /* only non-negative numbers are valid */ |
218 | return number >= 0; | 218 | return number >= 0; |
diff --git a/include/linux/gpio.h b/include/linux/gpio.h index 32720baf70f1..32d47e710661 100644 --- a/include/linux/gpio.h +++ b/include/linux/gpio.h | |||
@@ -25,9 +25,9 @@ struct gpio_chip; | |||
25 | * warning when something is wrongly called. | 25 | * warning when something is wrongly called. |
26 | */ | 26 | */ |
27 | 27 | ||
28 | static inline int gpio_is_valid(int number) | 28 | static inline bool gpio_is_valid(int number) |
29 | { | 29 | { |
30 | return 0; | 30 | return false; |
31 | } | 31 | } |
32 | 32 | ||
33 | static inline int gpio_request(unsigned gpio, const char *label) | 33 | static inline int gpio_request(unsigned gpio, const char *label) |
@@ -41,7 +41,7 @@ static inline int gpio_request_one(unsigned gpio, | |||
41 | return -ENOSYS; | 41 | return -ENOSYS; |
42 | } | 42 | } |
43 | 43 | ||
44 | static inline int gpio_request_array(struct gpio *array, size_t num) | 44 | static inline int gpio_request_array(const struct gpio *array, size_t num) |
45 | { | 45 | { |
46 | return -ENOSYS; | 46 | return -ENOSYS; |
47 | } | 47 | } |
@@ -54,7 +54,7 @@ static inline void gpio_free(unsigned gpio) | |||
54 | WARN_ON(1); | 54 | WARN_ON(1); |
55 | } | 55 | } |
56 | 56 | ||
57 | static inline void gpio_free_array(struct gpio *array, size_t num) | 57 | static inline void gpio_free_array(const struct gpio *array, size_t num) |
58 | { | 58 | { |
59 | might_sleep(); | 59 | might_sleep(); |
60 | 60 | ||