diff options
author | Ayaz Abdulla <aabdulla@nvidia.com> | 2008-08-06 12:12:34 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-08-07 02:11:01 -0400 |
commit | 9a33e883564c2db8e1b3b645de4579a98ac084d2 (patch) | |
tree | 32b786f7e8b52a9ff81cc2d876daa0d9b11a6e76 | |
parent | 06941931d8697dd939d7cac379565b1b2de1415f (diff) |
forcedeth: add tx pause limit
This patch adds support for limiting the number of tx pause frames to a
default of 8. Previously, hardware would send out continuous stream of
pause frames.
Signed-off-by: Ayaz Abdulla <aabdulla@nvidia.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
-rw-r--r-- | drivers/net/forcedeth.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index d9495d2fd808..053971e5fc94 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -249,6 +249,8 @@ enum { | |||
249 | #define NVREG_TX_PAUSEFRAME_ENABLE_V1 0x01800010 | 249 | #define NVREG_TX_PAUSEFRAME_ENABLE_V1 0x01800010 |
250 | #define NVREG_TX_PAUSEFRAME_ENABLE_V2 0x056003f0 | 250 | #define NVREG_TX_PAUSEFRAME_ENABLE_V2 0x056003f0 |
251 | #define NVREG_TX_PAUSEFRAME_ENABLE_V3 0x09f00880 | 251 | #define NVREG_TX_PAUSEFRAME_ENABLE_V3 0x09f00880 |
252 | NvRegTxPauseFrameLimit = 0x174, | ||
253 | #define NVREG_TX_PAUSEFRAMELIMIT_ENABLE 0x00010000 | ||
252 | NvRegMIIStatus = 0x180, | 254 | NvRegMIIStatus = 0x180, |
253 | #define NVREG_MIISTAT_ERROR 0x0001 | 255 | #define NVREG_MIISTAT_ERROR 0x0001 |
254 | #define NVREG_MIISTAT_LINKCHANGE 0x0008 | 256 | #define NVREG_MIISTAT_LINKCHANGE 0x0008 |
@@ -3076,8 +3078,11 @@ static void nv_update_pause(struct net_device *dev, u32 pause_flags) | |||
3076 | u32 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V1; | 3078 | u32 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V1; |
3077 | if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V2) | 3079 | if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V2) |
3078 | pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V2; | 3080 | pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V2; |
3079 | if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V3) | 3081 | if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V3) { |
3080 | pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V3; | 3082 | pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V3; |
3083 | /* limit the number of tx pause frames to a default of 8 */ | ||
3084 | writel(readl(base + NvRegTxPauseFrameLimit)|NVREG_TX_PAUSEFRAMELIMIT_ENABLE, base + NvRegTxPauseFrameLimit); | ||
3085 | } | ||
3081 | writel(pause_enable, base + NvRegTxPauseFrame); | 3086 | writel(pause_enable, base + NvRegTxPauseFrame); |
3082 | writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1); | 3087 | writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1); |
3083 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; | 3088 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |