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authorJoerg Roedel <joerg.roedel@amd.com>2008-09-08 08:48:04 -0400
committerIngo Molnar <mingo@elte.hu>2008-09-19 06:59:12 -0400
commitee893c24edb8ebab9a3fb66566855572579ad616 (patch)
tree72f51bc0e9686edc86c26322cb3656826d520588
parent335503e57b6b8de04cec5d27eb2c3d09ff98905b (diff)
AMD IOMMU: save pci segment from ACPI tables
This patch adds the pci_seg field to the amd_iommu structure and fills it with the corresponding value from the ACPI table. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
-rw-r--r--arch/x86/kernel/amd_iommu_init.c1
-rw-r--r--include/asm-x86/amd_iommu_types.h3
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 41ce8d5d626e..b50234ef91ed 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -676,6 +676,7 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)
676 */ 676 */
677 iommu->devid = h->devid; 677 iommu->devid = h->devid;
678 iommu->cap_ptr = h->cap_ptr; 678 iommu->cap_ptr = h->cap_ptr;
679 iommu->pci_seg = h->pci_seg;
679 iommu->mmio_phys = h->mmio_phys; 680 iommu->mmio_phys = h->mmio_phys;
680 iommu->mmio_base = iommu_map_mmio_space(h->mmio_phys); 681 iommu->mmio_base = iommu_map_mmio_space(h->mmio_phys);
681 if (!iommu->mmio_base) 682 if (!iommu->mmio_base)
diff --git a/include/asm-x86/amd_iommu_types.h b/include/asm-x86/amd_iommu_types.h
index 8b8cd0c60b3c..20814b85bbc3 100644
--- a/include/asm-x86/amd_iommu_types.h
+++ b/include/asm-x86/amd_iommu_types.h
@@ -232,6 +232,9 @@ struct amd_iommu {
232 /* capabilities of that IOMMU read from ACPI */ 232 /* capabilities of that IOMMU read from ACPI */
233 u32 cap; 233 u32 cap;
234 234
235 /* pci domain of this IOMMU */
236 u16 pci_seg;
237
235 /* first device this IOMMU handles. read from PCI */ 238 /* first device this IOMMU handles. read from PCI */
236 u16 first_device; 239 u16 first_device;
237 /* last device this IOMMU handles. read from PCI */ 240 /* last device this IOMMU handles. read from PCI */