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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2008-03-27 15:05:57 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-04-28 12:14:27 -0400
commiteba8291b514e6e590be161afcbfdab58cc5da6b8 (patch)
tree47d1b31417991d82834cba2c19a6bebb32f7e7b2
parent0167509574ef1cdb516906db5e8b6ad5ca64ab61 (diff)
[MIPS] Alchemy: kill useless time variables
Since the commit 91a2fcc88634663e9e13dcdfad0e4a860e64aeee ([MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers) removed the Alchemy specific timer handler, 'r4k_offset' and 'r4k_cur' variables became practically useless, so get rid of them at last, renaming cal_r4off() function into calc_clock() and making it return CPU frequency. Also, make 'no_au1xxx_32khz' variable static... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/au1000/common/dbg_io.c4
-rw-r--r--arch/mips/au1000/common/time.c19
2 files changed, 6 insertions, 17 deletions
diff --git a/arch/mips/au1000/common/dbg_io.c b/arch/mips/au1000/common/dbg_io.c
index 79e0b0a51ace..12f5458142ae 100644
--- a/arch/mips/au1000/common/dbg_io.c
+++ b/arch/mips/au1000/common/dbg_io.c
@@ -56,7 +56,7 @@ typedef unsigned int uint32;
56#define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y)) 56#define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y))
57 57
58extern unsigned long get_au1x00_uart_baud_base(void); 58extern unsigned long get_au1x00_uart_baud_base(void);
59extern unsigned long cal_r4koff(void); 59extern unsigned long calc_clock(void);
60 60
61void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) 61void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
62{ 62{
@@ -64,7 +64,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
64 if (UART16550_READ(UART_MOD_CNTRL) != 0x3) { 64 if (UART16550_READ(UART_MOD_CNTRL) != 0x3) {
65 UART16550_WRITE(UART_MOD_CNTRL, 3); 65 UART16550_WRITE(UART_MOD_CNTRL, 3);
66 } 66 }
67 cal_r4koff(); 67 calc_clock();
68 68
69 /* disable interrupts */ 69 /* disable interrupts */
70 UART16550_WRITE(UART_IER, 0); 70 UART16550_WRITE(UART_IER, 0);
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 1966964590ab..57aea3164d9a 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -48,9 +48,7 @@
48#include <linux/mc146818rtc.h> 48#include <linux/mc146818rtc.h>
49#include <linux/timex.h> 49#include <linux/timex.h>
50 50
51static unsigned long r4k_offset; /* Amount to increment compare reg each time */ 51static int no_au1xxx_32khz;
52static unsigned long r4k_cur; /* What counter should be at next timer irq */
53int no_au1xxx_32khz;
54extern int allow_au1k_wait; /* default off for CP0 Counter */ 52extern int allow_au1k_wait; /* default off for CP0 Counter */
55 53
56#ifdef CONFIG_PM 54#ifdef CONFIG_PM
@@ -184,7 +182,7 @@ wakeup_counter0_set(int ticks)
184 * "wait" is enabled, and we need to detect if the 32KHz isn't present 182 * "wait" is enabled, and we need to detect if the 32KHz isn't present
185 * but requested......got it? :-) -- Dan 183 * but requested......got it? :-) -- Dan
186 */ 184 */
187unsigned long cal_r4koff(void) 185unsigned long calc_clock(void)
188{ 186{
189 unsigned long cpu_speed; 187 unsigned long cpu_speed;
190 unsigned long flags; 188 unsigned long flags;
@@ -229,19 +227,13 @@ unsigned long cal_r4koff(void)
229 // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) 227 // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
230 set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16)); 228 set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
231 spin_unlock_irqrestore(&time_lock, flags); 229 spin_unlock_irqrestore(&time_lock, flags);
232 return (cpu_speed / HZ); 230 return cpu_speed;
233} 231}
234 232
235void __init plat_time_init(void) 233void __init plat_time_init(void)
236{ 234{
237 unsigned int est_freq; 235 unsigned int est_freq = calc_clock();
238 236
239 printk("calculating r4koff... ");
240 r4k_offset = cal_r4koff();
241 printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
242
243 //est_freq = 2*r4k_offset*HZ;
244 est_freq = r4k_offset*HZ;
245 est_freq += 5000; /* round */ 237 est_freq += 5000; /* round */
246 est_freq -= est_freq%10000; 238 est_freq -= est_freq%10000;
247 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, 239 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
@@ -249,9 +241,6 @@ void __init plat_time_init(void)
249 set_au1x00_speed(est_freq); 241 set_au1x00_speed(est_freq);
250 set_au1x00_lcd_clock(); // program the LCD clock 242 set_au1x00_lcd_clock(); // program the LCD clock
251 243
252 r4k_cur = (read_c0_count() + r4k_offset);
253 write_c0_compare(r4k_cur);
254
255#ifdef CONFIG_PM 244#ifdef CONFIG_PM
256 /* 245 /*
257 * setup counter 0, since it keeps ticking after a 246 * setup counter 0, since it keeps ticking after a