aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-09-01 17:07:37 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-09-05 12:02:31 -0400
commite8a91c953fca683ef9a9335fb00d6eb3e49ac1ee (patch)
tree7a9c2ef4b9c25f137e2fb97d36e0248ee24c6ec4
parentd592dd1adc4f57171fa2570a94279d887b78d5b5 (diff)
[ARM] omap: Fix IO_ADDRESS() macros
OMAP1_IO_ADDRESS(), OMAP2_IO_ADDRESS() and IO_ADDRESS() returns cookies for use with __raw_{read|write}* for accessing registers. Therefore, these macros should return (void __iomem *) cookies, not integer values. Doing this improves typechecking, and means we can find those places where, eg, DMA controllers are incorrectly given virtual addresses to DMA to, or physical addresses are thrown through a virtual to physical address translation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-omap1/serial.c12
-rw-r--r--arch/arm/mach-omap2/cm.h2
-rw-r--r--arch/arm/mach-omap2/gpmc.c6
-rw-r--r--arch/arm/mach-omap2/id.c6
-rw-r--r--arch/arm/mach-omap2/irq.c4
-rw-r--r--arch/arm/mach-omap2/prm.h2
-rw-r--r--arch/arm/mach-omap2/serial.c14
-rw-r--r--arch/arm/plat-omap/common.c36
-rw-r--r--arch/arm/plat-omap/dma.c6
-rw-r--r--arch/arm/plat-omap/dmtimer.c2
-rw-r--r--arch/arm/plat-omap/include/mach/control.h6
-rw-r--r--arch/arm/plat-omap/include/mach/io.h50
-rw-r--r--arch/arm/plat-omap/include/mach/pm.h4
-rw-r--r--arch/arm/plat-omap/include/mach/sdrc.h6
-rw-r--r--drivers/video/omap/dispc.c6
15 files changed, 82 insertions, 80 deletions
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 0e25a996bb4c..4965986b4ad5 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -67,8 +67,8 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
67 67
68static struct plat_serial8250_port serial_platform_data[] = { 68static struct plat_serial8250_port serial_platform_data[] = {
69 { 69 {
70 .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE), 70 .membase = IO_ADDRESS(OMAP_UART1_BASE),
71 .mapbase = (unsigned long)OMAP_UART1_BASE, 71 .mapbase = OMAP_UART1_BASE,
72 .irq = INT_UART1, 72 .irq = INT_UART1,
73 .flags = UPF_BOOT_AUTOCONF, 73 .flags = UPF_BOOT_AUTOCONF,
74 .iotype = UPIO_MEM, 74 .iotype = UPIO_MEM,
@@ -76,8 +76,8 @@ static struct plat_serial8250_port serial_platform_data[] = {
76 .uartclk = OMAP16XX_BASE_BAUD * 16, 76 .uartclk = OMAP16XX_BASE_BAUD * 16,
77 }, 77 },
78 { 78 {
79 .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE), 79 .membase = IO_ADDRESS(OMAP_UART2_BASE),
80 .mapbase = (unsigned long)OMAP_UART2_BASE, 80 .mapbase = OMAP_UART2_BASE,
81 .irq = INT_UART2, 81 .irq = INT_UART2,
82 .flags = UPF_BOOT_AUTOCONF, 82 .flags = UPF_BOOT_AUTOCONF,
83 .iotype = UPIO_MEM, 83 .iotype = UPIO_MEM,
@@ -85,8 +85,8 @@ static struct plat_serial8250_port serial_platform_data[] = {
85 .uartclk = OMAP16XX_BASE_BAUD * 16, 85 .uartclk = OMAP16XX_BASE_BAUD * 16,
86 }, 86 },
87 { 87 {
88 .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE), 88 .membase = IO_ADDRESS(OMAP_UART3_BASE),
89 .mapbase = (unsigned long)OMAP_UART3_BASE, 89 .mapbase = OMAP_UART3_BASE,
90 .irq = INT_UART3, 90 .irq = INT_UART3,
91 .flags = UPF_BOOT_AUTOCONF, 91 .flags = UPF_BOOT_AUTOCONF,
92 .iotype = UPIO_MEM, 92 .iotype = UPIO_MEM,
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 87a44c715aa4..65fdf78c91e1 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -18,7 +18,7 @@
18 18
19#ifndef __ASSEMBLER__ 19#ifndef __ASSEMBLER__
20#define OMAP_CM_REGADDR(module, reg) \ 20#define OMAP_CM_REGADDR(module, reg) \
21 (void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg)) 21 IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg))
22#else 22#else
23#define OMAP2420_CM_REGADDR(module, reg) \ 23#define OMAP2420_CM_REGADDR(module, reg) \
24 IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) 24 IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index f51d69bc457d..9b4e58ee2ca2 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -64,10 +64,8 @@ static struct resource gpmc_cs_mem[GPMC_CS_NUM];
64static DEFINE_SPINLOCK(gpmc_mem_lock); 64static DEFINE_SPINLOCK(gpmc_mem_lock);
65static unsigned gpmc_cs_map; 65static unsigned gpmc_cs_map;
66 66
67static void __iomem *gpmc_base = 67static void __iomem *gpmc_base = IO_ADDRESS(GPMC_BASE);
68 (void __iomem *) IO_ADDRESS(GPMC_BASE); 68static void __iomem *gpmc_cs_base = IO_ADDRESS(GPMC_BASE) + GPMC_CS0;
69static void __iomem *gpmc_cs_base =
70 (void __iomem *) IO_ADDRESS(GPMC_BASE) + GPMC_CS0;
71 69
72static struct clk *gpmc_fck; 70static struct clk *gpmc_fck;
73 71
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index a5d4526ac4d6..e53ebe7d58be 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -21,11 +21,11 @@
21#include <mach/cpu.h> 21#include <mach/cpu.h>
22 22
23#if defined(CONFIG_ARCH_OMAP2420) 23#if defined(CONFIG_ARCH_OMAP2420)
24#define TAP_BASE io_p2v(0x48014000) 24#define TAP_BASE IO_ADDRESS(0x48014000)
25#elif defined(CONFIG_ARCH_OMAP2430) 25#elif defined(CONFIG_ARCH_OMAP2430)
26#define TAP_BASE io_p2v(0x4900A000) 26#define TAP_BASE IO_ADDRESS(0x4900A000)
27#elif defined(CONFIG_ARCH_OMAP34XX) 27#elif defined(CONFIG_ARCH_OMAP34XX)
28#define TAP_BASE io_p2v(0x4830A000) 28#define TAP_BASE IO_ADDRESS(0x4830A000)
29#endif 29#endif
30 30
31#define OMAP_TAP_IDCODE 0x0204 31#define OMAP_TAP_IDCODE 0x0204
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 9ef15b31d8fc..742bd0070e63 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -32,7 +32,7 @@
32 * for each bank.. when in doubt, consult the TRM. 32 * for each bank.. when in doubt, consult the TRM.
33 */ 33 */
34static struct omap_irq_bank { 34static struct omap_irq_bank {
35 unsigned long base_reg; 35 void __iomem *base_reg;
36 unsigned int nr_irqs; 36 unsigned int nr_irqs;
37} __attribute__ ((aligned(4))) irq_banks[] = { 37} __attribute__ ((aligned(4))) irq_banks[] = {
38 { 38 {
@@ -94,7 +94,7 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
94 unsigned long tmp; 94 unsigned long tmp;
95 95
96 tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff; 96 tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff;
97 printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx " 97 printk(KERN_INFO "IRQ: Found an INTC at 0x%p "
98 "(revision %ld.%ld) with %d interrupts\n", 98 "(revision %ld.%ld) with %d interrupts\n",
99 bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); 99 bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
100 100
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index bbf41fc8e9a9..026d8a776ae6 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -18,7 +18,7 @@
18 18
19#ifndef __ASSEMBLER__ 19#ifndef __ASSEMBLER__
20#define OMAP_PRM_REGADDR(module, reg) \ 20#define OMAP_PRM_REGADDR(module, reg) \
21 (void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg)) 21 IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg))
22#else 22#else
23#define OMAP2420_PRM_REGADDR(module, reg) \ 23#define OMAP2420_PRM_REGADDR(module, reg) \
24 IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) 24 IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index adc8a26a8fb0..7faa53c3a925 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -32,24 +32,24 @@ static struct clk * uart3_fck = NULL;
32 32
33static struct plat_serial8250_port serial_platform_data[] = { 33static struct plat_serial8250_port serial_platform_data[] = {
34 { 34 {
35 .membase = (char *)IO_ADDRESS(OMAP_UART1_BASE), 35 .membase = IO_ADDRESS(OMAP_UART1_BASE),
36 .mapbase = (unsigned long)OMAP_UART1_BASE, 36 .mapbase = OMAP_UART1_BASE,
37 .irq = 72, 37 .irq = 72,
38 .flags = UPF_BOOT_AUTOCONF, 38 .flags = UPF_BOOT_AUTOCONF,
39 .iotype = UPIO_MEM, 39 .iotype = UPIO_MEM,
40 .regshift = 2, 40 .regshift = 2,
41 .uartclk = OMAP16XX_BASE_BAUD * 16, 41 .uartclk = OMAP16XX_BASE_BAUD * 16,
42 }, { 42 }, {
43 .membase = (char *)IO_ADDRESS(OMAP_UART2_BASE), 43 .membase = IO_ADDRESS(OMAP_UART2_BASE),
44 .mapbase = (unsigned long)OMAP_UART2_BASE, 44 .mapbase = OMAP_UART2_BASE,
45 .irq = 73, 45 .irq = 73,
46 .flags = UPF_BOOT_AUTOCONF, 46 .flags = UPF_BOOT_AUTOCONF,
47 .iotype = UPIO_MEM, 47 .iotype = UPIO_MEM,
48 .regshift = 2, 48 .regshift = 2,
49 .uartclk = OMAP16XX_BASE_BAUD * 16, 49 .uartclk = OMAP16XX_BASE_BAUD * 16,
50 }, { 50 }, {
51 .membase = (char *)IO_ADDRESS(OMAP_UART3_BASE), 51 .membase = IO_ADDRESS(OMAP_UART3_BASE),
52 .mapbase = (unsigned long)OMAP_UART3_BASE, 52 .mapbase = OMAP_UART3_BASE,
53 .irq = 74, 53 .irq = 74,
54 .flags = UPF_BOOT_AUTOCONF, 54 .flags = UPF_BOOT_AUTOCONF,
55 .iotype = UPIO_MEM, 55 .iotype = UPIO_MEM,
@@ -71,7 +71,7 @@ static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
71 int value) 71 int value)
72{ 72{
73 offset <<= p->regshift; 73 offset <<= p->regshift;
74 __raw_writeb(value, (unsigned long)(p->membase + offset)); 74 __raw_writeb(value, p->membase + offset);
75} 75}
76 76
77/* 77/*
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index f4dff423ae7c..20e8db5fe32a 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -258,12 +258,12 @@ static void __init __omap2_set_globals(void)
258#if defined(CONFIG_ARCH_OMAP2420) 258#if defined(CONFIG_ARCH_OMAP2420)
259 259
260static struct omap_globals omap242x_globals = { 260static struct omap_globals omap242x_globals = {
261 .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x48014000), 261 .tap = OMAP2_IO_ADDRESS(0x48014000),
262 .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), 262 .sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE),
263 .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), 263 .sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE),
264 .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), 264 .ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE),
265 .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), 265 .prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE),
266 .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), 266 .cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE),
267}; 267};
268 268
269void __init omap2_set_globals_242x(void) 269void __init omap2_set_globals_242x(void)
@@ -276,12 +276,12 @@ void __init omap2_set_globals_242x(void)
276#if defined(CONFIG_ARCH_OMAP2430) 276#if defined(CONFIG_ARCH_OMAP2430)
277 277
278static struct omap_globals omap243x_globals = { 278static struct omap_globals omap243x_globals = {
279 .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4900a000), 279 .tap = OMAP2_IO_ADDRESS(0x4900a000),
280 .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), 280 .sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE),
281 .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), 281 .sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE),
282 .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), 282 .ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE),
283 .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), 283 .prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE),
284 .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), 284 .cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE),
285}; 285};
286 286
287void __init omap2_set_globals_243x(void) 287void __init omap2_set_globals_243x(void)
@@ -294,12 +294,12 @@ void __init omap2_set_globals_243x(void)
294#if defined(CONFIG_ARCH_OMAP3430) 294#if defined(CONFIG_ARCH_OMAP3430)
295 295
296static struct omap_globals omap343x_globals = { 296static struct omap_globals omap343x_globals = {
297 .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4830A000), 297 .tap = OMAP2_IO_ADDRESS(0x4830A000),
298 .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), 298 .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE),
299 .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), 299 .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE),
300 .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), 300 .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE),
301 .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), 301 .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE),
302 .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), 302 .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE),
303}; 303};
304 304
305void __init omap2_set_globals_343x(void) 305void __init omap2_set_globals_343x(void)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index a63b644ad305..b4057e271875 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2297,13 +2297,13 @@ static int __init omap_init_dma(void)
2297 int ch, r; 2297 int ch, r;
2298 2298
2299 if (cpu_class_is_omap1()) { 2299 if (cpu_class_is_omap1()) {
2300 omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP1_DMA_BASE); 2300 omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE);
2301 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; 2301 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
2302 } else if (cpu_is_omap24xx()) { 2302 } else if (cpu_is_omap24xx()) {
2303 omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP24XX_DMA4_BASE); 2303 omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE);
2304 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2304 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2305 } else if (cpu_is_omap34xx()) { 2305 } else if (cpu_is_omap34xx()) {
2306 omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP34XX_DMA4_BASE); 2306 omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
2307 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2307 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2308 } else { 2308 } else {
2309 pr_err("DMA init failed for unsupported omap\n"); 2309 pr_err("DMA init failed for unsupported omap\n");
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 743a4abcd85d..df61ad247dc2 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -693,7 +693,7 @@ int __init omap_dm_timer_init(void)
693 693
694 for (i = 0; i < dm_timer_count; i++) { 694 for (i = 0; i < dm_timer_count; i++) {
695 timer = &dm_timers[i]; 695 timer = &dm_timers[i];
696 timer->io_base = (void __iomem *)io_p2v(timer->phys_base); 696 timer->io_base = IO_ADDRESS(timer->phys_base);
697#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 697#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
698 if (cpu_class_is_omap2()) { 698 if (cpu_class_is_omap2()) {
699 char clk_name[16]; 699 char clk_name[16];
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index e3fd62d9a995..ee378d254cbd 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -19,11 +19,11 @@
19#include <mach/io.h> 19#include <mach/io.h>
20 20
21#define OMAP242X_CTRL_REGADDR(reg) \ 21#define OMAP242X_CTRL_REGADDR(reg) \
22 (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) 22 IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
23#define OMAP243X_CTRL_REGADDR(reg) \ 23#define OMAP243X_CTRL_REGADDR(reg) \
24 (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) 24 IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
25#define OMAP343X_CTRL_REGADDR(reg) \ 25#define OMAP343X_CTRL_REGADDR(reg) \
26 (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) 26 IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
27 27
28/* 28/*
29 * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for 29 * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index b9f57ce0ac15..dd0cf069431d 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -55,14 +55,13 @@
55 55
56#if defined(CONFIG_ARCH_OMAP1) 56#if defined(CONFIG_ARCH_OMAP1)
57 57
58#define IO_PHYS 0xFFFB0000 58#define IO_PHYS 0xFFFB0000
59#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ 59#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
60#define IO_SIZE 0x40000 60#define IO_SIZE 0x40000
61#define IO_VIRT (IO_PHYS - IO_OFFSET) 61#define IO_VIRT (IO_PHYS - IO_OFFSET)
62#define IO_ADDRESS(pa) ((pa) - IO_OFFSET) 62#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET)
63#define OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) 63#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET)
64#define io_p2v(pa) ((pa) - IO_OFFSET) 64#define io_v2p(va) ((va) + IO_OFFSET)
65#define io_v2p(va) ((va) + IO_OFFSET)
66 65
67#elif defined(CONFIG_ARCH_OMAP2) 66#elif defined(CONFIG_ARCH_OMAP2)
68 67
@@ -90,11 +89,10 @@
90 89
91#endif 90#endif
92 91
93#define IO_OFFSET 0x90000000 92#define IO_OFFSET 0x90000000
94#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 93#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
95#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 94#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
96#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 95#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
97#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
98 96
99/* DSP */ 97/* DSP */
100#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ 98#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */
@@ -149,9 +147,8 @@
149 147
150 148
151#define IO_OFFSET 0x90000000 149#define IO_OFFSET 0x90000000
152#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ 150#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
153#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ 151#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
154#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
155#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ 152#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
156 153
157/* DSP */ 154/* DSP */
@@ -167,7 +164,14 @@
167 164
168#endif 165#endif
169 166
170#ifndef __ASSEMBLER__ 167#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
168#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa))
169#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa))
170
171#ifdef __ASSEMBLER__
172#define IOMEM(x) x
173#else
174#define IOMEM(x) ((void __force __iomem *)(x))
171 175
172/* 176/*
173 * Functions to access the OMAP IO region 177 * Functions to access the OMAP IO region
@@ -178,13 +182,13 @@
178 * - DO NOT use hardcoded virtual addresses to allow changing the 182 * - DO NOT use hardcoded virtual addresses to allow changing the
179 * IO address space again if needed 183 * IO address space again if needed
180 */ 184 */
181#define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) 185#define omap_readb(a) __raw_readb(IO_ADDRESS(a))
182#define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) 186#define omap_readw(a) __raw_readw(IO_ADDRESS(a))
183#define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) 187#define omap_readl(a) __raw_readl(IO_ADDRESS(a))
184 188
185#define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) 189#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a))
186#define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) 190#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a))
187#define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) 191#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a))
188 192
189extern void omap1_map_common_io(void); 193extern void omap1_map_common_io(void);
190extern void omap1_init_common_hw(void); 194extern void omap1_init_common_hw(void);
diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h
index bfa09325a5ff..6063e9681de2 100644
--- a/arch/arm/plat-omap/include/mach/pm.h
+++ b/arch/arm/plat-omap/include/mach/pm.h
@@ -39,11 +39,11 @@
39 * Register and offset definitions to be used in PM assembler code 39 * Register and offset definitions to be used in PM assembler code
40 * ---------------------------------------------------------------------------- 40 * ----------------------------------------------------------------------------
41 */ 41 */
42#define CLKGEN_REG_ASM_BASE io_p2v(0xfffece00) 42#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00)
43#define ARM_IDLECT1_ASM_OFFSET 0x04 43#define ARM_IDLECT1_ASM_OFFSET 0x04
44#define ARM_IDLECT2_ASM_OFFSET 0x08 44#define ARM_IDLECT2_ASM_OFFSET 0x08
45 45
46#define TCMIF_ASM_BASE io_p2v(0xfffecc00) 46#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00)
47#define EMIFS_CONFIG_ASM_OFFSET 0x0c 47#define EMIFS_CONFIG_ASM_OFFSET 0x0c
48#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 48#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20
49 49
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index 787b7acec546..d908eb527c8d 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -63,9 +63,9 @@
63 */ 63 */
64 64
65 65
66#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) 66#define OMAP242X_SMS_REGADDR(reg) IO_ADDRESS(OMAP2420_SMS_BASE + reg)
67#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) 67#define OMAP243X_SMS_REGADDR(reg) IO_ADDRESS(OMAP243X_SMS_BASE + reg)
68#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) 68#define OMAP343X_SMS_REGADDR(reg) IO_ADDRESS(OMAP343X_SMS_BASE + reg)
69 69
70/* SMS register offsets - read/write with sms_{read,write}_reg() */ 70/* SMS register offsets - read/write with sms_{read,write}_reg() */
71 71
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index 58f624bd22e9..dfb72f5e4c96 100644
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -212,9 +212,9 @@ static void enable_rfbi_mode(int enable)
212 dispc_write_reg(DISPC_CONTROL, l); 212 dispc_write_reg(DISPC_CONTROL, l);
213 213
214 /* Set bypass mode in RFBI module */ 214 /* Set bypass mode in RFBI module */
215 l = __raw_readl(io_p2v(RFBI_CONTROL)); 215 l = __raw_readl(IO_ADDRESS(RFBI_CONTROL));
216 l |= enable ? 0 : (1 << 1); 216 l |= enable ? 0 : (1 << 1);
217 __raw_writel(l, io_p2v(RFBI_CONTROL)); 217 __raw_writel(l, IO_ADDRESS(RFBI_CONTROL));
218} 218}
219 219
220static void set_lcd_data_lines(int data_lines) 220static void set_lcd_data_lines(int data_lines)
@@ -1419,7 +1419,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
1419 } 1419 }
1420 1420
1421 /* L3 firewall setting: enable access to OCM RAM */ 1421 /* L3 firewall setting: enable access to OCM RAM */
1422 __raw_writel(0x402000b0, io_p2v(0x680050a0)); 1422 __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0));
1423 1423
1424 if ((r = alloc_palette_ram()) < 0) 1424 if ((r = alloc_palette_ram()) < 0)
1425 goto fail2; 1425 goto fail2;