diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-08-08 21:46:09 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-08-08 21:46:09 -0400 |
commit | dc836b5b6fcde95f750a4790d8200fabaf563dc9 (patch) | |
tree | 893613626de4794a7b13fe6793bdebc79420c433 | |
parent | 138b9dd1fd7b44176af4f3b672060c790b0eaf55 (diff) |
Revert "[PATCH] PCI: restore BAR values..."
Revert commit fec59a711eef002d4ef9eb8de09dd0a26986eb77, which is
breaking sparc64 that doesn't have a working pci_update_resource.
We'll re-do this after 2.6.13 when we'll do it all properly.
-rw-r--r-- | arch/sparc64/kernel/pci.c | 6 | ||||
-rw-r--r-- | drivers/pci/pci.c | 59 | ||||
-rw-r--r-- | drivers/pci/setup-res.c | 2 | ||||
-rw-r--r-- | include/linux/pci.h | 3 |
4 files changed, 5 insertions, 65 deletions
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c index 914e125d3971..bba140d98b1b 100644 --- a/arch/sparc64/kernel/pci.c +++ b/arch/sparc64/kernel/pci.c | |||
@@ -413,12 +413,6 @@ static int pci_assign_bus_resource(const struct pci_bus *bus, | |||
413 | return -EBUSY; | 413 | return -EBUSY; |
414 | } | 414 | } |
415 | 415 | ||
416 | void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno) | ||
417 | { | ||
418 | /* Not implemented for sparc64... */ | ||
419 | BUG(); | ||
420 | } | ||
421 | |||
422 | int pci_assign_resource(struct pci_dev *pdev, int resource) | 416 | int pci_assign_resource(struct pci_dev *pdev, int resource) |
423 | { | 417 | { |
424 | struct pcidev_cookie *pcp = pdev->sysdata; | 418 | struct pcidev_cookie *pcp = pdev->sysdata; |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 65ea7d25f691..1b34fc56067e 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -222,37 +222,6 @@ pci_find_parent_resource(const struct pci_dev *dev, struct resource *res) | |||
222 | } | 222 | } |
223 | 223 | ||
224 | /** | 224 | /** |
225 | * pci_restore_bars - restore a devices BAR values (e.g. after wake-up) | ||
226 | * @dev: PCI device to have its BARs restored | ||
227 | * | ||
228 | * Restore the BAR values for a given device, so as to make it | ||
229 | * accessible by its driver. | ||
230 | */ | ||
231 | void | ||
232 | pci_restore_bars(struct pci_dev *dev) | ||
233 | { | ||
234 | int i, numres; | ||
235 | |||
236 | switch (dev->hdr_type) { | ||
237 | case PCI_HEADER_TYPE_NORMAL: | ||
238 | numres = 6; | ||
239 | break; | ||
240 | case PCI_HEADER_TYPE_BRIDGE: | ||
241 | numres = 2; | ||
242 | break; | ||
243 | case PCI_HEADER_TYPE_CARDBUS: | ||
244 | numres = 1; | ||
245 | break; | ||
246 | default: | ||
247 | /* Should never get here, but just in case... */ | ||
248 | return; | ||
249 | } | ||
250 | |||
251 | for (i = 0; i < numres; i ++) | ||
252 | pci_update_resource(dev, &dev->resource[i], i); | ||
253 | } | ||
254 | |||
255 | /** | ||
256 | * pci_set_power_state - Set the power state of a PCI device | 225 | * pci_set_power_state - Set the power state of a PCI device |
257 | * @dev: PCI device to be suspended | 226 | * @dev: PCI device to be suspended |
258 | * @state: PCI power state (D0, D1, D2, D3hot, D3cold) we're entering | 227 | * @state: PCI power state (D0, D1, D2, D3hot, D3cold) we're entering |
@@ -270,7 +239,7 @@ int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t t); | |||
270 | int | 239 | int |
271 | pci_set_power_state(struct pci_dev *dev, pci_power_t state) | 240 | pci_set_power_state(struct pci_dev *dev, pci_power_t state) |
272 | { | 241 | { |
273 | int pm, need_restore = 0; | 242 | int pm; |
274 | u16 pmcsr, pmc; | 243 | u16 pmcsr, pmc; |
275 | 244 | ||
276 | /* bound the state we're entering */ | 245 | /* bound the state we're entering */ |
@@ -309,17 +278,14 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state) | |||
309 | return -EIO; | 278 | return -EIO; |
310 | } | 279 | } |
311 | 280 | ||
312 | pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr); | ||
313 | |||
314 | /* If we're in D3, force entire word to 0. | 281 | /* If we're in D3, force entire word to 0. |
315 | * This doesn't affect PME_Status, disables PME_En, and | 282 | * This doesn't affect PME_Status, disables PME_En, and |
316 | * sets PowerState to 0. | 283 | * sets PowerState to 0. |
317 | */ | 284 | */ |
318 | if (dev->current_state >= PCI_D3hot) { | 285 | if (dev->current_state >= PCI_D3hot) |
319 | if (!(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET)) | ||
320 | need_restore = 1; | ||
321 | pmcsr = 0; | 286 | pmcsr = 0; |
322 | } else { | 287 | else { |
288 | pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr); | ||
323 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | 289 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; |
324 | pmcsr |= state; | 290 | pmcsr |= state; |
325 | } | 291 | } |
@@ -342,22 +308,6 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state) | |||
342 | platform_pci_set_power_state(dev, state); | 308 | platform_pci_set_power_state(dev, state); |
343 | 309 | ||
344 | dev->current_state = state; | 310 | dev->current_state = state; |
345 | |||
346 | /* According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT | ||
347 | * INTERFACE SPECIFICATION, REV. 1.2", a device transitioning | ||
348 | * from D3hot to D0 _may_ perform an internal reset, thereby | ||
349 | * going to "D0 Uninitialized" rather than "D0 Initialized". | ||
350 | * For example, at least some versions of the 3c905B and the | ||
351 | * 3c556B exhibit this behaviour. | ||
352 | * | ||
353 | * At least some laptop BIOSen (e.g. the Thinkpad T21) leave | ||
354 | * devices in a D3hot state at boot. Consequently, we need to | ||
355 | * restore at least the BARs so that the device will be | ||
356 | * accessible to its driver. | ||
357 | */ | ||
358 | if (need_restore) | ||
359 | pci_restore_bars(dev); | ||
360 | |||
361 | return 0; | 311 | return 0; |
362 | } | 312 | } |
363 | 313 | ||
@@ -855,7 +805,6 @@ struct pci_dev *isa_bridge; | |||
855 | EXPORT_SYMBOL(isa_bridge); | 805 | EXPORT_SYMBOL(isa_bridge); |
856 | #endif | 806 | #endif |
857 | 807 | ||
858 | EXPORT_SYMBOL_GPL(pci_restore_bars); | ||
859 | EXPORT_SYMBOL(pci_enable_device_bars); | 808 | EXPORT_SYMBOL(pci_enable_device_bars); |
860 | EXPORT_SYMBOL(pci_enable_device); | 809 | EXPORT_SYMBOL(pci_enable_device); |
861 | EXPORT_SYMBOL(pci_disable_device); | 810 | EXPORT_SYMBOL(pci_disable_device); |
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 589486704ce3..84eedc965688 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c | |||
@@ -26,7 +26,7 @@ | |||
26 | #include "pci.h" | 26 | #include "pci.h" |
27 | 27 | ||
28 | 28 | ||
29 | void | 29 | static void |
30 | pci_update_resource(struct pci_dev *dev, struct resource *res, int resno) | 30 | pci_update_resource(struct pci_dev *dev, struct resource *res, int resno) |
31 | { | 31 | { |
32 | struct pci_bus_region region; | 32 | struct pci_bus_region region; |
diff --git a/include/linux/pci.h b/include/linux/pci.h index 98bdd95fcee9..8621cf42b46f 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h | |||
@@ -225,7 +225,6 @@ | |||
225 | #define PCI_PM_CAP_PME_D3cold 0x8000 /* PME# from D3 (cold) */ | 225 | #define PCI_PM_CAP_PME_D3cold 0x8000 /* PME# from D3 (cold) */ |
226 | #define PCI_PM_CTRL 4 /* PM control and status register */ | 226 | #define PCI_PM_CTRL 4 /* PM control and status register */ |
227 | #define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */ | 227 | #define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */ |
228 | #define PCI_PM_CTRL_NO_SOFT_RESET 0x0004 /* No reset for D3hot->D0 */ | ||
229 | #define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */ | 228 | #define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */ |
230 | #define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */ | 229 | #define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */ |
231 | #define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */ | 230 | #define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */ |
@@ -817,9 +816,7 @@ int pci_set_mwi(struct pci_dev *dev); | |||
817 | void pci_clear_mwi(struct pci_dev *dev); | 816 | void pci_clear_mwi(struct pci_dev *dev); |
818 | int pci_set_dma_mask(struct pci_dev *dev, u64 mask); | 817 | int pci_set_dma_mask(struct pci_dev *dev, u64 mask); |
819 | int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask); | 818 | int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask); |
820 | void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno); | ||
821 | int pci_assign_resource(struct pci_dev *dev, int i); | 819 | int pci_assign_resource(struct pci_dev *dev, int i); |
822 | void pci_restore_bars(struct pci_dev *dev); | ||
823 | 820 | ||
824 | /* ROM control related routines */ | 821 | /* ROM control related routines */ |
825 | void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size); | 822 | void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size); |