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authorZachary Amsden <zach@vmware.com>2006-10-01 02:29:36 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-01 03:39:34 -0400
commitd6d861e3c963b4077c83e078e3e300c4b81f93e7 (patch)
tree842071ac905575aa0ea8bedd3a1ac5db29416bcf
parent23002d88be309a7c78db69363c9d933a29a3b0bb (diff)
[PATCH] paravirt: optimize ptep establish for pae
The ptep_establish macro is only used on user-level PTEs, for P->P mapping changes. Since these always happen under protection of the pagetable lock, the strong synchronization of a 64-bit cmpxchg is not needed, in fact, not even a lock prefix needs to be used. We can simply instead clear the P-bit, followed by a normal set. The write ordering is still important to avoid the possibility of the TLB snooping a partially written PTE and getting a bad mapping installed. Signed-off-by: Zachary Amsden <zach@vmware.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--include/asm-i386/pgtable-2level.h1
-rw-r--r--include/asm-i386/pgtable-3level.h15
-rw-r--r--include/asm-i386/pgtable.h11
3 files changed, 27 insertions, 0 deletions
diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-i386/pgtable-2level.h
index 201c86a6711e..8d8d3b9ecdb0 100644
--- a/include/asm-i386/pgtable-2level.h
+++ b/include/asm-i386/pgtable-2level.h
@@ -16,6 +16,7 @@
16#define set_pte(pteptr, pteval) (*(pteptr) = pteval) 16#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
17#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 17#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
18#define set_pte_atomic(pteptr, pteval) set_pte(pteptr,pteval) 18#define set_pte_atomic(pteptr, pteval) set_pte(pteptr,pteval)
19#define set_pte_present(mm,addr,ptep,pteval) set_pte_at(mm,addr,ptep,pteval)
19#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval)) 20#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval))
20 21
21#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) 22#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
index 0d899173232e..7c58debdb39e 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-i386/pgtable-3level.h
@@ -58,6 +58,21 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
58} 58}
59#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 59#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
60 60
61/*
62 * Since this is only called on user PTEs, and the page fault handler
63 * must handle the already racy situation of simultaneous page faults,
64 * we are justified in merely clearing the PTE present bit, followed
65 * by a set. The ordering here is important.
66 */
67static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
68{
69 ptep->pte_low = 0;
70 smp_wmb();
71 ptep->pte_high = pte.pte_high;
72 smp_wmb();
73 ptep->pte_low = pte.pte_low;
74}
75
61#define __HAVE_ARCH_SET_PTE_ATOMIC 76#define __HAVE_ARCH_SET_PTE_ATOMIC
62#define set_pte_atomic(pteptr,pteval) \ 77#define set_pte_atomic(pteptr,pteval) \
63 set_64bit((unsigned long long *)(pteptr),pte_val(pteval)) 78 set_64bit((unsigned long long *)(pteptr),pte_val(pteval))
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index ee9696d2f67f..8cb708a6bed0 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -269,6 +269,17 @@ do { \
269#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY 269#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
270#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 270#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
271 271
272/*
273 * Rules for using ptep_establish: the pte MUST be a user pte, and
274 * must be a present->present transition.
275 */
276#define __HAVE_ARCH_PTEP_ESTABLISH
277#define ptep_establish(vma, address, ptep, pteval) \
278do { \
279 set_pte_present((vma)->vm_mm, address, ptep, pteval); \
280 flush_tlb_page(vma, address); \
281} while (0)
282
272#define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH 283#define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
273#define ptep_clear_flush_dirty(vma, address, ptep) \ 284#define ptep_clear_flush_dirty(vma, address, ptep) \
274({ \ 285({ \