diff options
author | Andrew Morton <akpm@osdl.org> | 2006-11-08 22:56:24 -0500 |
---|---|---|
committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-11-15 17:40:50 -0500 |
commit | bf4713418b9d8543e7b64bf6c742f1959828033e (patch) | |
tree | 202cb83b73c6536895fa9cda27296b44904e9880 | |
parent | 08157cd0787004e2ebf9ee8cc92257244da53848 (diff) |
[SCSI] revert "[SCSI] ips soft lockup during reset/initialization"
Revert 15084a4a63bc300c18b28a8a9afac870c552abce - it caused a
scheduling-inside-spinlock bug.
Cc: Nishanth Aravamudan <nacc@us.ibm.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Cc: Jack Hammer <jack_hammer@adaptec.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
-rw-r--r-- | drivers/scsi/ips.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/scsi/ips.c b/drivers/scsi/ips.c index f06a06ae6092..8b704f73055a 100644 --- a/drivers/scsi/ips.c +++ b/drivers/scsi/ips.c | |||
@@ -5001,7 +5001,7 @@ ips_init_copperhead(ips_ha_t * ha) | |||
5001 | break; | 5001 | break; |
5002 | 5002 | ||
5003 | /* Delay for 1 Second */ | 5003 | /* Delay for 1 Second */ |
5004 | msleep(IPS_ONE_SEC); | 5004 | MDELAY(IPS_ONE_SEC); |
5005 | } | 5005 | } |
5006 | 5006 | ||
5007 | if (j >= 45) | 5007 | if (j >= 45) |
@@ -5027,7 +5027,7 @@ ips_init_copperhead(ips_ha_t * ha) | |||
5027 | break; | 5027 | break; |
5028 | 5028 | ||
5029 | /* Delay for 1 Second */ | 5029 | /* Delay for 1 Second */ |
5030 | msleep(IPS_ONE_SEC); | 5030 | MDELAY(IPS_ONE_SEC); |
5031 | } | 5031 | } |
5032 | 5032 | ||
5033 | if (j >= 240) | 5033 | if (j >= 240) |
@@ -5045,7 +5045,7 @@ ips_init_copperhead(ips_ha_t * ha) | |||
5045 | break; | 5045 | break; |
5046 | 5046 | ||
5047 | /* Delay for 1 Second */ | 5047 | /* Delay for 1 Second */ |
5048 | msleep(IPS_ONE_SEC); | 5048 | MDELAY(IPS_ONE_SEC); |
5049 | } | 5049 | } |
5050 | 5050 | ||
5051 | if (i >= 240) | 5051 | if (i >= 240) |
@@ -5095,7 +5095,7 @@ ips_init_copperhead_memio(ips_ha_t * ha) | |||
5095 | break; | 5095 | break; |
5096 | 5096 | ||
5097 | /* Delay for 1 Second */ | 5097 | /* Delay for 1 Second */ |
5098 | msleep(IPS_ONE_SEC); | 5098 | MDELAY(IPS_ONE_SEC); |
5099 | } | 5099 | } |
5100 | 5100 | ||
5101 | if (j >= 45) | 5101 | if (j >= 45) |
@@ -5121,7 +5121,7 @@ ips_init_copperhead_memio(ips_ha_t * ha) | |||
5121 | break; | 5121 | break; |
5122 | 5122 | ||
5123 | /* Delay for 1 Second */ | 5123 | /* Delay for 1 Second */ |
5124 | msleep(IPS_ONE_SEC); | 5124 | MDELAY(IPS_ONE_SEC); |
5125 | } | 5125 | } |
5126 | 5126 | ||
5127 | if (j >= 240) | 5127 | if (j >= 240) |
@@ -5139,7 +5139,7 @@ ips_init_copperhead_memio(ips_ha_t * ha) | |||
5139 | break; | 5139 | break; |
5140 | 5140 | ||
5141 | /* Delay for 1 Second */ | 5141 | /* Delay for 1 Second */ |
5142 | msleep(IPS_ONE_SEC); | 5142 | MDELAY(IPS_ONE_SEC); |
5143 | } | 5143 | } |
5144 | 5144 | ||
5145 | if (i >= 240) | 5145 | if (i >= 240) |
@@ -5191,7 +5191,7 @@ ips_init_morpheus(ips_ha_t * ha) | |||
5191 | break; | 5191 | break; |
5192 | 5192 | ||
5193 | /* Delay for 1 Second */ | 5193 | /* Delay for 1 Second */ |
5194 | msleep(IPS_ONE_SEC); | 5194 | MDELAY(IPS_ONE_SEC); |
5195 | } | 5195 | } |
5196 | 5196 | ||
5197 | if (i >= 45) { | 5197 | if (i >= 45) { |
@@ -5217,7 +5217,7 @@ ips_init_morpheus(ips_ha_t * ha) | |||
5217 | if (Post != 0x4F00) | 5217 | if (Post != 0x4F00) |
5218 | break; | 5218 | break; |
5219 | /* Delay for 1 Second */ | 5219 | /* Delay for 1 Second */ |
5220 | msleep(IPS_ONE_SEC); | 5220 | MDELAY(IPS_ONE_SEC); |
5221 | } | 5221 | } |
5222 | 5222 | ||
5223 | if (i >= 120) { | 5223 | if (i >= 120) { |
@@ -5247,7 +5247,7 @@ ips_init_morpheus(ips_ha_t * ha) | |||
5247 | break; | 5247 | break; |
5248 | 5248 | ||
5249 | /* Delay for 1 Second */ | 5249 | /* Delay for 1 Second */ |
5250 | msleep(IPS_ONE_SEC); | 5250 | MDELAY(IPS_ONE_SEC); |
5251 | } | 5251 | } |
5252 | 5252 | ||
5253 | if (i >= 240) { | 5253 | if (i >= 240) { |
@@ -5307,12 +5307,12 @@ ips_reset_copperhead(ips_ha_t * ha) | |||
5307 | outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR); | 5307 | outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR); |
5308 | 5308 | ||
5309 | /* Delay for 1 Second */ | 5309 | /* Delay for 1 Second */ |
5310 | msleep(IPS_ONE_SEC); | 5310 | MDELAY(IPS_ONE_SEC); |
5311 | 5311 | ||
5312 | outb(0, ha->io_addr + IPS_REG_SCPR); | 5312 | outb(0, ha->io_addr + IPS_REG_SCPR); |
5313 | 5313 | ||
5314 | /* Delay for 1 Second */ | 5314 | /* Delay for 1 Second */ |
5315 | msleep(IPS_ONE_SEC); | 5315 | MDELAY(IPS_ONE_SEC); |
5316 | 5316 | ||
5317 | if ((*ha->func.init) (ha)) | 5317 | if ((*ha->func.init) (ha)) |
5318 | break; | 5318 | break; |
@@ -5352,12 +5352,12 @@ ips_reset_copperhead_memio(ips_ha_t * ha) | |||
5352 | writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR); | 5352 | writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR); |
5353 | 5353 | ||
5354 | /* Delay for 1 Second */ | 5354 | /* Delay for 1 Second */ |
5355 | msleep(IPS_ONE_SEC); | 5355 | MDELAY(IPS_ONE_SEC); |
5356 | 5356 | ||
5357 | writeb(0, ha->mem_ptr + IPS_REG_SCPR); | 5357 | writeb(0, ha->mem_ptr + IPS_REG_SCPR); |
5358 | 5358 | ||
5359 | /* Delay for 1 Second */ | 5359 | /* Delay for 1 Second */ |
5360 | msleep(IPS_ONE_SEC); | 5360 | MDELAY(IPS_ONE_SEC); |
5361 | 5361 | ||
5362 | if ((*ha->func.init) (ha)) | 5362 | if ((*ha->func.init) (ha)) |
5363 | break; | 5363 | break; |
@@ -5398,7 +5398,7 @@ ips_reset_morpheus(ips_ha_t * ha) | |||
5398 | writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR); | 5398 | writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR); |
5399 | 5399 | ||
5400 | /* Delay for 5 Seconds */ | 5400 | /* Delay for 5 Seconds */ |
5401 | msleep(5 * IPS_ONE_SEC); | 5401 | MDELAY(5 * IPS_ONE_SEC); |
5402 | 5402 | ||
5403 | /* Do a PCI config read to wait for adapter */ | 5403 | /* Do a PCI config read to wait for adapter */ |
5404 | pci_read_config_byte(ha->pcidev, 4, &junk); | 5404 | pci_read_config_byte(ha->pcidev, 4, &junk); |