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authorAuke Kok <auke-jan.h.kok@intel.com>2007-06-08 18:46:30 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2007-07-11 19:02:09 -0400
commitb8a3a5214d7cc115f1ca3a3967b7229d97c46f4a (patch)
tree221d50091530cb442496e09591b3bf7ac06e57b4
parent56906c612e10b5e32a48ccbe8a3c08ab6acf5a28 (diff)
PCI: read revision ID by default
Currently there are 97 occurrences where drivers need the pci revision ID. We can do this once for all devices. Even the pci subsystem needs the revision several times for quirks. The extra u8 member pads out nicely in the pci_dev struct. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--arch/powerpc/kernel/pci_64.c2
-rw-r--r--arch/sparc64/kernel/pci.c1
-rw-r--r--drivers/pci/probe.c1
-rw-r--r--include/linux/pci.h1
4 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 96d393c2da02..e3009a43ac56 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -367,8 +367,10 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
367 sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus), 367 sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
368 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); 368 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
369 dev->class = get_int_prop(node, "class-code", 0); 369 dev->class = get_int_prop(node, "class-code", 0);
370 dev->revision = get_int_prop(node, "revision-id", 0);
370 371
371 DBG(" class: 0x%x\n", dev->class); 372 DBG(" class: 0x%x\n", dev->class);
373 DBG(" revision: 0x%x\n", dev->revision);
372 374
373 dev->current_state = 4; /* unknown power state */ 375 dev->current_state = 4; /* unknown power state */
374 dev->error_state = pci_channel_io_normal; 376 dev->error_state = pci_channel_io_normal;
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index 81f4a5ea05f7..55ad1b899bb8 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -448,6 +448,7 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
448 */ 448 */
449 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class); 449 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
450 dev->class = class >> 8; 450 dev->class = class >> 8;
451 dev->revision = class & 0xff;
451 452
452 sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus), 453 sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
453 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); 454 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 9cd983acba8c..8802fcb4aaf0 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -702,6 +702,7 @@ static int pci_setup_device(struct pci_dev * dev)
702 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); 702 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
703 703
704 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class); 704 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
705 dev->revision = class & 0xff;
705 class >>= 8; /* upper 3 bytes */ 706 class >>= 8; /* upper 3 bytes */
706 dev->class = class; 707 dev->class = class;
707 class >>= 8; 708 class >>= 8;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 5be420ac6303..45332440a2e6 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -139,6 +139,7 @@ struct pci_dev {
139 unsigned short subsystem_vendor; 139 unsigned short subsystem_vendor;
140 unsigned short subsystem_device; 140 unsigned short subsystem_device;
141 unsigned int class; /* 3 bytes: (base,sub,prog-if) */ 141 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
142 u8 revision; /* PCI revision, low byte of class word */
142 u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 143 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
143 u8 rom_base_reg; /* which config register controls the ROM */ 144 u8 rom_base_reg; /* which config register controls the ROM */
144 u8 pin; /* which interrupt pin this device uses */ 145 u8 pin; /* which interrupt pin this device uses */