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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-18 19:00:02 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-18 19:00:02 -0400
commita9e82d3a02247af6b729be0a963862d70cb25bf9 (patch)
tree8f1f02bf0f1371391f2077a270bc32c0beddcc6a
parent58f9b52ee8712283f7ffedb661df678c61e88a91 (diff)
parent85ad93ad56f4baf52e7c40f2e01c4df8e14d4c9c (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6: (37 commits) ide: set drive->autotune in ide_pci_setup_ports() triflex: always tune PIO opti621: always tune PIO cy82c693: always tune PIO cs5520: always tune PIO alim15x3: always tune PIO ide: add IDE_HFLAG_LEGACY_IRQS host flag ide: add IDE_HFLAG_SERIALIZE host flag ide: add IDE_HFLAG_ERROR_STOPS_FIFO host flag piix: add DECLARE_ICH_DEV() macro pdc202xx_old: add DECLARE_PDC2026X_DEV() macro pdc202xx_new: add DECLARE_PDCNEW_DEV() macro aec62xx: no need to disable UDMA in ->init_hwif method for ATP850UF ide: remove .init_setup from ide_pci_device_t serverworks: remove ->init_setup scc_pata: remove ->init_setup pdc202xx_old: remove ->init_setup pdc202xx_new: remove ->init_setup hpt366: remove ->init_setup cmd64x: remove ->init_setup ...
Diffstat
-rw-r--r--drivers/ide/arm/icside.c1
-rw-r--r--drivers/ide/cris/ide-cris.c1
-rw-r--r--drivers/ide/ide-disk.c8
-rw-r--r--drivers/ide/ide-dma.c12
-rw-r--r--drivers/ide/ide-io.c3
-rw-r--r--drivers/ide/ide-probe.c3
-rw-r--r--drivers/ide/ide.c4
-rw-r--r--drivers/ide/mips/au1xxx-ide.c3
-rw-r--r--drivers/ide/pci/aec62xx.c97
-rw-r--r--drivers/ide/pci/alim15x3.c30
-rw-r--r--drivers/ide/pci/amd74xx.c31
-rw-r--r--drivers/ide/pci/atiixp.c21
-rw-r--r--drivers/ide/pci/cmd64x.c85
-rw-r--r--drivers/ide/pci/cs5520.c31
-rw-r--r--drivers/ide/pci/cs5530.c18
-rw-r--r--drivers/ide/pci/cs5535.c15
-rw-r--r--drivers/ide/pci/cy82c693.c18
-rw-r--r--drivers/ide/pci/generic.c148
-rw-r--r--drivers/ide/pci/hpt34x.c56
-rw-r--r--drivers/ide/pci/hpt366.c376
-rw-r--r--drivers/ide/pci/it8213.c16
-rw-r--r--drivers/ide/pci/it821x.c22
-rw-r--r--drivers/ide/pci/jmicron.c12
-rw-r--r--drivers/ide/pci/ns87415.c6
-rw-r--r--drivers/ide/pci/opti621.c26
-rw-r--r--drivers/ide/pci/pdc202xx_new.c201
-rw-r--r--drivers/ide/pci/pdc202xx_old.c135
-rw-r--r--drivers/ide/pci/piix.c167
-rw-r--r--drivers/ide/pci/rz1000.c3
-rw-r--r--drivers/ide/pci/sc1200.c19
-rw-r--r--drivers/ide/pci/scc_pata.c26
-rw-r--r--drivers/ide/pci/serverworks.c86
-rw-r--r--drivers/ide/pci/sgiioc4.c11
-rw-r--r--drivers/ide/pci/siimage.c35
-rw-r--r--drivers/ide/pci/sis5513.c14
-rw-r--r--drivers/ide/pci/sl82c105.c12
-rw-r--r--drivers/ide/pci/slc90e66.c17
-rw-r--r--drivers/ide/pci/tc86c001.c26
-rw-r--r--drivers/ide/pci/triflex.c12
-rw-r--r--drivers/ide/pci/trm290.c9
-rw-r--r--drivers/ide/pci/via82cxxx.c28
-rw-r--r--drivers/ide/ppc/pmac.c1
-rw-r--r--drivers/ide/setup-pci.c68
-rw-r--r--include/linux/ide.h58
44 files changed, 760 insertions, 1211 deletions
diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c
index e4875cef78bb..3af33fbf1f88 100644
--- a/drivers/ide/arm/icside.c
+++ b/drivers/ide/arm/icside.c
@@ -415,7 +415,6 @@ static void icside_dma_lost_irq(ide_drive_t *drive)
415 415
416static void icside_dma_init(ide_hwif_t *hwif) 416static void icside_dma_init(ide_hwif_t *hwif)
417{ 417{
418 hwif->atapi_dma = 1;
419 hwif->mwdma_mask = 7; /* MW0..2 */ 418 hwif->mwdma_mask = 7; /* MW0..2 */
420 hwif->swdma_mask = 7; /* SW0..2 */ 419 hwif->swdma_mask = 7; /* SW0..2 */
421 420
diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c
index 06c75f18eb88..9a96a10ba9d3 100644
--- a/drivers/ide/cris/ide-cris.c
+++ b/drivers/ide/cris/ide-cris.c
@@ -805,6 +805,7 @@ init_e100_ide (void)
805 hwif->dma_host_on = &cris_dma_on; 805 hwif->dma_host_on = &cris_dma_on;
806 hwif->dma_off_quietly = &cris_dma_off; 806 hwif->dma_off_quietly = &cris_dma_off;
807 hwif->cbl = ATA_CBL_PATA40; 807 hwif->cbl = ATA_CBL_PATA40;
808 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
808 hwif->pio_mask = ATA_PIO4, 809 hwif->pio_mask = ATA_PIO4,
809 hwif->drives[0].autotune = 1; 810 hwif->drives[0].autotune = 1;
810 hwif->drives[1].autotune = 1; 811 hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/ide-disk.c b/drivers/ide/ide-disk.c
index 92177ca48b4d..2722d9165b6b 100644
--- a/drivers/ide/ide-disk.c
+++ b/drivers/ide/ide-disk.c
@@ -169,7 +169,7 @@ static ide_startstop_t __ide_do_rw_disk(ide_drive_t *drive, struct request *rq,
169 169
170 nsectors.all = (u16) rq->nr_sectors; 170 nsectors.all = (u16) rq->nr_sectors;
171 171
172 if (hwif->no_lba48_dma && lba48 && dma) { 172 if ((hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA) && lba48 && dma) {
173 if (block + rq->nr_sectors > 1ULL << 28) 173 if (block + rq->nr_sectors > 1ULL << 28)
174 dma = 0; 174 dma = 0;
175 else 175 else
@@ -856,7 +856,7 @@ static int set_lba_addressing(ide_drive_t *drive, int arg)
856 856
857 drive->addressing = 0; 857 drive->addressing = 0;
858 858
859 if (HWIF(drive)->no_lba48) 859 if (drive->hwif->host_flags & IDE_HFLAG_NO_LBA48)
860 return 0; 860 return 0;
861 861
862 if (!idedisk_supports_lba48(drive->id)) 862 if (!idedisk_supports_lba48(drive->id))
@@ -889,6 +889,7 @@ static inline void idedisk_add_settings(ide_drive_t *drive) { ; }
889 889
890static void idedisk_setup (ide_drive_t *drive) 890static void idedisk_setup (ide_drive_t *drive)
891{ 891{
892 ide_hwif_t *hwif = drive->hwif;
892 struct hd_driveid *id = drive->id; 893 struct hd_driveid *id = drive->id;
893 unsigned long long capacity; 894 unsigned long long capacity;
894 895
@@ -909,7 +910,6 @@ static void idedisk_setup (ide_drive_t *drive)
909 (void)set_lba_addressing(drive, 1); 910 (void)set_lba_addressing(drive, 1);
910 911
911 if (drive->addressing == 1) { 912 if (drive->addressing == 1) {
912 ide_hwif_t *hwif = HWIF(drive);
913 int max_s = 2048; 913 int max_s = 2048;
914 914
915 if (max_s > hwif->rqsize) 915 if (max_s > hwif->rqsize)
@@ -932,7 +932,7 @@ static void idedisk_setup (ide_drive_t *drive)
932 drive->capacity64 = 1ULL << 28; 932 drive->capacity64 = 1ULL << 28;
933 } 933 }
934 934
935 if (drive->hwif->no_lba48_dma && drive->addressing) { 935 if ((hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA) && drive->addressing) {
936 if (drive->capacity64 > 1ULL << 28) { 936 if (drive->capacity64 > 1ULL << 28) {
937 printk(KERN_INFO "%s: cannot use LBA48 DMA - PIO mode will" 937 printk(KERN_INFO "%s: cannot use LBA48 DMA - PIO mode will"
938 " be used for accessing sectors > %u\n", 938 " be used for accessing sectors > %u\n",
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c
index bc57ce6bf0b3..80b4f17f3941 100644
--- a/drivers/ide/ide-dma.c
+++ b/drivers/ide/ide-dma.c
@@ -338,8 +338,10 @@ static int config_drive_for_dma (ide_drive_t *drive)
338 ide_hwif_t *hwif = drive->hwif; 338 ide_hwif_t *hwif = drive->hwif;
339 struct hd_driveid *id = drive->id; 339 struct hd_driveid *id = drive->id;
340 340
341 if (drive->media != ide_disk && hwif->atapi_dma == 0) 341 if (drive->media != ide_disk) {
342 return 0; 342 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
343 return -1;
344 }
343 345
344 /* 346 /*
345 * Enable DMA on any drive that has 347 * Enable DMA on any drive that has
@@ -726,8 +728,10 @@ u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
726 int x, i; 728 int x, i;
727 u8 mode = 0; 729 u8 mode = 0;
728 730
729 if (drive->media != ide_disk && hwif->atapi_dma == 0) 731 if (drive->media != ide_disk) {
730 return 0; 732 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
733 return 0;
734 }
731 735
732 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) { 736 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
733 if (req_mode < xfer_mode_bases[i]) 737 if (req_mode < xfer_mode_bases[i])
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index ec835e37e729..5c8b008676fb 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -484,7 +484,8 @@ static ide_startstop_t ide_ata_error(ide_drive_t *drive, struct request *rq, u8
484 } 484 }
485 } 485 }
486 486
487 if ((stat & DRQ_STAT) && rq_data_dir(rq) == READ && hwif->err_stops_fifo == 0) 487 if ((stat & DRQ_STAT) && rq_data_dir(rq) == READ &&
488 (hwif->host_flags & IDE_HFLAG_ERROR_STOPS_FIFO) == 0)
488 try_to_flush_leftover_data(drive); 489 try_to_flush_leftover_data(drive);
489 490
490 if (rq->errors >= ERROR_MAX || blk_noretry_request(rq)) { 491 if (rq->errors >= ERROR_MAX || blk_noretry_request(rq)) {
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 3c945d64d845..e294c7415c27 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -951,7 +951,8 @@ static int ide_init_queue(ide_drive_t *drive)
951 blk_queue_segment_boundary(q, 0xffff); 951 blk_queue_segment_boundary(q, 0xffff);
952 952
953 if (!hwif->rqsize) { 953 if (!hwif->rqsize) {
954 if (hwif->no_lba48 || hwif->no_lba48_dma) 954 if ((hwif->host_flags & IDE_HFLAG_NO_LBA48) ||
955 (hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA))
955 hwif->rqsize = 256; 956 hwif->rqsize = 256;
956 else 957 else
957 hwif->rqsize = 65536; 958 hwif->rqsize = 65536;
diff --git a/drivers/ide/ide.c b/drivers/ide/ide.c
index 5b090662683e..961e6c897286 100644
--- a/drivers/ide/ide.c
+++ b/drivers/ide/ide.c
@@ -134,8 +134,6 @@ static void init_hwif_data(ide_hwif_t *hwif, unsigned int index)
134 134
135 hwif->bus_state = BUSSTATE_ON; 135 hwif->bus_state = BUSSTATE_ON;
136 136
137 hwif->atapi_dma = 0; /* disable all atapi dma */
138
139 init_completion(&hwif->gendev_rel_comp); 137 init_completion(&hwif->gendev_rel_comp);
140 138
141 default_hwif_iops(hwif); 139 default_hwif_iops(hwif);
@@ -379,7 +377,6 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)
379 377
380 hwif->pio_mask = tmp_hwif->pio_mask; 378 hwif->pio_mask = tmp_hwif->pio_mask;
381 379
382 hwif->atapi_dma = tmp_hwif->atapi_dma;
383 hwif->ultra_mask = tmp_hwif->ultra_mask; 380 hwif->ultra_mask = tmp_hwif->ultra_mask;
384 hwif->mwdma_mask = tmp_hwif->mwdma_mask; 381 hwif->mwdma_mask = tmp_hwif->mwdma_mask;
385 hwif->swdma_mask = tmp_hwif->swdma_mask; 382 hwif->swdma_mask = tmp_hwif->swdma_mask;
@@ -440,7 +437,6 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)
440 437
441 hwif->mmio = tmp_hwif->mmio; 438 hwif->mmio = tmp_hwif->mmio;
442 hwif->rqsize = tmp_hwif->rqsize; 439 hwif->rqsize = tmp_hwif->rqsize;
443 hwif->no_lba48 = tmp_hwif->no_lba48;
444 440
445#ifndef CONFIG_BLK_DEV_IDECS 441#ifndef CONFIG_BLK_DEV_IDECS
446 hwif->irq = tmp_hwif->irq; 442 hwif->irq = tmp_hwif->irq;
diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c
index 47c035a550e3..2f322d7e881b 100644
--- a/drivers/ide/mips/au1xxx-ide.c
+++ b/drivers/ide/mips/au1xxx-ide.c
@@ -699,9 +699,6 @@ static int au_ide_probe(struct device *dev)
699 hwif->dma_host_on = &auide_dma_host_on; 699 hwif->dma_host_on = &auide_dma_host_on;
700 hwif->dma_lost_irq = &auide_dma_lost_irq; 700 hwif->dma_lost_irq = &auide_dma_lost_irq;
701 hwif->ide_dma_on = &auide_dma_on; 701 hwif->ide_dma_on = &auide_dma_on;
702
703 hwif->atapi_dma = 1;
704
705#else /* !CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */ 702#else /* !CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
706 hwif->channel = 0; 703 hwif->channel = 0;
707 hwif->hold = 1; 704 hwif->hold = 1;
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index 3a4c2c26a77e..b3dc12a70d51 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/aec62xx.c Version 0.25 Aug 1, 2007 2 * linux/drivers/ide/pci/aec62xx.c Version 0.26 Sep 1, 2007
3 * 3 *
4 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
@@ -184,34 +184,23 @@ static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const ch
184static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif) 184static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
185{ 185{
186 struct pci_dev *dev = hwif->pci_dev; 186 struct pci_dev *dev = hwif->pci_dev;
187 u8 reg54 = 0, mask = hwif->channel ? 0xf0 : 0x0f;
188 unsigned long flags;
189 187
190 hwif->set_pio_mode = &aec_set_pio_mode; 188 hwif->set_pio_mode = &aec_set_pio_mode;
191 189
192 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { 190 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF)
193 if(hwif->mate)
194 hwif->mate->serialized = hwif->serialized = 1;
195 hwif->set_dma_mode = &aec6210_set_mode; 191 hwif->set_dma_mode = &aec6210_set_mode;
196 } else 192 else
197 hwif->set_dma_mode = &aec6260_set_mode; 193 hwif->set_dma_mode = &aec6260_set_mode;
198 194
199 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
200
201 if (hwif->dma_base == 0) 195 if (hwif->dma_base == 0)
202 return; 196 return;
203 197
204 hwif->ultra_mask = hwif->cds->udma_mask;
205 hwif->mwdma_mask = 0x07;
206
207 hwif->dma_lost_irq = &aec62xx_dma_lost_irq; 198 hwif->dma_lost_irq = &aec62xx_dma_lost_irq;
208 199
209 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { 200 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF)
210 spin_lock_irqsave(&ide_lock, flags); 201 return;
211 pci_read_config_byte (dev, 0x54, &reg54); 202
212 pci_write_config_byte(dev, 0x54, (reg54 & ~mask)); 203 if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
213 spin_unlock_irqrestore(&ide_lock, flags);
214 } else if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
215 u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01; 204 u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01;
216 205
217 pci_read_config_byte(hwif->pci_dev, 0x49, &ata66); 206 pci_read_config_byte(hwif->pci_dev, 0x49, &ata66);
@@ -220,73 +209,53 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
220 } 209 }
221} 210}
222 211
223static int __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d)
224{
225 return ide_setup_pci_device(dev, d);
226}
227
228static int __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d)
229{
230 unsigned long dma_base = pci_resource_start(dev, 4);
231
232 if (inb(dma_base + 2) & 0x10) {
233 d->name = (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R) ?
234 "AEC6880R" : "AEC6880";
235 d->udma_mask = 0x7f; /* udma0-6 */
236 }
237
238 return ide_setup_pci_device(dev, d);
239}
240
241static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { 212static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
242 { /* 0 */ 213 { /* 0 */
243 .name = "AEC6210", 214 .name = "AEC6210",
244 .init_setup = init_setup_aec62xx,
245 .init_chipset = init_chipset_aec62xx, 215 .init_chipset = init_chipset_aec62xx,
246 .init_hwif = init_hwif_aec62xx, 216 .init_hwif = init_hwif_aec62xx,
247 .autodma = AUTODMA,
248 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 217 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
249 .bootable = OFF_BOARD, 218 .host_flags = IDE_HFLAG_SERIALIZE |
219 IDE_HFLAG_NO_ATAPI_DMA |
220 IDE_HFLAG_OFF_BOARD,
250 .pio_mask = ATA_PIO4, 221 .pio_mask = ATA_PIO4,
251 .udma_mask = 0x07, /* udma0-2 */ 222 .mwdma_mask = ATA_MWDMA2,
223 .udma_mask = ATA_UDMA2,
252 },{ /* 1 */ 224 },{ /* 1 */
253 .name = "AEC6260", 225 .name = "AEC6260",
254 .init_setup = init_setup_aec62xx,
255 .init_chipset = init_chipset_aec62xx, 226 .init_chipset = init_chipset_aec62xx,
256 .init_hwif = init_hwif_aec62xx, 227 .init_hwif = init_hwif_aec62xx,
257 .autodma = NOAUTODMA, 228 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA |
258 .bootable = OFF_BOARD, 229 IDE_HFLAG_OFF_BOARD,
259 .pio_mask = ATA_PIO4, 230 .pio_mask = ATA_PIO4,
260 .udma_mask = 0x1f, /* udma0-4 */ 231 .mwdma_mask = ATA_MWDMA2,
232 .udma_mask = ATA_UDMA4,
261 },{ /* 2 */ 233 },{ /* 2 */
262 .name = "AEC6260R", 234 .name = "AEC6260R",
263 .init_setup = init_setup_aec62xx,
264 .init_chipset = init_chipset_aec62xx, 235 .init_chipset = init_chipset_aec62xx,
265 .init_hwif = init_hwif_aec62xx, 236 .init_hwif = init_hwif_aec62xx,
266 .autodma = AUTODMA,
267 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 237 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
268 .bootable = NEVER_BOARD, 238 .host_flags = IDE_HFLAG_NO_ATAPI_DMA,
269 .pio_mask = ATA_PIO4, 239 .pio_mask = ATA_PIO4,
270 .udma_mask = 0x1f, /* udma0-4 */ 240 .mwdma_mask = ATA_MWDMA2,
241 .udma_mask = ATA_UDMA4,
271 },{ /* 3 */ 242 },{ /* 3 */
272 .name = "AEC6280", 243 .name = "AEC6280",
273 .init_setup = init_setup_aec6x80,
274 .init_chipset = init_chipset_aec62xx, 244 .init_chipset = init_chipset_aec62xx,
275 .init_hwif = init_hwif_aec62xx, 245 .init_hwif = init_hwif_aec62xx,
276 .autodma = AUTODMA, 246 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
277 .bootable = OFF_BOARD,
278 .pio_mask = ATA_PIO4, 247 .pio_mask = ATA_PIO4,
279 .udma_mask = 0x3f, /* udma0-5 */ 248 .mwdma_mask = ATA_MWDMA2,
249 .udma_mask = ATA_UDMA5,
280 },{ /* 4 */ 250 },{ /* 4 */
281 .name = "AEC6280R", 251 .name = "AEC6280R",
282 .init_setup = init_setup_aec6x80,
283 .init_chipset = init_chipset_aec62xx, 252 .init_chipset = init_chipset_aec62xx,
284 .init_hwif = init_hwif_aec62xx, 253 .init_hwif = init_hwif_aec62xx,
285 .autodma = AUTODMA,
286 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 254 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
287 .bootable = OFF_BOARD, 255 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
288 .pio_mask = ATA_PIO4, 256 .pio_mask = ATA_PIO4,
289 .udma_mask = 0x3f, /* udma0-5 */ 257 .mwdma_mask = ATA_MWDMA2,
258 .udma_mask = ATA_UDMA5,
290 } 259 }
291}; 260};
292 261
@@ -304,9 +273,21 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
304 273
305static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) 274static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
306{ 275{
307 ide_pci_device_t d = aec62xx_chipsets[id->driver_data]; 276 ide_pci_device_t d;
277 u8 idx = id->driver_data;
278
279 d = aec62xx_chipsets[idx];
280
281 if (idx == 3 || idx == 4) {
282 unsigned long dma_base = pci_resource_start(dev, 4);
283
284 if (inb(dma_base + 2) & 0x10) {
285 d.name = (idx == 4) ? "AEC6880R" : "AEC6880";
286 d.udma_mask = ATA_UDMA6;
287 }
288 }
308 289
309 return d.init_setup(dev, &d); 290 return ide_setup_pci_device(dev, &d);
310} 291}
311 292
312static const struct pci_device_id aec62xx_pci_tbl[] = { 293static const struct pci_device_id aec62xx_pci_tbl[] = {
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index 31d4e50647d5..8ee2b48d105d 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/alim15x3.c Version 0.26 Jul 14 2007 2 * linux/drivers/ide/pci/alim15x3.c Version 0.27 Aug 27 2007
3 * 3 *
4 * Copyright (C) 1998-2000 Michel Aubry, Maintainer 4 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer 5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
@@ -665,34 +665,29 @@ static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
665 hwif->udma_filter = &ali_udma_filter; 665 hwif->udma_filter = &ali_udma_filter;
666 666
667 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ 667 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
668 hwif->no_lba48_dma = (m5229_revision <= 0xC4) ? 1 : 0; 668 if (m5229_revision <= 0xC4)
669 hwif->host_flags |= IDE_HFLAG_NO_LBA48_DMA;
669 670
670 if (!hwif->dma_base) { 671 if (hwif->dma_base == 0)
671 hwif->drives[0].autotune = 1;
672 hwif->drives[1].autotune = 1;
673 return; 672 return;
674 }
675 673
676 /* 674 /*
677 * check in ->init_dma guarantees m5229_revision >= 0x20 here 675 * check in ->init_dma guarantees m5229_revision >= 0x20 here
678 */ 676 */
679 677
680 if (m5229_revision > 0x20) 678 if (m5229_revision == 0x20)
681 hwif->atapi_dma = 1; 679 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
682 680
683 if (m5229_revision <= 0x20) 681 if (m5229_revision <= 0x20)
684 hwif->ultra_mask = 0x00; /* no udma */ 682 hwif->ultra_mask = 0x00; /* no udma */
685 else if (m5229_revision < 0xC2) 683 else if (m5229_revision < 0xC2)
686 hwif->ultra_mask = 0x07; /* udma0-2 */ 684 hwif->ultra_mask = ATA_UDMA2;
687 else if (m5229_revision == 0xC2 || m5229_revision == 0xC3) 685 else if (m5229_revision == 0xC2 || m5229_revision == 0xC3)
688 hwif->ultra_mask = 0x1f; /* udma0-4 */ 686 hwif->ultra_mask = ATA_UDMA4;
689 else if (m5229_revision == 0xC4) 687 else if (m5229_revision == 0xC4)
690 hwif->ultra_mask = 0x3f; /* udma0-5 */ 688 hwif->ultra_mask = ATA_UDMA5;
691 else 689 else
692 hwif->ultra_mask = 0x7f; /* udma0-6 */ 690 hwif->ultra_mask = ATA_UDMA6;
693
694 hwif->mwdma_mask = 0x07;
695 hwif->swdma_mask = 0x07;
696 691
697 hwif->dma_setup = &ali15x3_dma_setup; 692 hwif->dma_setup = &ali15x3_dma_setup;
698 693
@@ -776,9 +771,10 @@ static ide_pci_device_t ali15x3_chipset __devinitdata = {
776 .init_chipset = init_chipset_ali15x3, 771 .init_chipset = init_chipset_ali15x3,
777 .init_hwif = init_hwif_ali15x3, 772 .init_hwif = init_hwif_ali15x3,
778 .init_dma = init_dma_ali15x3, 773 .init_dma = init_dma_ali15x3,
779 .autodma = AUTODMA, 774 .host_flags = IDE_HFLAG_BOOTABLE,
780 .bootable = ON_BOARD,
781 .pio_mask = ATA_PIO5, 775 .pio_mask = ATA_PIO5,
776 .swdma_mask = ATA_SWDMA2,
777 .mwdma_mask = ATA_MWDMA2,
782}; 778};
783 779
784/** 780/**
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index 3bf3d931eea1..7cafefbf6c1b 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -233,7 +233,6 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
233 * Print the boot message. 233 * Print the boot message.
234 */ 234 */
235 235
236 pci_read_config_byte(dev, PCI_REVISION_ID, &t);
237 printk(KERN_INFO "%s: %s (rev %02x) UDMA%s controller\n", 236 printk(KERN_INFO "%s: %s (rev %02x) UDMA%s controller\n",
238 amd_chipset->name, pci_name(dev), dev->revision, 237 amd_chipset->name, pci_name(dev), dev->revision,
239 amd_dma[fls(amd_config->udma_mask) - 1]); 238 amd_dma[fls(amd_config->udma_mask) - 1]);
@@ -254,18 +253,14 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
254 for (i = 0; i < 2; i++) { 253 for (i = 0; i < 2; i++) {
255 hwif->drives[i].io_32bit = 1; 254 hwif->drives[i].io_32bit = 1;
256 hwif->drives[i].unmask = 1; 255 hwif->drives[i].unmask = 1;
257 hwif->drives[i].autotune = 1;
258 } 256 }
259 257
260 if (!hwif->dma_base) 258 if (!hwif->dma_base)
261 return; 259 return;
262 260
263 hwif->atapi_dma = 1;
264
265 hwif->ultra_mask = amd_config->udma_mask; 261 hwif->ultra_mask = amd_config->udma_mask;
266 hwif->mwdma_mask = 0x07; 262 if (amd_config->flags & AMD_BAD_SWDMA)
267 if ((amd_config->flags & AMD_BAD_SWDMA) == 0) 263 hwif->swdma_mask = 0x00;
268 hwif->swdma_mask = 0x07;
269 264
270 if (hwif->cbl != ATA_CBL_PATA40_SHORT) { 265 if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
271 if ((amd_80w >> hwif->channel) & 1) 266 if ((amd_80w >> hwif->channel) & 1)
@@ -280,13 +275,14 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
280 .name = name_str, \ 275 .name = name_str, \
281 .init_chipset = init_chipset_amd74xx, \ 276 .init_chipset = init_chipset_amd74xx, \
282 .init_hwif = init_hwif_amd74xx, \ 277 .init_hwif = init_hwif_amd74xx, \
283 .autodma = AUTODMA, \
284 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \ 278 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \
285 .bootable = ON_BOARD, \ 279 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | \
286 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \ 280 IDE_HFLAG_PIO_NO_DOWNGRADE | \
287 | IDE_HFLAG_PIO_NO_DOWNGRADE \ 281 IDE_HFLAG_POST_SET_MODE | \
288 | IDE_HFLAG_POST_SET_MODE, \ 282 IDE_HFLAG_BOOTABLE, \
289 .pio_mask = ATA_PIO5, \ 283 .pio_mask = ATA_PIO5, \
284 .swdma_mask = ATA_SWDMA2, \
285 .mwdma_mask = ATA_MWDMA2, \
290 } 286 }
291 287
292#define DECLARE_NV_DEV(name_str) \ 288#define DECLARE_NV_DEV(name_str) \
@@ -294,13 +290,14 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
294 .name = name_str, \ 290 .name = name_str, \
295 .init_chipset = init_chipset_amd74xx, \ 291 .init_chipset = init_chipset_amd74xx, \
296 .init_hwif = init_hwif_amd74xx, \ 292 .init_hwif = init_hwif_amd74xx, \
297 .autodma = AUTODMA, \
298 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \ 293 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \
299 .bootable = ON_BOARD, \ 294 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | \
300 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \ 295 IDE_HFLAG_PIO_NO_DOWNGRADE | \
301 | IDE_HFLAG_PIO_NO_DOWNGRADE \ 296 IDE_HFLAG_POST_SET_MODE | \
302 | IDE_HFLAG_POST_SET_MODE, \ 297 IDE_HFLAG_BOOTABLE, \
303 .pio_mask = ATA_PIO5, \ 298 .pio_mask = ATA_PIO5, \
299 .swdma_mask = ATA_SWDMA2, \
300 .mwdma_mask = ATA_MWDMA2, \
304 } 301 }
305 302
306static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { 303static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 446900da1329..307843053078 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -172,21 +172,12 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
172 u8 ch = hwif->channel; 172 u8 ch = hwif->channel;
173 struct pci_dev *pdev = hwif->pci_dev; 173 struct pci_dev *pdev = hwif->pci_dev;
174 174
175 if (!hwif->irq)
176 hwif->irq = ch ? 15 : 14;
177
178 hwif->set_pio_mode = &atiixp_set_pio_mode; 175 hwif->set_pio_mode = &atiixp_set_pio_mode;
179 hwif->set_dma_mode = &atiixp_set_dma_mode; 176 hwif->set_dma_mode = &atiixp_set_dma_mode;
180 hwif->drives[0].autotune = 1;
181 hwif->drives[1].autotune = 1;
182 177
183 if (!hwif->dma_base) 178 if (!hwif->dma_base)
184 return; 179 return;
185 180
186 hwif->atapi_dma = 1;
187 hwif->ultra_mask = 0x3f;
188 hwif->mwdma_mask = 0x07;
189
190 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode); 181 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
191 182
192 if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40) 183 if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
@@ -203,18 +194,20 @@ static ide_pci_device_t atiixp_pci_info[] __devinitdata = {
203 { /* 0 */ 194 { /* 0 */
204 .name = "ATIIXP", 195 .name = "ATIIXP",
205 .init_hwif = init_hwif_atiixp, 196 .init_hwif = init_hwif_atiixp,
206 .autodma = AUTODMA,
207 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, 197 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
208 .bootable = ON_BOARD, 198 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
209 .pio_mask = ATA_PIO4, 199 .pio_mask = ATA_PIO4,
200 .mwdma_mask = ATA_MWDMA2,
201 .udma_mask = ATA_UDMA5,
210 },{ /* 1 */ 202 },{ /* 1 */
211 .name = "SB600_PATA", 203 .name = "SB600_PATA",
212 .init_hwif = init_hwif_atiixp, 204 .init_hwif = init_hwif_atiixp,
213 .autodma = AUTODMA,
214 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, 205 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
215 .bootable = ON_BOARD, 206 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS |
216 .host_flags = IDE_HFLAG_SINGLE, 207 IDE_HFLAG_BOOTABLE,
217 .pio_mask = ATA_PIO4, 208 .pio_mask = ATA_PIO4,
209 .mwdma_mask = ATA_MWDMA2,
210 .udma_mask = ATA_UDMA5,
218 }, 211 },
219}; 212};
220 213
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index f3d3bde8daba..adee2ef6fd71 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -439,11 +439,8 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
439 u8 mrdmode = 0; 439 u8 mrdmode = 0;
440 440
441 if (dev->device == PCI_DEVICE_ID_CMD_646) { 441 if (dev->device == PCI_DEVICE_ID_CMD_646) {
442 u8 rev = 0;
443 442
444 pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 443 switch (dev->revision) {
445
446 switch (rev) {
447 case 0x07: 444 case 0x07:
448 case 0x05: 445 case 0x05:
449 printk("%s: UltraDMA capable\n", name); 446 printk("%s: UltraDMA capable\n", name);
@@ -505,22 +502,13 @@ static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif)
505static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) 502static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
506{ 503{
507 struct pci_dev *dev = hwif->pci_dev; 504 struct pci_dev *dev = hwif->pci_dev;
508 u8 rev = 0;
509
510 pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
511 505
512 hwif->set_pio_mode = &cmd64x_set_pio_mode; 506 hwif->set_pio_mode = &cmd64x_set_pio_mode;
513 hwif->set_dma_mode = &cmd64x_set_dma_mode; 507 hwif->set_dma_mode = &cmd64x_set_dma_mode;
514 508
515 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
516
517 if (!hwif->dma_base) 509 if (!hwif->dma_base)
518 return; 510 return;
519 511
520 hwif->atapi_dma = 1;
521 hwif->mwdma_mask = 0x07;
522 hwif->ultra_mask = hwif->cds->udma_mask;
523
524 /* 512 /*
525 * UltraDMA only supported on PCI646U and PCI646U2, which 513 * UltraDMA only supported on PCI646U and PCI646U2, which
526 * correspond to revisions 0x03, 0x05 and 0x07 respectively. 514 * correspond to revisions 0x03, 0x05 and 0x07 respectively.
@@ -533,7 +521,7 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
533 * 521 *
534 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. 522 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
535 */ 523 */
536 if (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 5) 524 if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5)
537 hwif->ultra_mask = 0x00; 525 hwif->ultra_mask = 0x00;
538 526
539 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 527 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
@@ -548,10 +536,10 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
548 break; 536 break;
549 case PCI_DEVICE_ID_CMD_646: 537 case PCI_DEVICE_ID_CMD_646:
550 hwif->chipset = ide_cmd646; 538 hwif->chipset = ide_cmd646;
551 if (rev == 0x01) { 539 if (dev->revision == 0x01) {
552 hwif->ide_dma_end = &cmd646_1_ide_dma_end; 540 hwif->ide_dma_end = &cmd646_1_ide_dma_end;
553 break; 541 break;
554 } else if (rev >= 0x03) 542 } else if (dev->revision >= 0x03)
555 goto alt_irq_bits; 543 goto alt_irq_bits;
556 /* fall thru */ 544 /* fall thru */
557 default: 545 default:
@@ -561,80 +549,61 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
561 } 549 }
562} 550}
563 551
564static int __devinit init_setup_cmd64x(struct pci_dev *dev, ide_pci_device_t *d)
565{
566 return ide_setup_pci_device(dev, d);
567}
568
569static int __devinit init_setup_cmd646(struct pci_dev *dev, ide_pci_device_t *d)
570{
571 /*
572 * The original PCI0646 didn't have the primary channel enable bit,
573 * it appeared starting with PCI0646U (i.e. revision ID 3).
574 */
575 if (dev->revision < 3)
576 d->enablebits[0].reg = 0;
577
578 return ide_setup_pci_device(dev, d);
579}
580
581static ide_pci_device_t cmd64x_chipsets[] __devinitdata = { 552static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
582 { /* 0 */ 553 { /* 0 */
583 .name = "CMD643", 554 .name = "CMD643",
584 .init_setup = init_setup_cmd64x,
585 .init_chipset = init_chipset_cmd64x, 555 .init_chipset = init_chipset_cmd64x,
586 .init_hwif = init_hwif_cmd64x, 556 .init_hwif = init_hwif_cmd64x,
587 .autodma = AUTODMA,
588 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, 557 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
589 .bootable = ON_BOARD, 558 .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
590 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
591 .pio_mask = ATA_PIO5, 559 .pio_mask = ATA_PIO5,
560 .mwdma_mask = ATA_MWDMA2,
592 .udma_mask = 0x00, /* no udma */ 561 .udma_mask = 0x00, /* no udma */
593 },{ /* 1 */ 562 },{ /* 1 */
594 .name = "CMD646", 563 .name = "CMD646",
595 .init_setup = init_setup_cmd646,
596 .init_chipset = init_chipset_cmd64x, 564 .init_chipset = init_chipset_cmd64x,
597 .init_hwif = init_hwif_cmd64x, 565 .init_hwif = init_hwif_cmd64x,
598 .autodma = AUTODMA,
599 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 566 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
600 .bootable = ON_BOARD, 567 .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
601 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
602 .pio_mask = ATA_PIO5, 568 .pio_mask = ATA_PIO5,
603 .udma_mask = 0x07, /* udma0-2 */ 569 .mwdma_mask = ATA_MWDMA2,
570 .udma_mask = ATA_UDMA2,
604 },{ /* 2 */ 571 },{ /* 2 */
605 .name = "CMD648", 572 .name = "CMD648",
606 .init_setup = init_setup_cmd64x,
607 .init_chipset = init_chipset_cmd64x, 573 .init_chipset = init_chipset_cmd64x,
608 .init_hwif = init_hwif_cmd64x, 574 .init_hwif = init_hwif_cmd64x,
609 .autodma = AUTODMA,
610 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 575 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
611 .bootable = ON_BOARD, 576 .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
612 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
613 .pio_mask = ATA_PIO5, 577 .pio_mask = ATA_PIO5,
614 .udma_mask = 0x1f, /* udma0-4 */ 578 .mwdma_mask = ATA_MWDMA2,
579 .udma_mask = ATA_UDMA4,
615 },{ /* 3 */ 580 },{ /* 3 */
616 .name = "CMD649", 581 .name = "CMD649",
617 .init_setup = init_setup_cmd64x,
618 .init_chipset = init_chipset_cmd64x, 582 .init_chipset = init_chipset_cmd64x,
619 .init_hwif = init_hwif_cmd64x, 583 .init_hwif = init_hwif_cmd64x,
620 .autodma = AUTODMA,
621 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 584 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
622 .bootable = ON_BOARD, 585 .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
623 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
624 .pio_mask = ATA_PIO5, 586 .pio_mask = ATA_PIO5,
625 .udma_mask = 0x3f, /* udma0-5 */ 587 .mwdma_mask = ATA_MWDMA2,
588 .udma_mask = ATA_UDMA5,
626 } 589 }
627}; 590};
628 591
629/*
630 * We may have to modify enablebits for PCI0646, so we'd better pass
631 * a local copy of the ide_pci_device_t structure down the call chain...
632 */
633static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_device_id *id) 592static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
634{ 593{
635 ide_pci_device_t d = cmd64x_chipsets[id->driver_data]; 594 ide_pci_device_t d;
595 u8 idx = id->driver_data;
596
597 d = cmd64x_chipsets[idx];
598
599 /*
600 * The original PCI0646 didn't have the primary channel enable bit,
601 * it appeared starting with PCI0646U (i.e. revision ID 3).
602 */
603 if (idx == 1 && dev->revision < 3)
604 d.enablebits[0].reg = 0;
636 605
637 return d.init_setup(dev, &d); 606 return ide_setup_pci_device(dev, &d);
638} 607}
639 608
640static const struct pci_device_id cmd64x_pci_tbl[] = { 609static const struct pci_device_id cmd64x_pci_tbl[] = {
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index a8bf4940ca9c..aa98e817d385 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -106,18 +106,6 @@ static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
106} 106}
107 107
108/* 108/*
109 * We provide a callback for our nonstandard DMA location
110 */
111
112static void __devinit cs5520_init_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
113{
114 unsigned long bmide = pci_resource_start(dev, 2); /* Not the usual 4 */
115 if(hwif->mate && hwif->mate->dma_base) /* Second channel at primary + 8 */
116 bmide += 8;
117 ide_setup_dma(hwif, bmide, 8);
118}
119
120/*
121 * We wrap the DMA activate to set the vdma flag. This is needed 109 * We wrap the DMA activate to set the vdma flag. This is needed
122 * so that the IDE DMA layer issues PIO not DMA commands over the 110 * so that the IDE DMA layer issues PIO not DMA commands over the
123 * DMA channel 111 * DMA channel
@@ -125,6 +113,7 @@ static void __devinit cs5520_init_setup_dma(struct pci_dev *dev, ide_pci_device_
125 113
126static int cs5520_dma_on(ide_drive_t *drive) 114static int cs5520_dma_on(ide_drive_t *drive)
127{ 115{
116 /* ATAPI is harder so leave it for now */
128 drive->vdma = 1; 117 drive->vdma = 1;
129 return 0; 118 return 0;
130} 119}
@@ -134,29 +123,21 @@ static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
134 hwif->set_pio_mode = &cs5520_set_pio_mode; 123 hwif->set_pio_mode = &cs5520_set_pio_mode;
135 hwif->set_dma_mode = &cs5520_set_dma_mode; 124 hwif->set_dma_mode = &cs5520_set_dma_mode;
136 125
137 if (hwif->dma_base == 0) { 126 if (hwif->dma_base == 0)
138 hwif->drives[1].autotune = hwif->drives[0].autotune = 1;
139 return; 127 return;
140 }
141 128
142 hwif->ide_dma_on = &cs5520_dma_on; 129 hwif->ide_dma_on = &cs5520_dma_on;
143
144 /* ATAPI is harder so leave it for now */
145 hwif->atapi_dma = 0;
146 hwif->ultra_mask = 0;
147 hwif->swdma_mask = 0;
148 hwif->mwdma_mask = 0;
149} 130}
150 131
151#define DECLARE_CS_DEV(name_str) \ 132#define DECLARE_CS_DEV(name_str) \
152 { \ 133 { \
153 .name = name_str, \ 134 .name = name_str, \
154 .init_setup_dma = cs5520_init_setup_dma, \
155 .init_hwif = init_hwif_cs5520, \ 135 .init_hwif = init_hwif_cs5520, \
156 .autodma = AUTODMA, \
157 .bootable = ON_BOARD, \
158 .host_flags = IDE_HFLAG_ISA_PORTS | \ 136 .host_flags = IDE_HFLAG_ISA_PORTS | \
159 IDE_HFLAG_VDMA, \ 137 IDE_HFLAG_CS5520 | \
138 IDE_HFLAG_VDMA | \
139 IDE_HFLAG_NO_ATAPI_DMA | \
140 IDE_HFLAG_BOOTABLE, \
160 .pio_mask = ATA_PIO4, \ 141 .pio_mask = ATA_PIO4, \
161 } 142 }
162 143
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index 0d23b8aabe9c..ba0c6eba024b 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -245,9 +245,6 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
245 unsigned long basereg; 245 unsigned long basereg;
246 u32 d0_timings; 246 u32 d0_timings;
247 247
248 if (hwif->mate)
249 hwif->serialized = hwif->mate->serialized = 1;
250
251 hwif->set_pio_mode = &cs5530_set_pio_mode; 248 hwif->set_pio_mode = &cs5530_set_pio_mode;
252 hwif->set_dma_mode = &cs5530_set_dma_mode; 249 hwif->set_dma_mode = &cs5530_set_dma_mode;
253 250
@@ -258,16 +255,9 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
258 if (CS5530_BAD_PIO(inl(basereg + 8))) 255 if (CS5530_BAD_PIO(inl(basereg + 8)))
259 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 8); 256 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 8);
260 257
261 hwif->drives[0].autotune = 1;
262 hwif->drives[1].autotune = 1;
263
264 if (hwif->dma_base == 0) 258 if (hwif->dma_base == 0)
265 return; 259 return;
266 260
267 hwif->atapi_dma = 1;
268 hwif->ultra_mask = 0x07;
269 hwif->mwdma_mask = 0x07;
270
271 hwif->udma_filter = cs5530_udma_filter; 261 hwif->udma_filter = cs5530_udma_filter;
272} 262}
273 263
@@ -275,10 +265,12 @@ static ide_pci_device_t cs5530_chipset __devinitdata = {
275 .name = "CS5530", 265 .name = "CS5530",
276 .init_chipset = init_chipset_cs5530, 266 .init_chipset = init_chipset_cs5530,
277 .init_hwif = init_hwif_cs5530, 267 .init_hwif = init_hwif_cs5530,
278 .autodma = AUTODMA, 268 .host_flags = IDE_HFLAG_SERIALIZE |
279 .bootable = ON_BOARD, 269 IDE_HFLAG_POST_SET_MODE |
270 IDE_HFLAG_BOOTABLE,
280 .pio_mask = ATA_PIO4, 271 .pio_mask = ATA_PIO4,
281 .host_flags = IDE_HFLAG_POST_SET_MODE, 272 .mwdma_mask = ATA_MWDMA2,
273 .udma_mask = ATA_UDMA2,
282}; 274};
283 275
284static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_device_id *id) 276static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_device_id *id)
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index e4891a16afef..5ac82ffa5c09 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -84,7 +84,7 @@ static void cs5535_set_speed(ide_drive_t *drive, const u8 speed)
84 84
85 /* Set the PIO timings */ 85 /* Set the PIO timings */
86 if ((speed & XFER_MODE) == XFER_PIO) { 86 if ((speed & XFER_MODE) == XFER_PIO) {
87 ide_drive_t *pair = &drive->hwif->drives[drive->dn ^ 1]; 87 ide_drive_t *pair = ide_get_paired_drive(drive);
88 u8 cmd, pioa; 88 u8 cmd, pioa;
89 89
90 cmd = pioa = speed - XFER_PIO_0; 90 cmd = pioa = speed - XFER_PIO_0;
@@ -180,25 +180,20 @@ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)
180 hwif->set_pio_mode = &cs5535_set_pio_mode; 180 hwif->set_pio_mode = &cs5535_set_pio_mode;
181 hwif->set_dma_mode = &cs5535_set_dma_mode; 181 hwif->set_dma_mode = &cs5535_set_dma_mode;
182 182
183 hwif->drives[1].autotune = hwif->drives[0].autotune = 1;
184
185 if (hwif->dma_base == 0) 183 if (hwif->dma_base == 0)
186 return; 184 return;
187 185
188 hwif->atapi_dma = 1;
189 hwif->ultra_mask = 0x1F;
190 hwif->mwdma_mask = 0x07;
191
192 hwif->cbl = cs5535_cable_detect(hwif->pci_dev); 186 hwif->cbl = cs5535_cable_detect(hwif->pci_dev);
193} 187}
194 188
195static ide_pci_device_t cs5535_chipset __devinitdata = { 189static ide_pci_device_t cs5535_chipset __devinitdata = {
196 .name = "CS5535", 190 .name = "CS5535",
197 .init_hwif = init_hwif_cs5535, 191 .init_hwif = init_hwif_cs5535,
198 .autodma = AUTODMA, 192 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE |
199 .bootable = ON_BOARD, 193 IDE_HFLAG_BOOTABLE,
200 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE,
201 .pio_mask = ATA_PIO4, 194 .pio_mask = ATA_PIO4,
195 .mwdma_mask = ATA_MWDMA2,
196 .udma_mask = ATA_UDMA4,
202}; 197};
203 198
204static int __devinit cs5535_init_one(struct pci_dev *dev, 199static int __devinit cs5535_init_one(struct pci_dev *dev,
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index c498ecfd7fcb..efc20bd97fd5 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002 2 * linux/drivers/ide/pci/cy82c693.c Version 0.41 Aug 27, 2007
3 * 3 *
4 * Copyright (C) 1998-2000 Andreas S. Krebs (akrebs@altavista.net), Maintainer 4 * Copyright (C) 1998-2000 Andreas S. Krebs (akrebs@altavista.net), Maintainer
5 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>, Integrator 5 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>, Integrator
@@ -431,15 +431,8 @@ static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif)
431 hwif->chipset = ide_cy82c693; 431 hwif->chipset = ide_cy82c693;
432 hwif->set_pio_mode = &cy82c693_set_pio_mode; 432 hwif->set_pio_mode = &cy82c693_set_pio_mode;
433 433
434 if (!hwif->dma_base) { 434 if (hwif->dma_base == 0)
435 hwif->drives[0].autotune = 1;
436 hwif->drives[1].autotune = 1;
437 return; 435 return;
438 }
439
440 hwif->atapi_dma = 1;
441 hwif->mwdma_mask = 0x04;
442 hwif->swdma_mask = 0x04;
443 436
444 hwif->ide_dma_on = &cy82c693_ide_dma_on; 437 hwif->ide_dma_on = &cy82c693_ide_dma_on;
445} 438}
@@ -461,10 +454,11 @@ static ide_pci_device_t cy82c693_chipset __devinitdata = {
461 .init_chipset = init_chipset_cy82c693, 454 .init_chipset = init_chipset_cy82c693,
462 .init_iops = init_iops_cy82c693, 455 .init_iops = init_iops_cy82c693,
463 .init_hwif = init_hwif_cy82c693, 456 .init_hwif = init_hwif_cy82c693,
464 .autodma = AUTODMA, 457 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_TRUST_BIOS_FOR_DMA |
465 .bootable = ON_BOARD, 458 IDE_HFLAG_BOOTABLE,
466 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_TRUST_BIOS_FOR_DMA,
467 .pio_mask = ATA_PIO4, 459 .pio_mask = ATA_PIO4,
460 .swdma_mask = ATA_SWDMA2_ONLY,
461 .mwdma_mask = ATA_MWDMA2_ONLY,
468}; 462};
469 463
470static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id) 464static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id)
diff --git a/drivers/ide/pci/generic.c b/drivers/ide/pci/generic.c
index cce6311b02df..51165832e7f2 100644
--- a/drivers/ide/pci/generic.c
+++ b/drivers/ide/pci/generic.c
@@ -65,119 +65,65 @@ static void __devinit init_hwif_generic (ide_hwif_t *hwif)
65 default: 65 default:
66 break; 66 break;
67 } 67 }
68
69 if (!(hwif->dma_base))
70 return;
71
72 hwif->atapi_dma = 1;
73 hwif->ultra_mask = 0x7f;
74 hwif->mwdma_mask = 0x07;
75 hwif->swdma_mask = 0x07;
76} 68}
77 69
78#if 0 70#define DECLARE_GENERIC_PCI_DEV(name_str, dma_setting) \
79 /* Logic to add back later on */ 71 { \
80 72 .name = name_str, \
81 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) { 73 .init_hwif = init_hwif_generic, \
82 ide_pci_device_t *unknown = unknown_chipset; 74 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \
83 init_setup_unknown(dev, unknown); 75 dma_setting | \
84 return 1; 76 IDE_HFLAG_BOOTABLE, \
77 .swdma_mask = ATA_SWDMA2, \
78 .mwdma_mask = ATA_MWDMA2, \
79 .udma_mask = ATA_UDMA6, \
85 } 80 }
86 return 0;
87#endif
88 81
89static ide_pci_device_t generic_chipsets[] __devinitdata = { 82static ide_pci_device_t generic_chipsets[] __devinitdata = {
90 { /* 0 */ 83 /* 0 */ DECLARE_GENERIC_PCI_DEV("Unknown", 0),
91 .name = "Unknown", 84
92 .init_hwif = init_hwif_generic, 85 { /* 1 */
93 .autodma = AUTODMA,
94 .bootable = ON_BOARD,
95 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
96 },{ /* 1 */
97 .name = "NS87410", 86 .name = "NS87410",
98 .init_hwif = init_hwif_generic, 87 .init_hwif = init_hwif_generic,
99 .autodma = AUTODMA,
100 .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}}, 88 .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}},
101 .bootable = ON_BOARD, 89 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
102 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 90 IDE_HFLAG_BOOTABLE,
103 },{ /* 2 */ 91 .swdma_mask = ATA_SWDMA2,
104 .name = "SAMURAI", 92 .mwdma_mask = ATA_MWDMA2,
105 .init_hwif = init_hwif_generic, 93 .udma_mask = ATA_UDMA6,
106 .autodma = AUTODMA, 94 },
107 .bootable = ON_BOARD, 95
108 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 96 /* 2 */ DECLARE_GENERIC_PCI_DEV("SAMURAI", 0),
109 },{ /* 3 */ 97 /* 3 */ DECLARE_GENERIC_PCI_DEV("HT6565", 0),
110 .name = "HT6565", 98 /* 4 */ DECLARE_GENERIC_PCI_DEV("UM8673F", IDE_HFLAG_NO_DMA),
111 .init_hwif = init_hwif_generic, 99 /* 5 */ DECLARE_GENERIC_PCI_DEV("UM8886A", IDE_HFLAG_NO_DMA),
112 .autodma = AUTODMA, 100 /* 6 */ DECLARE_GENERIC_PCI_DEV("UM8886BF", IDE_HFLAG_NO_DMA),
113 .bootable = ON_BOARD, 101 /* 7 */ DECLARE_GENERIC_PCI_DEV("HINT_IDE", 0),
114 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 102 /* 8 */ DECLARE_GENERIC_PCI_DEV("VIA_IDE", IDE_HFLAG_NO_AUTODMA),
115 },{ /* 4 */ 103 /* 9 */ DECLARE_GENERIC_PCI_DEV("OPTI621V", IDE_HFLAG_NO_AUTODMA),
116 .name = "UM8673F", 104
117 .init_hwif = init_hwif_generic, 105 { /* 10 */
118 .autodma = NODMA,
119 .bootable = ON_BOARD,
120 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
121 },{ /* 5 */
122 .name = "UM8886A",
123 .init_hwif = init_hwif_generic,
124 .autodma = NODMA,
125 .bootable = ON_BOARD,
126 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
127 },{ /* 6 */
128 .name = "UM8886BF",
129 .init_hwif = init_hwif_generic,
130 .autodma = NODMA,
131 .bootable = ON_BOARD,
132 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
133 },{ /* 7 */
134 .name = "HINT_IDE",
135 .init_hwif = init_hwif_generic,
136 .autodma = AUTODMA,
137 .bootable = ON_BOARD,
138 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
139 },{ /* 8 */
140 .name = "VIA_IDE",
141 .init_hwif = init_hwif_generic,
142 .autodma = NOAUTODMA,
143 .bootable = ON_BOARD,
144 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
145 },{ /* 9 */
146 .name = "OPTI621V",
147 .init_hwif = init_hwif_generic,
148 .autodma = NOAUTODMA,
149 .bootable = ON_BOARD,
150 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
151 },{ /* 10 */
152 .name = "VIA8237SATA", 106 .name = "VIA8237SATA",
153 .init_hwif = init_hwif_generic, 107 .init_hwif = init_hwif_generic,
154 .autodma = AUTODMA, 108 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
155 .bootable = OFF_BOARD, 109 IDE_HFLAG_OFF_BOARD,
156 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 110 .swdma_mask = ATA_SWDMA2,
157 },{ /* 11 */ 111 .mwdma_mask = ATA_MWDMA2,
158 .name = "Piccolo0102", 112 .udma_mask = ATA_UDMA6,
159 .init_hwif = init_hwif_generic, 113 },
160 .autodma = NOAUTODMA, 114
161 .bootable = ON_BOARD, 115 /* 11 */ DECLARE_GENERIC_PCI_DEV("Piccolo0102", IDE_HFLAG_NO_AUTODMA),
162 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 116 /* 12 */ DECLARE_GENERIC_PCI_DEV("Piccolo0103", IDE_HFLAG_NO_AUTODMA),
163 },{ /* 12 */ 117 /* 13 */ DECLARE_GENERIC_PCI_DEV("Piccolo0105", IDE_HFLAG_NO_AUTODMA),
164 .name = "Piccolo0103", 118
165 .init_hwif = init_hwif_generic, 119 { /* 14 */
166 .autodma = NOAUTODMA,
167 .bootable = ON_BOARD,
168 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
169 },{ /* 13 */
170 .name = "Piccolo0105",
171 .init_hwif = init_hwif_generic,
172 .autodma = NOAUTODMA,
173 .bootable = ON_BOARD,
174 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
175 },{ /* 14 */
176 .name = "Revolution", 120 .name = "Revolution",
177 .init_hwif = init_hwif_generic, 121 .init_hwif = init_hwif_generic,
178 .autodma = AUTODMA, 122 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
179 .bootable = OFF_BOARD, 123 IDE_HFLAG_OFF_BOARD,
180 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 124 .swdma_mask = ATA_SWDMA2,
125 .mwdma_mask = ATA_MWDMA2,
126 .udma_mask = ATA_UDMA6,
181 } 127 }
182}; 128};
183 129
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index 44ac0e2f7a09..67af1a7dde30 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -125,49 +125,45 @@ static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const cha
125 125
126static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif) 126static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif)
127{ 127{
128 u16 pcicmd = 0;
129
130 hwif->set_pio_mode = &hpt34x_set_pio_mode; 128 hwif->set_pio_mode = &hpt34x_set_pio_mode;
131 hwif->set_dma_mode = &hpt34x_set_mode; 129 hwif->set_dma_mode = &hpt34x_set_mode;
130}
132 131
133 hwif->drives[0].autotune = 1; 132static ide_pci_device_t hpt34x_chipsets[] __devinitdata = {
134 hwif->drives[1].autotune = 1; 133 { /* 0 */
135 134 .name = "HPT343",
136 pci_read_config_word(hwif->pci_dev, PCI_COMMAND, &pcicmd); 135 .init_chipset = init_chipset_hpt34x,
137 136 .init_hwif = init_hwif_hpt34x,
138 if (!hwif->dma_base) 137 .extra = 16,
139 return; 138 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
140 139 IDE_HFLAG_NO_AUTODMA,
140 .pio_mask = ATA_PIO5,
141 },
142 { /* 1 */
143 .name = "HPT345",
144 .init_chipset = init_chipset_hpt34x,
145 .init_hwif = init_hwif_hpt34x,
146 .extra = 16,
147 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
148 IDE_HFLAG_NO_AUTODMA |
149 IDE_HFLAG_OFF_BOARD,
150 .pio_mask = ATA_PIO5,
141#ifdef CONFIG_HPT34X_AUTODMA 151#ifdef CONFIG_HPT34X_AUTODMA
142 if ((pcicmd & PCI_COMMAND_MEMORY) == 0) 152 .swdma_mask = ATA_SWDMA2,
143 return; 153 .mwdma_mask = ATA_MWDMA2,
144 154 .udma_mask = ATA_UDMA2,
145 hwif->ultra_mask = 0x07;
146 hwif->mwdma_mask = 0x07;
147 hwif->swdma_mask = 0x07;
148#endif 155#endif
149} 156 }
150
151static ide_pci_device_t hpt34x_chipset __devinitdata = {
152 .name = "HPT34X",
153 .init_chipset = init_chipset_hpt34x,
154 .init_hwif = init_hwif_hpt34x,
155 .autodma = NOAUTODMA,
156 .bootable = NEVER_BOARD,
157 .extra = 16,
158 .pio_mask = ATA_PIO5,
159}; 157};
160 158
161static int __devinit hpt34x_init_one(struct pci_dev *dev, const struct pci_device_id *id) 159static int __devinit hpt34x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
162{ 160{
163 ide_pci_device_t *d = &hpt34x_chipset; 161 ide_pci_device_t *d;
164 static char *chipset_names[] = {"HPT343", "HPT345"};
165 u16 pcicmd = 0; 162 u16 pcicmd = 0;
166 163
167 pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 164 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
168 165
169 d->name = chipset_names[(pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0]; 166 d = &hpt34x_chipsets[(pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0];
170 d->bootable = (pcicmd & PCI_COMMAND_MEMORY) ? OFF_BOARD : NEVER_BOARD;
171 167
172 return ide_setup_pci_device(dev, d); 168 return ide_setup_pci_device(dev, d);
173} 169}
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index fcb21ddab2cc..18f5b7ddaee6 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -1,9 +1,10 @@
1/* 1/*
2 * linux/drivers/ide/pci/hpt366.c Version 1.14 Oct 1, 2007 2 * linux/drivers/ide/pci/hpt366.c Version 1.20 Oct 1, 2007
3 * 3 *
4 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
5 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 5 * Portions Copyright (C) 2001 Sun Microsystems, Inc.
6 * Portions Copyright (C) 2003 Red Hat Inc 6 * Portions Copyright (C) 2003 Red Hat Inc
7 * Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz
7 * Portions Copyright (C) 2005-2007 MontaVista Software, Inc. 8 * Portions Copyright (C) 2005-2007 MontaVista Software, Inc.
8 * 9 *
9 * Thanks to HighPoint Technologies for their assistance, and hardware. 10 * Thanks to HighPoint Technologies for their assistance, and hardware.
@@ -393,8 +394,9 @@ enum ata_clock {
393 */ 394 */
394 395
395struct hpt_info { 396struct hpt_info {
397 char *chip_name; /* Chip name */
396 u8 chip_type; /* Chip type */ 398 u8 chip_type; /* Chip type */
397 u8 max_ultra; /* Max. UltraDMA mode allowed */ 399 u8 udma_mask; /* Allowed UltraDMA modes mask. */
398 u8 dpll_clk; /* DPLL clock in MHz */ 400 u8 dpll_clk; /* DPLL clock in MHz */
399 u8 pci_clk; /* PCI clock in MHz */ 401 u8 pci_clk; /* PCI clock in MHz */
400 u32 **settings; /* Chipset settings table */ 402 u32 **settings; /* Chipset settings table */
@@ -432,78 +434,89 @@ static u32 *hpt37x_settings[NUM_ATA_CLOCKS] = {
432}; 434};
433 435
434static struct hpt_info hpt36x __devinitdata = { 436static struct hpt_info hpt36x __devinitdata = {
437 .chip_name = "HPT36x",
435 .chip_type = HPT36x, 438 .chip_type = HPT36x,
436 .max_ultra = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? 4 : 3) : 2, 439 .udma_mask = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? ATA_UDMA4 : ATA_UDMA3) : ATA_UDMA2,
437 .dpll_clk = 0, /* no DPLL */ 440 .dpll_clk = 0, /* no DPLL */
438 .settings = hpt36x_settings 441 .settings = hpt36x_settings
439}; 442};
440 443
441static struct hpt_info hpt370 __devinitdata = { 444static struct hpt_info hpt370 __devinitdata = {
445 .chip_name = "HPT370",
442 .chip_type = HPT370, 446 .chip_type = HPT370,
443 .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4, 447 .udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4,
444 .dpll_clk = 48, 448 .dpll_clk = 48,
445 .settings = hpt37x_settings 449 .settings = hpt37x_settings
446}; 450};
447 451
448static struct hpt_info hpt370a __devinitdata = { 452static struct hpt_info hpt370a __devinitdata = {
453 .chip_name = "HPT370A",
449 .chip_type = HPT370A, 454 .chip_type = HPT370A,
450 .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4, 455 .udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4,
451 .dpll_clk = 48, 456 .dpll_clk = 48,
452 .settings = hpt37x_settings 457 .settings = hpt37x_settings
453}; 458};
454 459
455static struct hpt_info hpt374 __devinitdata = { 460static struct hpt_info hpt374 __devinitdata = {
461 .chip_name = "HPT374",
456 .chip_type = HPT374, 462 .chip_type = HPT374,
457 .max_ultra = 5, 463 .udma_mask = ATA_UDMA5,
458 .dpll_clk = 48, 464 .dpll_clk = 48,
459 .settings = hpt37x_settings 465 .settings = hpt37x_settings
460}; 466};
461 467
462static struct hpt_info hpt372 __devinitdata = { 468static struct hpt_info hpt372 __devinitdata = {
469 .chip_name = "HPT372",
463 .chip_type = HPT372, 470 .chip_type = HPT372,
464 .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, 471 .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
465 .dpll_clk = 55, 472 .dpll_clk = 55,
466 .settings = hpt37x_settings 473 .settings = hpt37x_settings
467}; 474};
468 475
469static struct hpt_info hpt372a __devinitdata = { 476static struct hpt_info hpt372a __devinitdata = {
477 .chip_name = "HPT372A",
470 .chip_type = HPT372A, 478 .chip_type = HPT372A,
471 .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, 479 .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
472 .dpll_clk = 66, 480 .dpll_clk = 66,
473 .settings = hpt37x_settings 481 .settings = hpt37x_settings
474}; 482};
475 483
476static struct hpt_info hpt302 __devinitdata = { 484static struct hpt_info hpt302 __devinitdata = {
485 .chip_name = "HPT302",
477 .chip_type = HPT302, 486 .chip_type = HPT302,
478 .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, 487 .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
479 .dpll_clk = 66, 488 .dpll_clk = 66,
480 .settings = hpt37x_settings 489 .settings = hpt37x_settings
481}; 490};
482 491
483static struct hpt_info hpt371 __devinitdata = { 492static struct hpt_info hpt371 __devinitdata = {
493 .chip_name = "HPT371",
484 .chip_type = HPT371, 494 .chip_type = HPT371,
485 .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5, 495 .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
486 .dpll_clk = 66, 496 .dpll_clk = 66,
487 .settings = hpt37x_settings 497 .settings = hpt37x_settings
488}; 498};
489 499
490static struct hpt_info hpt372n __devinitdata = { 500static struct hpt_info hpt372n __devinitdata = {
501 .chip_name = "HPT372N",
491 .chip_type = HPT372N, 502 .chip_type = HPT372N,
492 .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, 503 .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
493 .dpll_clk = 77, 504 .dpll_clk = 77,
494 .settings = hpt37x_settings 505 .settings = hpt37x_settings
495}; 506};
496 507
497static struct hpt_info hpt302n __devinitdata = { 508static struct hpt_info hpt302n __devinitdata = {
509 .chip_name = "HPT302N",
498 .chip_type = HPT302N, 510 .chip_type = HPT302N,
499 .max_ultra = HPT302_ALLOW_ATA133_6 ? 6 : 5, 511 .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
500 .dpll_clk = 77, 512 .dpll_clk = 77,
501 .settings = hpt37x_settings 513 .settings = hpt37x_settings
502}; 514};
503 515
504static struct hpt_info hpt371n __devinitdata = { 516static struct hpt_info hpt371n __devinitdata = {
517 .chip_name = "HPT371N",
505 .chip_type = HPT371N, 518 .chip_type = HPT371N,
506 .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5, 519 .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
507 .dpll_clk = 77, 520 .dpll_clk = 77,
508 .settings = hpt37x_settings 521 .settings = hpt37x_settings
509}; 522};
@@ -676,12 +689,11 @@ static int hpt3xx_quirkproc(ide_drive_t *drive)
676 689
677static void hpt3xx_intrproc(ide_drive_t *drive) 690static void hpt3xx_intrproc(ide_drive_t *drive)
678{ 691{
679 ide_hwif_t *hwif = HWIF(drive);
680
681 if (drive->quirk_list) 692 if (drive->quirk_list)
682 return; 693 return;
694
683 /* drives in the quirk_list may not like intr setups/cleanups */ 695 /* drives in the quirk_list may not like intr setups/cleanups */
684 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); 696 outb(drive->ctl | 2, IDE_CONTROL_REG);
685} 697}
686 698
687static void hpt3xx_maskproc(ide_drive_t *drive, int mask) 699static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
@@ -709,8 +721,8 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
709 enable_irq (hwif->irq); 721 enable_irq (hwif->irq);
710 } 722 }
711 } else 723 } else
712 hwif->OUTB(mask ? (drive->ctl | 2) : (drive->ctl & ~2), 724 outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2),
713 IDE_CONTROL_REG); 725 IDE_CONTROL_REG);
714} 726}
715 727
716/* 728/*
@@ -750,9 +762,9 @@ static void hpt370_irq_timeout(ide_drive_t *drive)
750 printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff); 762 printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff);
751 763
752 /* get DMA command mode */ 764 /* get DMA command mode */
753 dma_cmd = hwif->INB(hwif->dma_command); 765 dma_cmd = inb(hwif->dma_command);
754 /* stop DMA */ 766 /* stop DMA */
755 hwif->OUTB(dma_cmd & ~0x1, hwif->dma_command); 767 outb(dma_cmd & ~0x1, hwif->dma_command);
756 hpt370_clear_engine(drive); 768 hpt370_clear_engine(drive);
757} 769}
758 770
@@ -767,12 +779,12 @@ static void hpt370_ide_dma_start(ide_drive_t *drive)
767static int hpt370_ide_dma_end(ide_drive_t *drive) 779static int hpt370_ide_dma_end(ide_drive_t *drive)
768{ 780{
769 ide_hwif_t *hwif = HWIF(drive); 781 ide_hwif_t *hwif = HWIF(drive);
770 u8 dma_stat = hwif->INB(hwif->dma_status); 782 u8 dma_stat = inb(hwif->dma_status);
771 783
772 if (dma_stat & 0x01) { 784 if (dma_stat & 0x01) {
773 /* wait a little */ 785 /* wait a little */
774 udelay(20); 786 udelay(20);
775 dma_stat = hwif->INB(hwif->dma_status); 787 dma_stat = inb(hwif->dma_status);
776 if (dma_stat & 0x01) 788 if (dma_stat & 0x01)
777 hpt370_irq_timeout(drive); 789 hpt370_irq_timeout(drive);
778 } 790 }
@@ -833,34 +845,32 @@ static int hpt374_ide_dma_end(ide_drive_t *drive)
833 845
834static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode) 846static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode)
835{ 847{
836 u8 scr2 = hwif->INB(hwif->dma_master + 0x7b); 848 u8 scr2 = inb(hwif->dma_master + 0x7b);
837 849
838 if ((scr2 & 0x7f) == mode) 850 if ((scr2 & 0x7f) == mode)
839 return; 851 return;
840 852
841 /* Tristate the bus */ 853 /* Tristate the bus */
842 hwif->OUTB(0x80, hwif->dma_master + 0x73); 854 outb(0x80, hwif->dma_master + 0x73);
843 hwif->OUTB(0x80, hwif->dma_master + 0x77); 855 outb(0x80, hwif->dma_master + 0x77);
844 856
845 /* Switch clock and reset channels */ 857 /* Switch clock and reset channels */
846 hwif->OUTB(mode, hwif->dma_master + 0x7b); 858 outb(mode, hwif->dma_master + 0x7b);
847 hwif->OUTB(0xc0, hwif->dma_master + 0x79); 859 outb(0xc0, hwif->dma_master + 0x79);
848 860
849 /* 861 /*
850 * Reset the state machines. 862 * Reset the state machines.
851 * NOTE: avoid accidentally enabling the disabled channels. 863 * NOTE: avoid accidentally enabling the disabled channels.
852 */ 864 */
853 hwif->OUTB(hwif->INB(hwif->dma_master + 0x70) | 0x32, 865 outb(inb(hwif->dma_master + 0x70) | 0x32, hwif->dma_master + 0x70);
854 hwif->dma_master + 0x70); 866 outb(inb(hwif->dma_master + 0x74) | 0x32, hwif->dma_master + 0x74);
855 hwif->OUTB(hwif->INB(hwif->dma_master + 0x74) | 0x32,
856 hwif->dma_master + 0x74);
857 867
858 /* Complete reset */ 868 /* Complete reset */
859 hwif->OUTB(0x00, hwif->dma_master + 0x79); 869 outb(0x00, hwif->dma_master + 0x79);
860 870
861 /* Reconnect channels to bus */ 871 /* Reconnect channels to bus */
862 hwif->OUTB(0x00, hwif->dma_master + 0x73); 872 outb(0x00, hwif->dma_master + 0x73);
863 hwif->OUTB(0x00, hwif->dma_master + 0x77); 873 outb(0x00, hwif->dma_master + 0x77);
864} 874}
865 875
866/** 876/**
@@ -1139,7 +1149,7 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha
1139 * Select 66 MHz DPLL clock only if UltraATA/133 mode is 1149 * Select 66 MHz DPLL clock only if UltraATA/133 mode is
1140 * supported/enabled, use 50 MHz DPLL clock otherwise... 1150 * supported/enabled, use 50 MHz DPLL clock otherwise...
1141 */ 1151 */
1142 if (info->max_ultra == 6) { 1152 if (info->udma_mask == ATA_UDMA6) {
1143 dpll_clk = 66; 1153 dpll_clk = 66;
1144 clock = ATA_CLOCK_66MHZ; 1154 clock = ATA_CLOCK_66MHZ;
1145 } else if (dpll_clk) { /* HPT36x chips don't have DPLL */ 1155 } else if (dpll_clk) { /* HPT36x chips don't have DPLL */
@@ -1291,14 +1301,9 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1291 if (new_mcr != old_mcr) 1301 if (new_mcr != old_mcr)
1292 pci_write_config_byte(dev, hwif->select_data + 1, new_mcr); 1302 pci_write_config_byte(dev, hwif->select_data + 1, new_mcr);
1293 1303
1294 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
1295
1296 if (hwif->dma_base == 0) 1304 if (hwif->dma_base == 0)
1297 return; 1305 return;
1298 1306
1299 hwif->ultra_mask = hwif->cds->udma_mask;
1300 hwif->mwdma_mask = 0x07;
1301
1302 /* 1307 /*
1303 * The HPT37x uses the CBLID pins as outputs for MA15/MA16 1308 * The HPT37x uses the CBLID pins as outputs for MA15/MA16
1304 * address lines to access an external EEPROM. To read valid 1309 * address lines to access an external EEPROM. To read valid
@@ -1354,7 +1359,7 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase)
1354 u8 dma_new = 0, dma_old = 0; 1359 u8 dma_new = 0, dma_old = 0;
1355 unsigned long flags; 1360 unsigned long flags;
1356 1361
1357 dma_old = hwif->INB(dmabase + 2); 1362 dma_old = inb(dmabase + 2);
1358 1363
1359 local_irq_save(flags); 1364 local_irq_save(flags);
1360 1365
@@ -1365,60 +1370,26 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase)
1365 if (masterdma & 0x30) dma_new |= 0x20; 1370 if (masterdma & 0x30) dma_new |= 0x20;
1366 if ( slavedma & 0x30) dma_new |= 0x40; 1371 if ( slavedma & 0x30) dma_new |= 0x40;
1367 if (dma_new != dma_old) 1372 if (dma_new != dma_old)
1368 hwif->OUTB(dma_new, dmabase + 2); 1373 outb(dma_new, dmabase + 2);
1369 1374
1370 local_irq_restore(flags); 1375 local_irq_restore(flags);
1371 1376
1372 ide_setup_dma(hwif, dmabase, 8); 1377 ide_setup_dma(hwif, dmabase, 8);
1373} 1378}
1374 1379
1375static int __devinit init_setup_hpt374(struct pci_dev *dev, ide_pci_device_t *d) 1380static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2)
1376{ 1381{
1377 struct pci_dev *dev2; 1382 if (dev2->irq != dev->irq) {
1378 1383 /* FIXME: we need a core pci_set_interrupt() */
1379 if (PCI_FUNC(dev->devfn) & 1) 1384 dev2->irq = dev->irq;
1380 return -ENODEV; 1385 printk(KERN_INFO "HPT374: PCI config space interrupt fixed\n");
1381
1382 pci_set_drvdata(dev, &hpt374);
1383
1384 if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) {
1385 int ret;
1386
1387 pci_set_drvdata(dev2, &hpt374);
1388
1389 if (dev2->irq != dev->irq) {
1390 /* FIXME: we need a core pci_set_interrupt() */
1391 dev2->irq = dev->irq;
1392 printk(KERN_WARNING "%s: PCI config space interrupt "
1393 "fixed.\n", d->name);
1394 }
1395 ret = ide_setup_pci_devices(dev, dev2, d);
1396 if (ret < 0)
1397 pci_dev_put(dev2);
1398 return ret;
1399 } 1386 }
1400 return ide_setup_pci_device(dev, d);
1401}
1402
1403static int __devinit init_setup_hpt372n(struct pci_dev *dev, ide_pci_device_t *d)
1404{
1405 pci_set_drvdata(dev, &hpt372n);
1406
1407 return ide_setup_pci_device(dev, d);
1408} 1387}
1409 1388
1410static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d) 1389static void __devinit hpt371_init(struct pci_dev *dev)
1411{ 1390{
1412 struct hpt_info *info;
1413 u8 mcr1 = 0; 1391 u8 mcr1 = 0;
1414 1392
1415 if (dev->revision > 1) {
1416 d->name = "HPT371N";
1417
1418 info = &hpt371n;
1419 } else
1420 info = &hpt371;
1421
1422 /* 1393 /*
1423 * HPT371 chips physically have only one channel, the secondary one, 1394 * HPT371 chips physically have only one channel, the secondary one,
1424 * but the primary channel registers do exist! Go figure... 1395 * but the primary channel registers do exist! Go figure...
@@ -1428,194 +1399,102 @@ static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d)
1428 pci_read_config_byte(dev, 0x50, &mcr1); 1399 pci_read_config_byte(dev, 0x50, &mcr1);
1429 if (mcr1 & 0x04) 1400 if (mcr1 & 0x04)
1430 pci_write_config_byte(dev, 0x50, mcr1 & ~0x04); 1401 pci_write_config_byte(dev, 0x50, mcr1 & ~0x04);
1431
1432 pci_set_drvdata(dev, info);
1433
1434 return ide_setup_pci_device(dev, d);
1435}
1436
1437static int __devinit init_setup_hpt372a(struct pci_dev *dev, ide_pci_device_t *d)
1438{
1439 struct hpt_info *info;
1440
1441 if (dev->revision > 1) {
1442 d->name = "HPT372N";
1443
1444 info = &hpt372n;
1445 } else
1446 info = &hpt372a;
1447 pci_set_drvdata(dev, info);
1448
1449 return ide_setup_pci_device(dev, d);
1450} 1402}
1451 1403
1452static int __devinit init_setup_hpt302(struct pci_dev *dev, ide_pci_device_t *d) 1404static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2)
1453{ 1405{
1454 struct hpt_info *info; 1406 u8 mcr1 = 0, pin1 = 0, pin2 = 0;
1455
1456 if (dev->revision > 1) {
1457 d->name = "HPT302N";
1458 1407
1459 info = &hpt302n; 1408 /*
1460 } else 1409 * Now we'll have to force both channels enabled if
1461 info = &hpt302; 1410 * at least one of them has been enabled by BIOS...
1462 pci_set_drvdata(dev, info); 1411 */
1463 1412 pci_read_config_byte(dev, 0x50, &mcr1);
1464 return ide_setup_pci_device(dev, d); 1413 if (mcr1 & 0x30)
1465} 1414 pci_write_config_byte(dev, 0x50, mcr1 | 0x30);
1466
1467static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d)
1468{
1469 struct pci_dev *dev2;
1470 u8 rev = dev->revision;
1471 static char *chipset_names[] = { "HPT366", "HPT366", "HPT368",
1472 "HPT370", "HPT370A", "HPT372",
1473 "HPT372N" };
1474 static struct hpt_info *info[] = { &hpt36x, &hpt36x, &hpt36x,
1475 &hpt370, &hpt370a, &hpt372,
1476 &hpt372n };
1477
1478 if (PCI_FUNC(dev->devfn) & 1)
1479 return -ENODEV;
1480 1415
1481 switch (rev) { 1416 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1);
1482 case 0: 1417 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2);
1483 case 1:
1484 case 2:
1485 /*
1486 * HPT36x chips have one channel per function and have
1487 * both channel enable bits located differently and visible
1488 * to both functions -- really stupid design decision... :-(
1489 * Bit 4 is for the primary channel, bit 5 for the secondary.
1490 */
1491 d->host_flags |= IDE_HFLAG_SINGLE;
1492 d->enablebits[0].mask = d->enablebits[0].val = 0x10;
1493 1418
1494 d->udma_mask = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? 1419 if (pin1 != pin2 && dev->irq == dev2->irq) {
1495 ATA_UDMA4 : ATA_UDMA3) : ATA_UDMA2; 1420 printk(KERN_INFO "HPT36x: onboard version of chipset, "
1496 break; 1421 "pin1=%d pin2=%d\n", pin1, pin2);
1497 case 3: 1422 return 1;
1498 case 4:
1499 d->udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4;
1500 break;
1501 default:
1502 rev = 6;
1503 /* fall thru */
1504 case 5:
1505 case 6:
1506 d->udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5;
1507 break;
1508 } 1423 }
1509 1424
1510 d->name = chipset_names[rev]; 1425 return 0;
1511
1512 pci_set_drvdata(dev, info[rev]);
1513
1514 if (rev > 2)
1515 goto init_single;
1516
1517 if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) {
1518 u8 mcr1 = 0, pin1 = 0, pin2 = 0;
1519 int ret;
1520
1521 pci_set_drvdata(dev2, info[rev]);
1522
1523 /*
1524 * Now we'll have to force both channels enabled if
1525 * at least one of them has been enabled by BIOS...
1526 */
1527 pci_read_config_byte(dev, 0x50, &mcr1);
1528 if (mcr1 & 0x30)
1529 pci_write_config_byte(dev, 0x50, mcr1 | 0x30);
1530
1531 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1);
1532 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2);
1533 if (pin1 != pin2 && dev->irq == dev2->irq) {
1534 d->bootable = ON_BOARD;
1535 printk("%s: onboard version of chipset, pin1=%d pin2=%d\n",
1536 d->name, pin1, pin2);
1537 }
1538 ret = ide_setup_pci_devices(dev, dev2, d);
1539 if (ret < 0)
1540 pci_dev_put(dev2);
1541 return ret;
1542 }
1543init_single:
1544 return ide_setup_pci_device(dev, d);
1545} 1426}
1546 1427
1547static ide_pci_device_t hpt366_chipsets[] __devinitdata = { 1428static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
1548 { /* 0 */ 1429 { /* 0 */
1549 .name = "HPT366", 1430 .name = "HPT36x",
1550 .init_setup = init_setup_hpt366,
1551 .init_chipset = init_chipset_hpt366, 1431 .init_chipset = init_chipset_hpt366,
1552 .init_hwif = init_hwif_hpt366, 1432 .init_hwif = init_hwif_hpt366,
1553 .init_dma = init_dma_hpt366, 1433 .init_dma = init_dma_hpt366,
1554 .autodma = AUTODMA, 1434 /*
1555 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1435 * HPT36x chips have one channel per function and have
1556 .bootable = OFF_BOARD, 1436 * both channel enable bits located differently and visible
1437 * to both functions -- really stupid design decision... :-(
1438 * Bit 4 is for the primary channel, bit 5 for the secondary.
1439 */
1440 .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}},
1557 .extra = 240, 1441 .extra = 240,
1442 .host_flags = IDE_HFLAG_SINGLE |
1443 IDE_HFLAG_NO_ATAPI_DMA |
1444 IDE_HFLAG_OFF_BOARD,
1558 .pio_mask = ATA_PIO4, 1445 .pio_mask = ATA_PIO4,
1446 .mwdma_mask = ATA_MWDMA2,
1559 },{ /* 1 */ 1447 },{ /* 1 */
1560 .name = "HPT372A", 1448 .name = "HPT372A",
1561 .init_setup = init_setup_hpt372a,
1562 .init_chipset = init_chipset_hpt366, 1449 .init_chipset = init_chipset_hpt366,
1563 .init_hwif = init_hwif_hpt366, 1450 .init_hwif = init_hwif_hpt366,
1564 .init_dma = init_dma_hpt366, 1451 .init_dma = init_dma_hpt366,
1565 .autodma = AUTODMA,
1566 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1452 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1567 .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
1568 .bootable = OFF_BOARD,
1569 .extra = 240, 1453 .extra = 240,
1454 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
1570 .pio_mask = ATA_PIO4, 1455 .pio_mask = ATA_PIO4,
1456 .mwdma_mask = ATA_MWDMA2,
1571 },{ /* 2 */ 1457 },{ /* 2 */
1572 .name = "HPT302", 1458 .name = "HPT302",
1573 .init_setup = init_setup_hpt302,
1574 .init_chipset = init_chipset_hpt366, 1459 .init_chipset = init_chipset_hpt366,
1575 .init_hwif = init_hwif_hpt366, 1460 .init_hwif = init_hwif_hpt366,
1576 .init_dma = init_dma_hpt366, 1461 .init_dma = init_dma_hpt366,
1577 .autodma = AUTODMA,
1578 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1462 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1579 .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
1580 .bootable = OFF_BOARD,
1581 .extra = 240, 1463 .extra = 240,
1464 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
1582 .pio_mask = ATA_PIO4, 1465 .pio_mask = ATA_PIO4,
1466 .mwdma_mask = ATA_MWDMA2,
1583 },{ /* 3 */ 1467 },{ /* 3 */
1584 .name = "HPT371", 1468 .name = "HPT371",
1585 .init_setup = init_setup_hpt371,
1586 .init_chipset = init_chipset_hpt366, 1469 .init_chipset = init_chipset_hpt366,
1587 .init_hwif = init_hwif_hpt366, 1470 .init_hwif = init_hwif_hpt366,
1588 .init_dma = init_dma_hpt366, 1471 .init_dma = init_dma_hpt366,
1589 .autodma = AUTODMA,
1590 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1472 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1591 .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
1592 .bootable = OFF_BOARD,
1593 .extra = 240, 1473 .extra = 240,
1474 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
1594 .pio_mask = ATA_PIO4, 1475 .pio_mask = ATA_PIO4,
1476 .mwdma_mask = ATA_MWDMA2,
1595 },{ /* 4 */ 1477 },{ /* 4 */
1596 .name = "HPT374", 1478 .name = "HPT374",
1597 .init_setup = init_setup_hpt374,
1598 .init_chipset = init_chipset_hpt366, 1479 .init_chipset = init_chipset_hpt366,
1599 .init_hwif = init_hwif_hpt366, 1480 .init_hwif = init_hwif_hpt366,
1600 .init_dma = init_dma_hpt366, 1481 .init_dma = init_dma_hpt366,
1601 .autodma = AUTODMA,
1602 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1482 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1603 .udma_mask = ATA_UDMA5, 1483 .udma_mask = ATA_UDMA5,
1604 .bootable = OFF_BOARD,
1605 .extra = 240, 1484 .extra = 240,
1485 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
1606 .pio_mask = ATA_PIO4, 1486 .pio_mask = ATA_PIO4,
1487 .mwdma_mask = ATA_MWDMA2,
1607 },{ /* 5 */ 1488 },{ /* 5 */
1608 .name = "HPT372N", 1489 .name = "HPT372N",
1609 .init_setup = init_setup_hpt372n,
1610 .init_chipset = init_chipset_hpt366, 1490 .init_chipset = init_chipset_hpt366,
1611 .init_hwif = init_hwif_hpt366, 1491 .init_hwif = init_hwif_hpt366,
1612 .init_dma = init_dma_hpt366, 1492 .init_dma = init_dma_hpt366,
1613 .autodma = AUTODMA,
1614 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1493 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1615 .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
1616 .bootable = OFF_BOARD,
1617 .extra = 240, 1494 .extra = 240,
1495 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
1618 .pio_mask = ATA_PIO4, 1496 .pio_mask = ATA_PIO4,
1497 .mwdma_mask = ATA_MWDMA2,
1619 } 1498 }
1620}; 1499};
1621 1500
@@ -1626,16 +1505,77 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
1626 * 1505 *
1627 * Called when the PCI registration layer (or the IDE initialization) 1506 * Called when the PCI registration layer (or the IDE initialization)
1628 * finds a device matching our IDE device tables. 1507 * finds a device matching our IDE device tables.
1629 *
1630 * NOTE: since we'll have to modify some fields of the ide_pci_device_t
1631 * structure depending on the chip's revision, we'd better pass a local
1632 * copy down the call chain...
1633 */ 1508 */
1634static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_device_id *id) 1509static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1635{ 1510{
1636 ide_pci_device_t d = hpt366_chipsets[id->driver_data]; 1511 struct hpt_info *info = NULL;
1512 struct pci_dev *dev2 = NULL;
1513 ide_pci_device_t d;
1514 u8 idx = id->driver_data;
1515 u8 rev = dev->revision;
1516
1517 if ((idx == 0 || idx == 4) && (PCI_FUNC(dev->devfn) & 1))
1518 return -ENODEV;
1519
1520 switch (idx) {
1521 case 0:
1522 if (rev < 3)
1523 info = &hpt36x;
1524 else {
1525 static struct hpt_info *hpt37x_info[] =
1526 { &hpt370, &hpt370a, &hpt372, &hpt372n };
1527
1528 info = hpt37x_info[min_t(u8, rev, 6) - 3];
1529 idx++;
1530 }
1531 break;
1532 case 1:
1533 info = (rev > 1) ? &hpt372n : &hpt372a;
1534 break;
1535 case 2:
1536 info = (rev > 1) ? &hpt302n : &hpt302;
1537 break;
1538 case 3:
1539 hpt371_init(dev);
1540 info = (rev > 1) ? &hpt371n : &hpt371;
1541 break;
1542 case 4:
1543 info = &hpt374;
1544 break;
1545 case 5:
1546 info = &hpt372n;
1547 break;
1548 }
1549
1550 d = hpt366_chipsets[idx];
1551
1552 d.name = info->chip_name;
1553 d.udma_mask = info->udma_mask;
1554
1555 pci_set_drvdata(dev, info);
1556
1557 if (info == &hpt36x || info == &hpt374)
1558 dev2 = pci_get_slot(dev->bus, dev->devfn + 1);
1559
1560 if (dev2) {
1561 int ret;
1562
1563 pci_set_drvdata(dev2, info);
1564
1565 if (info == &hpt374)
1566 hpt374_init(dev, dev2);
1567 else {
1568 if (hpt36x_init(dev, dev2))
1569 d.host_flags |= IDE_HFLAG_BOOTABLE;
1570 }
1571
1572 ret = ide_setup_pci_devices(dev, dev2, &d);
1573 if (ret < 0)
1574 pci_dev_put(dev2);
1575 return ret;
1576 }
1637 1577
1638 return d.init_setup(dev, &d); 1578 return ide_setup_pci_device(dev, &d);
1639} 1579}
1640 1580
1641static const struct pci_device_id hpt366_pci_tbl[] = { 1581static const struct pci_device_id hpt366_pci_tbl[] = {
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index 24a71d03744a..dfbe605120cb 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -170,17 +170,9 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
170 hwif->set_dma_mode = &it8213_set_dma_mode; 170 hwif->set_dma_mode = &it8213_set_dma_mode;
171 hwif->set_pio_mode = &it8213_set_pio_mode; 171 hwif->set_pio_mode = &it8213_set_pio_mode;
172 172
173 hwif->drives[0].autotune = 1;
174 hwif->drives[1].autotune = 1;
175
176 if (!hwif->dma_base) 173 if (!hwif->dma_base)
177 return; 174 return;
178 175
179 hwif->atapi_dma = 1;
180 hwif->ultra_mask = 0x7f;
181 hwif->mwdma_mask = 0x06;
182 hwif->swdma_mask = 0x04;
183
184 pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h); 176 pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);
185 177
186 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 178 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
@@ -192,11 +184,13 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
192 { \ 184 { \
193 .name = name_str, \ 185 .name = name_str, \
194 .init_hwif = init_hwif_it8213, \ 186 .init_hwif = init_hwif_it8213, \
195 .autodma = AUTODMA, \
196 .enablebits = {{0x41,0x80,0x80}}, \ 187 .enablebits = {{0x41,0x80,0x80}}, \
197 .bootable = ON_BOARD, \ 188 .host_flags = IDE_HFLAG_SINGLE | \
198 .host_flags = IDE_HFLAG_SINGLE, \ 189 IDE_HFLAG_BOOTABLE, \
199 .pio_mask = ATA_PIO4, \ 190 .pio_mask = ATA_PIO4, \
191 .swdma_mask = ATA_SWDMA2_ONLY, \
192 .mwdma_mask = ATA_MWDMA12_ONLY, \
193 .udma_mask = ATA_UDMA6, \
200 } 194 }
201 195
202static ide_pci_device_t it8213_chipsets[] __devinitdata = { 196static ide_pci_device_t it8213_chipsets[] __devinitdata = {
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index f3391a8698ac..ec45b7247209 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -544,12 +544,10 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
544 544
545 ide_set_hwifdata(hwif, idev); 545 ide_set_hwifdata(hwif, idev);
546 546
547 hwif->atapi_dma = 1;
548
549 pci_read_config_byte(hwif->pci_dev, 0x50, &conf); 547 pci_read_config_byte(hwif->pci_dev, 0x50, &conf);
550 if(conf & 1) { 548 if (conf & 1) {
551 idev->smart = 1; 549 idev->smart = 1;
552 hwif->atapi_dma = 0; 550 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
553 /* Long I/O's although allowed in LBA48 space cause the 551 /* Long I/O's although allowed in LBA48 space cause the
554 onboard firmware to enter the twighlight zone */ 552 onboard firmware to enter the twighlight zone */
555 hwif->rqsize = 256; 553 hwif->rqsize = 256;
@@ -570,10 +568,10 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
570 */ 568 */
571 569
572 pci_read_config_byte(hwif->pci_dev, 0x08, &conf); 570 pci_read_config_byte(hwif->pci_dev, 0x08, &conf);
573 if(conf == 0x10) { 571 if (conf == 0x10) {
574 idev->timing10 = 1; 572 idev->timing10 = 1;
575 hwif->atapi_dma = 0; 573 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
576 if(!idev->smart) 574 if (idev->smart == 0)
577 printk(KERN_WARNING "it821x: Revision 0x10, workarounds activated.\n"); 575 printk(KERN_WARNING "it821x: Revision 0x10, workarounds activated.\n");
578 } 576 }
579 577
@@ -587,14 +585,11 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
587 } else 585 } else
588 hwif->host_flags |= IDE_HFLAG_NO_SET_MODE; 586 hwif->host_flags |= IDE_HFLAG_NO_SET_MODE;
589 587
590 hwif->drives[0].autotune = 1;
591 hwif->drives[1].autotune = 1;
592
593 if (hwif->dma_base == 0) 588 if (hwif->dma_base == 0)
594 return; 589 return;
595 590
596 hwif->ultra_mask = 0x7f; 591 hwif->ultra_mask = ATA_UDMA6;
597 hwif->mwdma_mask = 0x07; 592 hwif->mwdma_mask = ATA_MWDMA2;
598 593
599 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 594 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
600 hwif->cbl = ata66_it821x(hwif); 595 hwif->cbl = ata66_it821x(hwif);
@@ -638,9 +633,8 @@ static unsigned int __devinit init_chipset_it821x(struct pci_dev *dev, const cha
638 .name = name_str, \ 633 .name = name_str, \
639 .init_chipset = init_chipset_it821x, \ 634 .init_chipset = init_chipset_it821x, \
640 .init_hwif = init_hwif_it821x, \ 635 .init_hwif = init_hwif_it821x, \
641 .autodma = AUTODMA, \
642 .bootable = ON_BOARD, \
643 .fixup = it821x_fixups, \ 636 .fixup = it821x_fixups, \
637 .host_flags = IDE_HFLAG_BOOTABLE, \
644 .pio_mask = ATA_PIO4, \ 638 .pio_mask = ATA_PIO4, \
645 } 639 }
646 640
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index bb893ffcc987..2eeff670d9a6 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -111,16 +111,9 @@ static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
111 hwif->set_pio_mode = &jmicron_set_pio_mode; 111 hwif->set_pio_mode = &jmicron_set_pio_mode;
112 hwif->set_dma_mode = &jmicron_set_dma_mode; 112 hwif->set_dma_mode = &jmicron_set_dma_mode;
113 113
114 hwif->drives[0].autotune = 1;
115 hwif->drives[1].autotune = 1;
116
117 if (hwif->dma_base == 0) 114 if (hwif->dma_base == 0)
118 return; 115 return;
119 116
120 hwif->atapi_dma = 1;
121 hwif->ultra_mask = 0x7f;
122 hwif->mwdma_mask = 0x07;
123
124 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 117 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
125 hwif->cbl = ata66_jmicron(hwif); 118 hwif->cbl = ata66_jmicron(hwif);
126} 119}
@@ -128,10 +121,11 @@ static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
128static ide_pci_device_t jmicron_chipset __devinitdata = { 121static ide_pci_device_t jmicron_chipset __devinitdata = {
129 .name = "JMB", 122 .name = "JMB",
130 .init_hwif = init_hwif_jmicron, 123 .init_hwif = init_hwif_jmicron,
131 .autodma = AUTODMA, 124 .host_flags = IDE_HFLAG_BOOTABLE,
132 .bootable = ON_BOARD,
133 .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } }, 125 .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } },
134 .pio_mask = ATA_PIO5, 126 .pio_mask = ATA_PIO5,
127 .mwdma_mask = ATA_MWDMA2,
128 .udma_mask = ATA_UDMA6,
135}; 129};
136 130
137/** 131/**
diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c
index a8cd50ab62fb..d21b58923829 100644
--- a/drivers/ide/pci/ns87415.c
+++ b/drivers/ide/pci/ns87415.c
@@ -266,9 +266,9 @@ static ide_pci_device_t ns87415_chipset __devinitdata = {
266 .init_iops = init_iops_ns87415, 266 .init_iops = init_iops_ns87415,
267#endif 267#endif
268 .init_hwif = init_hwif_ns87415, 268 .init_hwif = init_hwif_ns87415,
269 .autodma = AUTODMA, 269 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
270 .bootable = ON_BOARD, 270 IDE_HFLAG_NO_ATAPI_DMA |
271 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 271 IDE_HFLAG_BOOTABLE,
272}; 272};
273 273
274static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id) 274static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id)
diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c
index 250662ea18ad..3573ffeaaa34 100644
--- a/drivers/ide/pci/opti621.c
+++ b/drivers/ide/pci/opti621.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002 2 * linux/drivers/ide/pci/opti621.c Version 0.8 Aug 27, 2007
3 * 3 *
4 * Copyright (C) 1996-1998 Linus Torvalds & authors (see below) 4 * Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
5 */ 5 */
@@ -57,9 +57,6 @@
57 * There is a 25/33MHz switch in configuration 57 * There is a 25/33MHz switch in configuration
58 * register, but driver is written for use at any frequency which get 58 * register, but driver is written for use at any frequency which get
59 * (use idebus=xx to select PCI bus speed). 59 * (use idebus=xx to select PCI bus speed).
60 * Use hda=autotune and hdb=autotune for automatical tune of the PIO modes.
61 * If you get strange results, do not use this and set PIO manually
62 * by hdparm.
63 * 60 *
64 * Version 0.1, Nov 8, 1996 61 * Version 0.1, Nov 8, 1996
65 * by Jaromir Koutek, for 2.1.8. 62 * by Jaromir Koutek, for 2.1.8.
@@ -332,32 +329,27 @@ static void __devinit init_hwif_opti621 (ide_hwif_t *hwif)
332 hwif->drives[1].drive_data = PIO_DONT_KNOW; 329 hwif->drives[1].drive_data = PIO_DONT_KNOW;
333 330
334 hwif->set_pio_mode = &opti621_set_pio_mode; 331 hwif->set_pio_mode = &opti621_set_pio_mode;
335
336 if (!(hwif->dma_base))
337 return;
338
339 hwif->atapi_dma = 1;
340 hwif->mwdma_mask = 0x07;
341 hwif->swdma_mask = 0x07;
342} 332}
343 333
344static ide_pci_device_t opti621_chipsets[] __devinitdata = { 334static ide_pci_device_t opti621_chipsets[] __devinitdata = {
345 { /* 0 */ 335 { /* 0 */
346 .name = "OPTI621", 336 .name = "OPTI621",
347 .init_hwif = init_hwif_opti621, 337 .init_hwif = init_hwif_opti621,
348 .autodma = AUTODMA,
349 .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, 338 .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
350 .bootable = ON_BOARD, 339 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
340 IDE_HFLAG_BOOTABLE,
351 .pio_mask = ATA_PIO3, 341 .pio_mask = ATA_PIO3,
352 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 342 .swdma_mask = ATA_SWDMA2,
343 .mwdma_mask = ATA_MWDMA2,
353 },{ /* 1 */ 344 },{ /* 1 */
354 .name = "OPTI621X", 345 .name = "OPTI621X",
355 .init_hwif = init_hwif_opti621, 346 .init_hwif = init_hwif_opti621,
356 .autodma = AUTODMA,
357 .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, 347 .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
358 .bootable = ON_BOARD, 348 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
349 IDE_HFLAG_BOOTABLE,
359 .pio_mask = ATA_PIO3, 350 .pio_mask = ATA_PIO3,
360 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 351 .swdma_mask = ATA_SWDMA2,
352 .mwdma_mask = ATA_MWDMA2,
361 } 353 }
362}; 354};
363 355
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index 8704b6f33312..d1e7823454f3 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -332,16 +332,12 @@ static long __devinit detect_pll_input_clock(unsigned long dma_base)
332static void __devinit apple_kiwi_init(struct pci_dev *pdev) 332static void __devinit apple_kiwi_init(struct pci_dev *pdev)
333{ 333{
334 struct device_node *np = pci_device_to_OF_node(pdev); 334 struct device_node *np = pci_device_to_OF_node(pdev);
335 unsigned int class_rev = 0;
336 u8 conf; 335 u8 conf;
337 336
338 if (np == NULL || !of_device_is_compatible(np, "kiwi-root")) 337 if (np == NULL || !of_device_is_compatible(np, "kiwi-root"))
339 return; 338 return;
340 339
341 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev); 340 if (pdev->revision >= 0x03) {
342 class_rev &= 0xff;
343
344 if (class_rev >= 0x03) {
345 /* Setup chip magic config stuff (from darwin) */ 341 /* Setup chip magic config stuff (from darwin) */
346 pci_read_config_byte (pdev, 0x40, &conf); 342 pci_read_config_byte (pdev, 0x40, &conf);
347 pci_write_config_byte(pdev, 0x40, (conf | 0x01)); 343 pci_write_config_byte(pdev, 0x40, (conf | 0x01));
@@ -475,32 +471,76 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
475 hwif->quirkproc = &pdcnew_quirkproc; 471 hwif->quirkproc = &pdcnew_quirkproc;
476 hwif->resetproc = &pdcnew_reset; 472 hwif->resetproc = &pdcnew_reset;
477 473
478 hwif->err_stops_fifo = 1;
479
480 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
481
482 if (hwif->dma_base == 0) 474 if (hwif->dma_base == 0)
483 return; 475 return;
484 476
485 hwif->atapi_dma = 1;
486
487 hwif->ultra_mask = hwif->cds->udma_mask;
488 hwif->mwdma_mask = 0x07;
489
490 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 477 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
491 hwif->cbl = pdcnew_cable_detect(hwif); 478 hwif->cbl = pdcnew_cable_detect(hwif);
492} 479}
493 480
494static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d) 481static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev)
495{ 482{
496 return ide_setup_pci_device(dev, d); 483 struct pci_dev *dev2;
484
485 dev2 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn) + 2,
486 PCI_FUNC(dev->devfn)));
487 if (dev2 &&
488 dev2->vendor == dev->vendor &&
489 dev2->device == dev->device) {
490
491 if (dev2->irq != dev->irq) {
492 dev2->irq = dev->irq;
493 printk(KERN_INFO "PDC20270: PCI config space "
494 "interrupt fixed\n");
495 }
496
497 return dev2;
498 }
499
500 return NULL;
497} 501}
498 502
499static int __devinit init_setup_pdc20270(struct pci_dev *dev, ide_pci_device_t *d) 503#define DECLARE_PDCNEW_DEV(name_str, udma) \
504 { \
505 .name = name_str, \
506 .init_chipset = init_chipset_pdcnew, \
507 .init_hwif = init_hwif_pdc202new, \
508 .host_flags = IDE_HFLAG_POST_SET_MODE | \
509 IDE_HFLAG_ERROR_STOPS_FIFO | \
510 IDE_HFLAG_OFF_BOARD, \
511 .pio_mask = ATA_PIO4, \
512 .mwdma_mask = ATA_MWDMA2, \
513 .udma_mask = udma, \
514 }
515
516static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
517 /* 0 */ DECLARE_PDCNEW_DEV("PDC20268", ATA_UDMA5),
518 /* 1 */ DECLARE_PDCNEW_DEV("PDC20269", ATA_UDMA6),
519 /* 2 */ DECLARE_PDCNEW_DEV("PDC20270", ATA_UDMA5),
520 /* 3 */ DECLARE_PDCNEW_DEV("PDC20271", ATA_UDMA6),
521 /* 4 */ DECLARE_PDCNEW_DEV("PDC20275", ATA_UDMA6),
522 /* 5 */ DECLARE_PDCNEW_DEV("PDC20276", ATA_UDMA6),
523 /* 6 */ DECLARE_PDCNEW_DEV("PDC20277", ATA_UDMA6),
524};
525
526/**
527 * pdc202new_init_one - called when a pdc202xx is found
528 * @dev: the pdc202new device
529 * @id: the matching pci id
530 *
531 * Called when the PCI registration layer (or the IDE initialization)
532 * finds a device matching our IDE device tables.
533 */
534
535static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id)
500{ 536{
537 ide_pci_device_t *d;
501 struct pci_dev *bridge = dev->bus->self; 538 struct pci_dev *bridge = dev->bus->self;
539 u8 idx = id->driver_data;
540
541 d = &pdcnew_chipsets[idx];
502 542
503 if (bridge != NULL && 543 if (idx == 2 && bridge &&
504 bridge->vendor == PCI_VENDOR_ID_DEC && 544 bridge->vendor == PCI_VENDOR_ID_DEC &&
505 bridge->device == PCI_DEVICE_ID_DEC_21150) { 545 bridge->device == PCI_DEVICE_ID_DEC_21150) {
506 struct pci_dev *dev2; 546 struct pci_dev *dev2;
@@ -508,133 +548,26 @@ static int __devinit init_setup_pdc20270(struct pci_dev *dev, ide_pci_device_t *
508 if (PCI_SLOT(dev->devfn) & 2) 548 if (PCI_SLOT(dev->devfn) & 2)
509 return -ENODEV; 549 return -ENODEV;
510 550
511 dev2 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn) + 2, 551 dev2 = pdc20270_get_dev2(dev);
512 PCI_FUNC(dev->devfn)));
513 if (dev2 != NULL &&
514 dev2->vendor == dev->vendor &&
515 dev2->device == dev->device) {
516 int ret;
517
518 if (dev2->irq != dev->irq) {
519 dev2->irq = dev->irq;
520 552
521 printk(KERN_WARNING "%s: PCI config space " 553 if (dev2) {
522 "interrupt fixed.\n", d->name); 554 int ret = ide_setup_pci_devices(dev, dev2, d);
523 }
524
525 ret = ide_setup_pci_devices(dev, dev2, d);
526 if (ret < 0) 555 if (ret < 0)
527 pci_dev_put(dev2); 556 pci_dev_put(dev2);
528 return ret; 557 return ret;
529 } 558 }
530 } 559 }
531 return ide_setup_pci_device(dev, d);
532}
533 560
534static int __devinit init_setup_pdc20276(struct pci_dev *dev, ide_pci_device_t *d) 561 if (idx == 5 && bridge &&
535{
536 struct pci_dev *bridge = dev->bus->self;
537
538 if (bridge != NULL &&
539 bridge->vendor == PCI_VENDOR_ID_INTEL && 562 bridge->vendor == PCI_VENDOR_ID_INTEL &&
540 (bridge->device == PCI_DEVICE_ID_INTEL_I960 || 563 (bridge->device == PCI_DEVICE_ID_INTEL_I960 ||
541 bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { 564 bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) {
542 565 printk(KERN_INFO "PDC20276: attached to I2O RAID controller, "
543 printk(KERN_INFO "%s: attached to I2O RAID controller, " 566 "skipping\n");
544 "skipping.\n", d->name);
545 return -ENODEV; 567 return -ENODEV;
546 } 568 }
547 return ide_setup_pci_device(dev, d);
548}
549
550static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
551 { /* 0 */
552 .name = "PDC20268",
553 .init_setup = init_setup_pdcnew,
554 .init_chipset = init_chipset_pdcnew,
555 .init_hwif = init_hwif_pdc202new,
556 .autodma = AUTODMA,
557 .bootable = OFF_BOARD,
558 .pio_mask = ATA_PIO4,
559 .udma_mask = 0x3f, /* udma0-5 */
560 .host_flags = IDE_HFLAG_POST_SET_MODE,
561 },{ /* 1 */
562 .name = "PDC20269",
563 .init_setup = init_setup_pdcnew,
564 .init_chipset = init_chipset_pdcnew,
565 .init_hwif = init_hwif_pdc202new,
566 .autodma = AUTODMA,
567 .bootable = OFF_BOARD,
568 .pio_mask = ATA_PIO4,
569 .udma_mask = 0x7f, /* udma0-6*/
570 .host_flags = IDE_HFLAG_POST_SET_MODE,
571 },{ /* 2 */
572 .name = "PDC20270",
573 .init_setup = init_setup_pdc20270,
574 .init_chipset = init_chipset_pdcnew,
575 .init_hwif = init_hwif_pdc202new,
576 .autodma = AUTODMA,
577 .bootable = OFF_BOARD,
578 .pio_mask = ATA_PIO4,
579 .udma_mask = 0x3f, /* udma0-5 */
580 .host_flags = IDE_HFLAG_POST_SET_MODE,
581 },{ /* 3 */
582 .name = "PDC20271",
583 .init_setup = init_setup_pdcnew,
584 .init_chipset = init_chipset_pdcnew,
585 .init_hwif = init_hwif_pdc202new,
586 .autodma = AUTODMA,
587 .bootable = OFF_BOARD,
588 .pio_mask = ATA_PIO4,
589 .udma_mask = 0x7f, /* udma0-6*/
590 .host_flags = IDE_HFLAG_POST_SET_MODE,
591 },{ /* 4 */
592 .name = "PDC20275",
593 .init_setup = init_setup_pdcnew,
594 .init_chipset = init_chipset_pdcnew,
595 .init_hwif = init_hwif_pdc202new,
596 .autodma = AUTODMA,
597 .bootable = OFF_BOARD,
598 .pio_mask = ATA_PIO4,
599 .udma_mask = 0x7f, /* udma0-6*/
600 .host_flags = IDE_HFLAG_POST_SET_MODE,
601 },{ /* 5 */
602 .name = "PDC20276",
603 .init_setup = init_setup_pdc20276,
604 .init_chipset = init_chipset_pdcnew,
605 .init_hwif = init_hwif_pdc202new,
606 .autodma = AUTODMA,
607 .bootable = OFF_BOARD,
608 .pio_mask = ATA_PIO4,
609 .udma_mask = 0x7f, /* udma0-6*/
610 .host_flags = IDE_HFLAG_POST_SET_MODE,
611 },{ /* 6 */
612 .name = "PDC20277",
613 .init_setup = init_setup_pdcnew,
614 .init_chipset = init_chipset_pdcnew,
615 .init_hwif = init_hwif_pdc202new,
616 .autodma = AUTODMA,
617 .bootable = OFF_BOARD,
618 .pio_mask = ATA_PIO4,
619 .udma_mask = 0x7f, /* udma0-6*/
620 .host_flags = IDE_HFLAG_POST_SET_MODE,
621 }
622};
623 569
624/** 570 return ide_setup_pci_device(dev, d);
625 * pdc202new_init_one - called when a pdc202xx is found
626 * @dev: the pdc202new device
627 * @id: the matching pci id
628 *
629 * Called when the PCI registration layer (or the IDE initialization)
630 * finds a device matching our IDE device tables.
631 */
632
633static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id)
634{
635 ide_pci_device_t *d = &pdcnew_chipsets[id->driver_data];
636
637 return d->init_setup(dev, d);
638} 571}
639 572
640static const struct pci_device_id pdc202new_pci_tbl[] = { 573static const struct pci_device_id pdc202new_pci_tbl[] = {
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index e1d2337a9f1d..29306121dc4a 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/pdc202xx_old.c Version 0.51 Jul 27, 2007 2 * linux/drivers/ide/pci/pdc202xx_old.c Version 0.52 Aug 27, 2007
3 * 3 *
4 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2006-2007 MontaVista Software, Inc. 5 * Copyright (C) 2006-2007 MontaVista Software, Inc.
@@ -97,9 +97,6 @@ static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
97 case XFER_MW_DMA_2: TB = 0x60; TC = 0x03; break; 97 case XFER_MW_DMA_2: TB = 0x60; TC = 0x03; break;
98 case XFER_MW_DMA_1: TB = 0x60; TC = 0x04; break; 98 case XFER_MW_DMA_1: TB = 0x60; TC = 0x04; break;
99 case XFER_MW_DMA_0: TB = 0xE0; TC = 0x0F; break; 99 case XFER_MW_DMA_0: TB = 0xE0; TC = 0x0F; break;
100 case XFER_SW_DMA_2: TB = 0x60; TC = 0x05; break;
101 case XFER_SW_DMA_1: TB = 0x80; TC = 0x06; break;
102 case XFER_SW_DMA_0: TB = 0xC0; TC = 0x0B; break;
103 case XFER_PIO_4: TA = 0x01; TB = 0x04; break; 100 case XFER_PIO_4: TA = 0x01; TB = 0x04; break;
104 case XFER_PIO_3: TA = 0x02; TB = 0x06; break; 101 case XFER_PIO_3: TA = 0x02; TB = 0x06; break;
105 case XFER_PIO_2: TA = 0x03; TB = 0x08; break; 102 case XFER_PIO_2: TA = 0x03; TB = 0x08; break;
@@ -320,18 +317,9 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
320 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) 317 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246)
321 hwif->resetproc = &pdc202xx_reset; 318 hwif->resetproc = &pdc202xx_reset;
322 319
323 hwif->err_stops_fifo = 1;
324
325 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
326
327 if (hwif->dma_base == 0) 320 if (hwif->dma_base == 0)
328 return; 321 return;
329 322
330 hwif->ultra_mask = hwif->cds->udma_mask;
331 hwif->mwdma_mask = 0x07;
332 hwif->swdma_mask = 0x07;
333 hwif->atapi_dma = 1;
334
335 hwif->dma_lost_irq = &pdc202xx_dma_lost_irq; 323 hwif->dma_lost_irq = &pdc202xx_dma_lost_irq;
336 hwif->dma_timeout = &pdc202xx_dma_timeout; 324 hwif->dma_timeout = &pdc202xx_dma_timeout;
337 325
@@ -377,8 +365,8 @@ static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase)
377 ide_setup_dma(hwif, dmabase, 8); 365 ide_setup_dma(hwif, dmabase, 8);
378} 366}
379 367
380static int __devinit init_setup_pdc202ata4(struct pci_dev *dev, 368static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev,
381 ide_pci_device_t *d) 369 const char *name)
382{ 370{
383 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) { 371 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) {
384 u8 irq = 0, irq2 = 0; 372 u8 irq = 0, irq2 = 0;
@@ -388,90 +376,44 @@ static int __devinit init_setup_pdc202ata4(struct pci_dev *dev,
388 if (irq != irq2) { 376 if (irq != irq2) {
389 pci_write_config_byte(dev, 377 pci_write_config_byte(dev,
390 (PCI_INTERRUPT_LINE)|0x80, irq); /* 0xbc */ 378 (PCI_INTERRUPT_LINE)|0x80, irq); /* 0xbc */
391 printk(KERN_INFO "%s: pci-config space interrupt " 379 printk(KERN_INFO "%s: PCI config space interrupt "
392 "mirror fixed.\n", d->name); 380 "mirror fixed\n", name);
393 } 381 }
394 } 382 }
395 return ide_setup_pci_device(dev, d);
396} 383}
397 384
398static int __devinit init_setup_pdc20265(struct pci_dev *dev, 385#define DECLARE_PDC2026X_DEV(name_str, udma) \
399 ide_pci_device_t *d) 386 { \
400{ 387 .name = name_str, \
401 if ((dev->bus->self) && 388 .init_chipset = init_chipset_pdc202xx, \
402 (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) && 389 .init_hwif = init_hwif_pdc202xx, \
403 ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) || 390 .init_dma = init_dma_pdc202xx, \
404 (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) { 391 .extra = 48, \
405 printk(KERN_INFO "ide: Skipping Promise PDC20265 " 392 .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | \
406 "attached to I2O RAID controller.\n"); 393 IDE_HFLAG_OFF_BOARD, \
407 return -ENODEV; 394 .pio_mask = ATA_PIO4, \
395 .mwdma_mask = ATA_MWDMA2, \
396 .udma_mask = udma, \
408 } 397 }
409 return ide_setup_pci_device(dev, d);
410}
411
412static int __devinit init_setup_pdc202xx(struct pci_dev *dev,
413 ide_pci_device_t *d)
414{
415 return ide_setup_pci_device(dev, d);
416}
417 398
418static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = { 399static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
419 { /* 0 */ 400 { /* 0 */
420 .name = "PDC20246", 401 .name = "PDC20246",
421 .init_setup = init_setup_pdc202ata4,
422 .init_chipset = init_chipset_pdc202xx, 402 .init_chipset = init_chipset_pdc202xx,
423 .init_hwif = init_hwif_pdc202xx, 403 .init_hwif = init_hwif_pdc202xx,
424 .init_dma = init_dma_pdc202xx, 404 .init_dma = init_dma_pdc202xx,
425 .autodma = AUTODMA,
426 .bootable = OFF_BOARD,
427 .extra = 16, 405 .extra = 16,
406 .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO |
407 IDE_HFLAG_OFF_BOARD,
428 .pio_mask = ATA_PIO4, 408 .pio_mask = ATA_PIO4,
429 .udma_mask = 0x07, /* udma0-2 */ 409 .mwdma_mask = ATA_MWDMA2,
430 },{ /* 1 */ 410 .udma_mask = ATA_UDMA2,
431 .name = "PDC20262", 411 },
432 .init_setup = init_setup_pdc202ata4, 412
433 .init_chipset = init_chipset_pdc202xx, 413 /* 1 */ DECLARE_PDC2026X_DEV("PDC20262", ATA_UDMA4),
434 .init_hwif = init_hwif_pdc202xx, 414 /* 2 */ DECLARE_PDC2026X_DEV("PDC20263", ATA_UDMA4),
435 .init_dma = init_dma_pdc202xx, 415 /* 3 */ DECLARE_PDC2026X_DEV("PDC20265", ATA_UDMA5),
436 .autodma = AUTODMA, 416 /* 4 */ DECLARE_PDC2026X_DEV("PDC20267", ATA_UDMA5),
437 .bootable = OFF_BOARD,
438 .extra = 48,
439 .pio_mask = ATA_PIO4,
440 .udma_mask = 0x1f, /* udma0-4 */
441 },{ /* 2 */
442 .name = "PDC20263",
443 .init_setup = init_setup_pdc202ata4,
444 .init_chipset = init_chipset_pdc202xx,
445 .init_hwif = init_hwif_pdc202xx,
446 .init_dma = init_dma_pdc202xx,
447 .autodma = AUTODMA,
448 .bootable = OFF_BOARD,
449 .extra = 48,
450 .pio_mask = ATA_PIO4,
451 .udma_mask = 0x1f, /* udma0-4 */
452 },{ /* 3 */
453 .name = "PDC20265",
454 .init_setup = init_setup_pdc20265,
455 .init_chipset = init_chipset_pdc202xx,
456 .init_hwif = init_hwif_pdc202xx,
457 .init_dma = init_dma_pdc202xx,
458 .autodma = AUTODMA,
459 .bootable = OFF_BOARD,
460 .extra = 48,
461 .pio_mask = ATA_PIO4,
462 .udma_mask = 0x3f, /* udma0-5 */
463 },{ /* 4 */
464 .name = "PDC20267",
465 .init_setup = init_setup_pdc202xx,
466 .init_chipset = init_chipset_pdc202xx,
467 .init_hwif = init_hwif_pdc202xx,
468 .init_dma = init_dma_pdc202xx,
469 .autodma = AUTODMA,
470 .bootable = OFF_BOARD,
471 .extra = 48,
472 .pio_mask = ATA_PIO4,
473 .udma_mask = 0x3f, /* udma0-5 */
474 }
475}; 417};
476 418
477/** 419/**
@@ -485,9 +427,28 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
485 427
486static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) 428static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
487{ 429{
488 ide_pci_device_t *d = &pdc202xx_chipsets[id->driver_data]; 430 ide_pci_device_t *d;
431 u8 idx = id->driver_data;
432
433 d = &pdc202xx_chipsets[idx];
434
435 if (idx < 3)
436 pdc202ata4_fixup_irq(dev, d->name);
437
438 if (idx == 3) {
439 struct pci_dev *bridge = dev->bus->self;
489 440
490 return d->init_setup(dev, d); 441 if (bridge &&
442 bridge->vendor == PCI_VENDOR_ID_INTEL &&
443 (bridge->device == PCI_DEVICE_ID_INTEL_I960 ||
444 bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) {
445 printk(KERN_INFO "ide: Skipping Promise PDC20265 "
446 "attached to I2O RAID controller\n");
447 return -ENODEV;
448 }
449 }
450
451 return ide_setup_pci_device(dev, d);
491} 452}
492 453
493static const struct pci_device_id pdc202xx_pci_tbl[] = { 454static const struct pci_device_id pdc202xx_pci_tbl[] = {
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index a8dd0c0add35..ec0c6e96a213 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/piix.c Version 0.53 Aug 9, 2007 2 * linux/drivers/ide/pci/piix.c Version 0.54 Sep 5, 2007
3 * 3 *
4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer 4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
@@ -254,53 +254,20 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed)
254} 254}
255 255
256/** 256/**
257 * piix_is_ichx - check if ICHx 257 * init_chipset_ich - set up the ICH chipset
258 * @dev: PCI device to check
259 *
260 * returns 1 if ICHx, 0 otherwise.
261 */
262static int piix_is_ichx(struct pci_dev *dev)
263{
264 switch (dev->device) {
265 case PCI_DEVICE_ID_INTEL_82801EB_1:
266 case PCI_DEVICE_ID_INTEL_82801AA_1:
267 case PCI_DEVICE_ID_INTEL_82801AB_1:
268 case PCI_DEVICE_ID_INTEL_82801BA_8:
269 case PCI_DEVICE_ID_INTEL_82801BA_9:
270 case PCI_DEVICE_ID_INTEL_82801CA_10:
271 case PCI_DEVICE_ID_INTEL_82801CA_11:
272 case PCI_DEVICE_ID_INTEL_82801DB_1:
273 case PCI_DEVICE_ID_INTEL_82801DB_10:
274 case PCI_DEVICE_ID_INTEL_82801DB_11:
275 case PCI_DEVICE_ID_INTEL_82801EB_11:
276 case PCI_DEVICE_ID_INTEL_82801E_11:
277 case PCI_DEVICE_ID_INTEL_ESB_2:
278 case PCI_DEVICE_ID_INTEL_ICH6_19:
279 case PCI_DEVICE_ID_INTEL_ICH7_21:
280 case PCI_DEVICE_ID_INTEL_ESB2_18:
281 case PCI_DEVICE_ID_INTEL_ICH8_6:
282 return 1;
283 }
284
285 return 0;
286}
287
288/**
289 * init_chipset_piix - set up the PIIX chipset
290 * @dev: PCI device to set up 258 * @dev: PCI device to set up
291 * @name: Name of the device 259 * @name: Name of the device
292 * 260 *
293 * Initialize the PCI device as required. For the PIIX this turns 261 * Initialize the PCI device as required. For the ICH this turns
294 * out to be nice and simple 262 * out to be nice and simple.
295 */ 263 */
296 264
297static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char *name) 265static unsigned int __devinit init_chipset_ich(struct pci_dev *dev, const char *name)
298{ 266{
299 if (piix_is_ichx(dev)) { 267 u32 extra = 0;
300 unsigned int extra = 0; 268
301 pci_read_config_dword(dev, 0x54, &extra); 269 pci_read_config_dword(dev, 0x54, &extra);
302 pci_write_config_dword(dev, 0x54, extra|0x400); 270 pci_write_config_dword(dev, 0x54, extra | 0x400);
303 }
304 271
305 return 0; 272 return 0;
306} 273}
@@ -318,9 +285,9 @@ static void piix_dma_clear_irq(ide_drive_t *drive)
318 u8 dma_stat; 285 u8 dma_stat;
319 286
320 /* clear the INTR & ERROR bits */ 287 /* clear the INTR & ERROR bits */
321 dma_stat = hwif->INB(hwif->dma_status); 288 dma_stat = inb(hwif->dma_status);
322 /* Should we force the bit as well ? */ 289 /* Should we force the bit as well ? */
323 hwif->OUTB(dma_stat, hwif->dma_status); 290 outb(dma_stat, hwif->dma_status);
324} 291}
325 292
326struct ich_laptop { 293struct ich_laptop {
@@ -374,35 +341,12 @@ static u8 __devinit piix_cable_detect(ide_hwif_t *hwif)
374 341
375static void __devinit init_hwif_piix(ide_hwif_t *hwif) 342static void __devinit init_hwif_piix(ide_hwif_t *hwif)
376{ 343{
377#ifndef CONFIG_IA64
378 if (!hwif->irq)
379 hwif->irq = hwif->channel ? 15 : 14;
380#endif /* CONFIG_IA64 */
381
382 if (hwif->pci_dev->device == PCI_DEVICE_ID_INTEL_82371MX) {
383 /* This is a painful system best to let it self tune for now */
384 return;
385 }
386
387 hwif->set_pio_mode = &piix_set_pio_mode; 344 hwif->set_pio_mode = &piix_set_pio_mode;
388 hwif->set_dma_mode = &piix_set_dma_mode; 345 hwif->set_dma_mode = &piix_set_dma_mode;
389 346
390 hwif->drives[0].autotune = 1;
391 hwif->drives[1].autotune = 1;
392
393 if (!hwif->dma_base) 347 if (!hwif->dma_base)
394 return; 348 return;
395 349
396 /* ICHx need to clear the bmdma status for all interrupts */
397 if (piix_is_ichx(hwif->pci_dev))
398 hwif->ide_dma_clear_irq = &piix_dma_clear_irq;
399
400 hwif->atapi_dma = 1;
401
402 hwif->ultra_mask = hwif->cds->udma_mask;
403 hwif->mwdma_mask = 0x06;
404 hwif->swdma_mask = 0x04;
405
406 if (hwif->ultra_mask & 0x78) { 350 if (hwif->ultra_mask & 0x78) {
407 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 351 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
408 hwif->cbl = piix_cable_detect(hwif); 352 hwif->cbl = piix_cable_detect(hwif);
@@ -412,21 +356,49 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
412 hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0; 356 hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0;
413} 357}
414 358
359static void __devinit init_hwif_ich(ide_hwif_t *hwif)
360{
361 init_hwif_piix(hwif);
362
363 /* ICHx need to clear the BMDMA status for all interrupts */
364 if (hwif->dma_base)
365 hwif->ide_dma_clear_irq = &piix_dma_clear_irq;
366}
367
368#ifndef CONFIG_IA64
369 #define IDE_HFLAGS_PIIX (IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE)
370#else
371 #define IDE_HFLAGS_PIIX IDE_HFLAG_BOOTABLE
372#endif
373
415#define DECLARE_PIIX_DEV(name_str, udma) \ 374#define DECLARE_PIIX_DEV(name_str, udma) \
416 { \ 375 { \
417 .name = name_str, \ 376 .name = name_str, \
418 .init_chipset = init_chipset_piix, \
419 .init_hwif = init_hwif_piix, \ 377 .init_hwif = init_hwif_piix, \
420 .autodma = AUTODMA, \
421 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ 378 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
422 .bootable = ON_BOARD, \ 379 .host_flags = IDE_HFLAGS_PIIX, \
423 .pio_mask = ATA_PIO4, \ 380 .pio_mask = ATA_PIO4, \
381 .swdma_mask = ATA_SWDMA2_ONLY, \
382 .mwdma_mask = ATA_MWDMA12_ONLY, \
424 .udma_mask = udma, \ 383 .udma_mask = udma, \
425 } 384 }
426 385
386#define DECLARE_ICH_DEV(name_str, udma) \
387 { \
388 .name = name_str, \
389 .init_chipset = init_chipset_ich, \
390 .init_hwif = init_hwif_ich, \
391 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
392 .host_flags = IDE_HFLAGS_PIIX, \
393 .pio_mask = ATA_PIO4, \
394 .swdma_mask = ATA_SWDMA2_ONLY, \
395 .mwdma_mask = ATA_MWDMA12_ONLY, \
396 .udma_mask = udma, \
397 }
398
427static ide_pci_device_t piix_pci_info[] __devinitdata = { 399static ide_pci_device_t piix_pci_info[] __devinitdata = {
428 /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ 400 /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */
429 /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */ 401 /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */
430 402
431 /* 2 */ 403 /* 2 */
432 { /* 404 { /*
@@ -435,36 +407,35 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = {
435 * of the bit 14 of the IDETIM register at offset 0x6c 407 * of the bit 14 of the IDETIM register at offset 0x6c
436 */ 408 */
437 .name = "MPIIX", 409 .name = "MPIIX",
438 .init_hwif = init_hwif_piix,
439 .autodma = NODMA,
440 .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}}, 410 .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}},
441 .bootable = ON_BOARD, 411 .host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_NO_DMA |
442 .host_flags = IDE_HFLAG_ISA_PORTS, 412 IDE_HFLAGS_PIIX,
443 .pio_mask = ATA_PIO4, 413 .pio_mask = ATA_PIO4,
414 /* This is a painful system best to let it self tune for now */
444 }, 415 },
445 416
446 /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */ 417 /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */
447 /* 4 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ 418 /* 4 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2),
448 /* 5 */ DECLARE_PIIX_DEV("ICH0", 0x07), /* udma0-2 */ 419 /* 5 */ DECLARE_ICH_DEV("ICH0", ATA_UDMA2),
449 /* 6 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ 420 /* 6 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2),
450 /* 7 */ DECLARE_PIIX_DEV("ICH", 0x1f), /* udma0-4 */ 421 /* 7 */ DECLARE_ICH_DEV("ICH", ATA_UDMA4),
451 /* 8 */ DECLARE_PIIX_DEV("PIIX4", 0x1f), /* udma0-4 */ 422 /* 8 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA4),
452 /* 9 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ 423 /* 9 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2),
453 /* 10 */ DECLARE_PIIX_DEV("ICH2", 0x3f), /* udma0-5 */ 424 /* 10 */ DECLARE_ICH_DEV("ICH2", ATA_UDMA5),
454 /* 11 */ DECLARE_PIIX_DEV("ICH2M", 0x3f), /* udma0-5 */ 425 /* 11 */ DECLARE_ICH_DEV("ICH2M", ATA_UDMA5),
455 /* 12 */ DECLARE_PIIX_DEV("ICH3M", 0x3f), /* udma0-5 */ 426 /* 12 */ DECLARE_ICH_DEV("ICH3M", ATA_UDMA5),
456 /* 13 */ DECLARE_PIIX_DEV("ICH3", 0x3f), /* udma0-5 */ 427 /* 13 */ DECLARE_ICH_DEV("ICH3", ATA_UDMA5),
457 /* 14 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ 428 /* 14 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5),
458 /* 15 */ DECLARE_PIIX_DEV("ICH5", 0x3f), /* udma0-5 */ 429 /* 15 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5),
459 /* 16 */ DECLARE_PIIX_DEV("C-ICH", 0x3f), /* udma0-5 */ 430 /* 16 */ DECLARE_ICH_DEV("C-ICH", ATA_UDMA5),
460 /* 17 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ 431 /* 17 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5),
461 /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA", 0x3f), /* udma0-5 */ 432 /* 18 */ DECLARE_ICH_DEV("ICH5-SATA", ATA_UDMA5),
462 /* 19 */ DECLARE_PIIX_DEV("ICH5", 0x3f), /* udma0-5 */ 433 /* 19 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5),
463 /* 20 */ DECLARE_PIIX_DEV("ICH6", 0x3f), /* udma0-5 */ 434 /* 20 */ DECLARE_ICH_DEV("ICH6", ATA_UDMA5),
464 /* 21 */ DECLARE_PIIX_DEV("ICH7", 0x3f), /* udma0-5 */ 435 /* 21 */ DECLARE_ICH_DEV("ICH7", ATA_UDMA5),
465 /* 22 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ 436 /* 22 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5),
466 /* 23 */ DECLARE_PIIX_DEV("ESB2", 0x3f), /* udma0-5 */ 437 /* 23 */ DECLARE_ICH_DEV("ESB2", ATA_UDMA5),
467 /* 24 */ DECLARE_PIIX_DEV("ICH8M", 0x3f), /* udma0-5 */ 438 /* 24 */ DECLARE_ICH_DEV("ICH8M", ATA_UDMA5),
468}; 439};
469 440
470/** 441/**
diff --git a/drivers/ide/pci/rz1000.c b/drivers/ide/pci/rz1000.c
index 3f506e8d44e3..dd2583ef1ad7 100644
--- a/drivers/ide/pci/rz1000.c
+++ b/drivers/ide/pci/rz1000.c
@@ -52,8 +52,7 @@ static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif)
52static ide_pci_device_t rz1000_chipset __devinitdata = { 52static ide_pci_device_t rz1000_chipset __devinitdata = {
53 .name = "RZ100x", 53 .name = "RZ100x",
54 .init_hwif = init_hwif_rz1000, 54 .init_hwif = init_hwif_rz1000,
55 .autodma = NODMA, 55 .host_flags = IDE_HFLAG_NO_DMA | IDE_HFLAG_BOOTABLE,
56 .bootable = ON_BOARD,
57}; 56};
58 57
59static int __devinit rz1000_init_one(struct pci_dev *dev, const struct pci_device_id *id) 58static int __devinit rz1000_init_one(struct pci_dev *dev, const struct pci_device_id *id)
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index 54c5c98a2e26..b2423e03bf36 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -362,33 +362,26 @@ static int sc1200_resume (struct pci_dev *dev)
362 */ 362 */
363static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif) 363static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif)
364{ 364{
365 if (hwif->mate)
366 hwif->serialized = hwif->mate->serialized = 1;
367
368 hwif->set_pio_mode = &sc1200_set_pio_mode; 365 hwif->set_pio_mode = &sc1200_set_pio_mode;
369 hwif->set_dma_mode = &sc1200_set_dma_mode; 366 hwif->set_dma_mode = &sc1200_set_dma_mode;
370 367
371 hwif->drives[0].autotune = 1;
372 hwif->drives[1].autotune = 1;
373
374 if (hwif->dma_base == 0) 368 if (hwif->dma_base == 0)
375 return; 369 return;
376 370
377 hwif->udma_filter = sc1200_udma_filter; 371 hwif->udma_filter = sc1200_udma_filter;
378 hwif->ide_dma_end = &sc1200_ide_dma_end; 372 hwif->ide_dma_end = &sc1200_ide_dma_end;
379
380 hwif->atapi_dma = 1;
381 hwif->ultra_mask = 0x07;
382 hwif->mwdma_mask = 0x07;
383} 373}
384 374
385static ide_pci_device_t sc1200_chipset __devinitdata = { 375static ide_pci_device_t sc1200_chipset __devinitdata = {
386 .name = "SC1200", 376 .name = "SC1200",
387 .init_hwif = init_hwif_sc1200, 377 .init_hwif = init_hwif_sc1200,
388 .autodma = AUTODMA, 378 .host_flags = IDE_HFLAG_SERIALIZE |
389 .bootable = ON_BOARD, 379 IDE_HFLAG_POST_SET_MODE |
390 .host_flags = IDE_HFLAG_ABUSE_DMA_MODES | IDE_HFLAG_POST_SET_MODE, 380 IDE_HFLAG_ABUSE_DMA_MODES |
381 IDE_HFLAG_BOOTABLE,
391 .pio_mask = ATA_PIO4, 382 .pio_mask = ATA_PIO4,
383 .mwdma_mask = ATA_MWDMA2,
384 .udma_mask = ATA_UDMA2,
392}; 385};
393 386
394static int __devinit sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id) 387static int __devinit sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index bd4c1d3070e4..ae9b50331d2a 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -472,7 +472,7 @@ static u8 scc_udma_filter(ide_drive_t *drive)
472 if ((drive->media != ide_disk) && (mask & 0xE0)) { 472 if ((drive->media != ide_disk) && (mask & 0xE0)) {
473 printk(KERN_INFO "%s: limit %s to UDMA4\n", 473 printk(KERN_INFO "%s: limit %s to UDMA4\n",
474 SCC_PATA_NAME, drive->name); 474 SCC_PATA_NAME, drive->name);
475 mask = 0x1F; 475 mask = ATA_UDMA4;
476 } 476 }
477 477
478 return mask; 478 return mask;
@@ -683,17 +683,10 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
683 hwif->ide_dma_test_irq = scc_dma_test_irq; 683 hwif->ide_dma_test_irq = scc_dma_test_irq;
684 hwif->udma_filter = scc_udma_filter; 684 hwif->udma_filter = scc_udma_filter;
685 685
686 hwif->drives[0].autotune = IDE_TUNE_AUTO; 686 if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN)
687 hwif->drives[1].autotune = IDE_TUNE_AUTO; 687 hwif->ultra_mask = ATA_UDMA6; /* 133MHz */
688 688 else
689 if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN) { 689 hwif->ultra_mask = ATA_UDMA5; /* 100MHz */
690 hwif->ultra_mask = 0x7f; /* 133MHz */
691 } else {
692 hwif->ultra_mask = 0x3f; /* 100MHz */
693 }
694 hwif->mwdma_mask = 0x00;
695 hwif->swdma_mask = 0x00;
696 hwif->atapi_dma = 1;
697 690
698 /* we support 80c cable only. */ 691 /* we support 80c cable only. */
699 hwif->cbl = ATA_CBL_PATA80; 692 hwif->cbl = ATA_CBL_PATA80;
@@ -702,12 +695,10 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
702#define DECLARE_SCC_DEV(name_str) \ 695#define DECLARE_SCC_DEV(name_str) \
703 { \ 696 { \
704 .name = name_str, \ 697 .name = name_str, \
705 .init_setup = init_setup_scc, \
706 .init_iops = init_iops_scc, \ 698 .init_iops = init_iops_scc, \
707 .init_hwif = init_hwif_scc, \ 699 .init_hwif = init_hwif_scc, \
708 .autodma = AUTODMA, \ 700 .host_flags = IDE_HFLAG_SINGLE | \
709 .bootable = ON_BOARD, \ 701 IDE_HFLAG_BOOTABLE, \
710 .host_flags = IDE_HFLAG_SINGLE, \
711 .pio_mask = ATA_PIO4, \ 702 .pio_mask = ATA_PIO4, \
712 } 703 }
713 704
@@ -727,7 +718,8 @@ static ide_pci_device_t scc_chipsets[] __devinitdata = {
727static int __devinit scc_init_one(struct pci_dev *dev, const struct pci_device_id *id) 718static int __devinit scc_init_one(struct pci_dev *dev, const struct pci_device_id *id)
728{ 719{
729 ide_pci_device_t *d = &scc_chipsets[id->driver_data]; 720 ide_pci_device_t *d = &scc_chipsets[id->driver_data];
730 return d->init_setup(dev, d); 721
722 return init_setup_scc(dev, d);
731} 723}
732 724
733/** 725/**
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index d3ffc52e22af..a3d880e21d0b 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -360,23 +360,10 @@ static u8 __devinit ata66_svwks(ide_hwif_t *hwif)
360 360
361static void __devinit init_hwif_svwks (ide_hwif_t *hwif) 361static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
362{ 362{
363 if (!hwif->irq)
364 hwif->irq = hwif->channel ? 15 : 14;
365
366 hwif->set_pio_mode = &svwks_set_pio_mode; 363 hwif->set_pio_mode = &svwks_set_pio_mode;
367 hwif->set_dma_mode = &svwks_set_dma_mode; 364 hwif->set_dma_mode = &svwks_set_dma_mode;
368 hwif->udma_filter = &svwks_udma_filter; 365 hwif->udma_filter = &svwks_udma_filter;
369 366
370 hwif->atapi_dma = 1;
371
372 if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE)
373 hwif->ultra_mask = 0x3f;
374
375 hwif->mwdma_mask = 0x07;
376
377 hwif->drives[0].autotune = 1;
378 hwif->drives[1].autotune = 1;
379
380 if (!hwif->dma_base) 367 if (!hwif->dma_base)
381 return; 368 return;
382 369
@@ -386,72 +373,49 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
386 } 373 }
387} 374}
388 375
389static int __devinit init_setup_svwks (struct pci_dev *dev, ide_pci_device_t *d)
390{
391 return ide_setup_pci_device(dev, d);
392}
393
394static int __devinit init_setup_csb6 (struct pci_dev *dev, ide_pci_device_t *d)
395{
396 if (!(PCI_FUNC(dev->devfn) & 1)) {
397 d->bootable = NEVER_BOARD;
398 if (dev->resource[0].start == 0x01f1)
399 d->bootable = ON_BOARD;
400 }
401
402 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE ||
403 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) &&
404 (!(PCI_FUNC(dev->devfn) & 1)))
405 d->host_flags |= IDE_HFLAG_SINGLE;
406 else
407 d->host_flags &= ~IDE_HFLAG_SINGLE;
408
409 return ide_setup_pci_device(dev, d);
410}
411
412static ide_pci_device_t serverworks_chipsets[] __devinitdata = { 376static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
413 { /* 0 */ 377 { /* 0 */
414 .name = "SvrWks OSB4", 378 .name = "SvrWks OSB4",
415 .init_setup = init_setup_svwks,
416 .init_chipset = init_chipset_svwks, 379 .init_chipset = init_chipset_svwks,
417 .init_hwif = init_hwif_svwks, 380 .init_hwif = init_hwif_svwks,
418 .autodma = AUTODMA, 381 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
419 .bootable = ON_BOARD,
420 .pio_mask = ATA_PIO4, 382 .pio_mask = ATA_PIO4,
383 .mwdma_mask = ATA_MWDMA2,
384 .udma_mask = 0x00, /* UDMA is problematic on OSB4 */
421 },{ /* 1 */ 385 },{ /* 1 */
422 .name = "SvrWks CSB5", 386 .name = "SvrWks CSB5",
423 .init_setup = init_setup_svwks,
424 .init_chipset = init_chipset_svwks, 387 .init_chipset = init_chipset_svwks,
425 .init_hwif = init_hwif_svwks, 388 .init_hwif = init_hwif_svwks,
426 .autodma = AUTODMA, 389 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
427 .bootable = ON_BOARD,
428 .pio_mask = ATA_PIO4, 390 .pio_mask = ATA_PIO4,
391 .mwdma_mask = ATA_MWDMA2,
392 .udma_mask = ATA_UDMA5,
429 },{ /* 2 */ 393 },{ /* 2 */
430 .name = "SvrWks CSB6", 394 .name = "SvrWks CSB6",
431 .init_setup = init_setup_csb6,
432 .init_chipset = init_chipset_svwks, 395 .init_chipset = init_chipset_svwks,
433 .init_hwif = init_hwif_svwks, 396 .init_hwif = init_hwif_svwks,
434 .autodma = AUTODMA, 397 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
435 .bootable = ON_BOARD,
436 .pio_mask = ATA_PIO4, 398 .pio_mask = ATA_PIO4,
399 .mwdma_mask = ATA_MWDMA2,
400 .udma_mask = ATA_UDMA5,
437 },{ /* 3 */ 401 },{ /* 3 */
438 .name = "SvrWks CSB6", 402 .name = "SvrWks CSB6",
439 .init_setup = init_setup_csb6,
440 .init_chipset = init_chipset_svwks, 403 .init_chipset = init_chipset_svwks,
441 .init_hwif = init_hwif_svwks, 404 .init_hwif = init_hwif_svwks,
442 .autodma = AUTODMA, 405 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_SINGLE |
443 .bootable = ON_BOARD, 406 IDE_HFLAG_BOOTABLE,
444 .host_flags = IDE_HFLAG_SINGLE,
445 .pio_mask = ATA_PIO4, 407 .pio_mask = ATA_PIO4,
408 .mwdma_mask = ATA_MWDMA2,
409 .udma_mask = ATA_UDMA5,
446 },{ /* 4 */ 410 },{ /* 4 */
447 .name = "SvrWks HT1000", 411 .name = "SvrWks HT1000",
448 .init_setup = init_setup_svwks,
449 .init_chipset = init_chipset_svwks, 412 .init_chipset = init_chipset_svwks,
450 .init_hwif = init_hwif_svwks, 413 .init_hwif = init_hwif_svwks,
451 .autodma = AUTODMA, 414 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_SINGLE |
452 .bootable = ON_BOARD, 415 IDE_HFLAG_BOOTABLE,
453 .host_flags = IDE_HFLAG_SINGLE,
454 .pio_mask = ATA_PIO4, 416 .pio_mask = ATA_PIO4,
417 .mwdma_mask = ATA_MWDMA2,
418 .udma_mask = ATA_UDMA5,
455 } 419 }
456}; 420};
457 421
@@ -466,9 +430,21 @@ static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
466 430
467static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device_id *id) 431static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device_id *id)
468{ 432{
469 ide_pci_device_t *d = &serverworks_chipsets[id->driver_data]; 433 ide_pci_device_t d;
434 u8 idx = id->driver_data;
435
436 d = serverworks_chipsets[idx];
437
438 if (idx == 2 || idx == 3) {
439 if ((PCI_FUNC(dev->devfn) & 1) == 0) {
440 if (pci_resource_start(dev, 0) != 0x01f1)
441 d.host_flags &= ~IDE_HFLAG_BOOTABLE;
442 d.host_flags |= IDE_HFLAG_SINGLE;
443 } else
444 d.host_flags &= ~IDE_HFLAG_SINGLE;
445 }
470 446
471 return d->init_setup(dev, d); 447 return ide_setup_pci_device(dev, &d);
472} 448}
473 449
474static const struct pci_device_id svwks_pci_tbl[] = { 450static const struct pci_device_id svwks_pci_tbl[] = {
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 9a9474f534e5..5af74ea1d46e 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -592,8 +592,7 @@ ide_init_sgiioc4(ide_hwif_t * hwif)
592 if (hwif->dma_base == 0) 592 if (hwif->dma_base == 0)
593 return; 593 return;
594 594
595 hwif->atapi_dma = 1; 595 hwif->mwdma_mask = ATA_MWDMA2_ONLY;
596 hwif->mwdma_mask = 0x04;
597 596
598 hwif->dma_setup = &sgiioc4_ide_dma_setup; 597 hwif->dma_setup = &sgiioc4_ide_dma_setup;
599 hwif->dma_start = &sgiioc4_ide_dma_start; 598 hwif->dma_start = &sgiioc4_ide_dma_start;
@@ -692,14 +691,12 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
692static unsigned int __devinit 691static unsigned int __devinit
693pci_init_sgiioc4(struct pci_dev *dev) 692pci_init_sgiioc4(struct pci_dev *dev)
694{ 693{
695 unsigned int class_rev;
696 int ret; 694 int ret;
697 695
698 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
699 class_rev &= 0xff;
700 printk(KERN_INFO "%s: IDE controller at PCI slot %s, revision %d\n", 696 printk(KERN_INFO "%s: IDE controller at PCI slot %s, revision %d\n",
701 DRV_NAME, pci_name(dev), class_rev); 697 DRV_NAME, pci_name(dev), dev->revision);
702 if (class_rev < IOC4_SUPPORTED_FIRMWARE_REV) { 698
699 if (dev->revision < IOC4_SUPPORTED_FIRMWARE_REV) {
703 printk(KERN_ERR "Skipping %s IDE controller in slot %s: " 700 printk(KERN_ERR "Skipping %s IDE controller in slot %s: "
704 "firmware is obsolete - please upgrade to " 701 "firmware is obsolete - please upgrade to "
705 "revision46 or higher\n", 702 "revision46 or higher\n",
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 85d0afd00e66..689786df1ede 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/siimage.c Version 1.16 Jul 13 2007 2 * linux/drivers/ide/pci/siimage.c Version 1.17 Oct 18 2007
3 * 3 *
4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com> 5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
@@ -180,7 +180,7 @@ static void sil_set_pio_mode(ide_drive_t *drive, u8 pio)
180 const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 }; 180 const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 };
181 181
182 ide_hwif_t *hwif = HWIF(drive); 182 ide_hwif_t *hwif = HWIF(drive);
183 ide_drive_t *pair = &hwif->drives[drive->dn ^ 1]; 183 ide_drive_t *pair = ide_get_paired_drive(drive);
184 u32 speedt = 0; 184 u32 speedt = 0;
185 u16 speedp = 0; 185 u16 speedp = 0;
186 unsigned long addr = siimage_seldev(drive, 0x04); 186 unsigned long addr = siimage_seldev(drive, 0x04);
@@ -640,13 +640,9 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
640 640
641static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const char *name) 641static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const char *name)
642{ 642{
643 u32 class_rev = 0; 643 u8 rev = dev->revision, tmpbyte = 0, BA5_EN = 0;
644 u8 tmpbyte = 0;
645 u8 BA5_EN = 0;
646 644
647 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 645 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, rev ? 1 : 255);
648 class_rev &= 0xff;
649 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (class_rev) ? 1 : 255);
650 646
651 pci_read_config_byte(dev, 0x8A, &BA5_EN); 647 pci_read_config_byte(dev, 0x8A, &BA5_EN);
652 if ((BA5_EN & 0x01) || (pci_resource_start(dev, 5))) { 648 if ((BA5_EN & 0x01) || (pci_resource_start(dev, 5))) {
@@ -825,19 +821,14 @@ static void __devinit siimage_fixup(ide_hwif_t *hwif)
825 821
826static void __devinit init_iops_siimage(ide_hwif_t *hwif) 822static void __devinit init_iops_siimage(ide_hwif_t *hwif)
827{ 823{
828 struct pci_dev *dev = hwif->pci_dev;
829 u32 class_rev = 0;
830
831 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
832 class_rev &= 0xff;
833
834 hwif->hwif_data = NULL; 824 hwif->hwif_data = NULL;
835 825
836 /* Pessimal until we finish probing */ 826 /* Pessimal until we finish probing */
837 hwif->rqsize = 15; 827 hwif->rqsize = 15;
838 828
839 if (pci_get_drvdata(dev) == NULL) 829 if (pci_get_drvdata(hwif->pci_dev) == NULL)
840 return; 830 return;
831
841 init_mmio_iops_siimage(hwif); 832 init_mmio_iops_siimage(hwif);
842} 833}
843 834
@@ -891,16 +882,11 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
891 } 882 }
892 } 883 }
893 884
894 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
895
896 if (hwif->dma_base == 0) 885 if (hwif->dma_base == 0)
897 return; 886 return;
898 887
899 hwif->ultra_mask = 0x7f; 888 if (is_sata(hwif))
900 hwif->mwdma_mask = 0x07; 889 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
901
902 if (!is_sata(hwif))
903 hwif->atapi_dma = 1;
904 890
905 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 891 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
906 hwif->cbl = ata66_siimage(hwif); 892 hwif->cbl = ata66_siimage(hwif);
@@ -919,9 +905,10 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
919 .init_iops = init_iops_siimage, \ 905 .init_iops = init_iops_siimage, \
920 .init_hwif = init_hwif_siimage, \ 906 .init_hwif = init_hwif_siimage, \
921 .fixup = siimage_fixup, \ 907 .fixup = siimage_fixup, \
922 .autodma = AUTODMA, \ 908 .host_flags = IDE_HFLAG_BOOTABLE, \
923 .bootable = ON_BOARD, \
924 .pio_mask = ATA_PIO4, \ 909 .pio_mask = ATA_PIO4, \
910 .mwdma_mask = ATA_MWDMA2, \
911 .udma_mask = ATA_UDMA6, \
925 } 912 }
926 913
927static ide_pci_device_t siimage_chipsets[] __devinitdata = { 914static ide_pci_device_t siimage_chipsets[] __devinitdata = {
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index 5a54e2e20b3c..c1d280b06391 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -564,25 +564,16 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
564{ 564{
565 u8 udma_rates[] = { 0x00, 0x00, 0x07, 0x1f, 0x3f, 0x3f, 0x7f, 0x7f }; 565 u8 udma_rates[] = { 0x00, 0x00, 0x07, 0x1f, 0x3f, 0x3f, 0x7f, 0x7f };
566 566
567 if (!hwif->irq)
568 hwif->irq = hwif->channel ? 15 : 14;
569
570 hwif->set_pio_mode = &sis_set_pio_mode; 567 hwif->set_pio_mode = &sis_set_pio_mode;
571 hwif->set_dma_mode = &sis_set_dma_mode; 568 hwif->set_dma_mode = &sis_set_dma_mode;
572 569
573 if (chipset_family >= ATA_133) 570 if (chipset_family >= ATA_133)
574 hwif->udma_filter = sis5513_ata133_udma_filter; 571 hwif->udma_filter = sis5513_ata133_udma_filter;
575 572
576 hwif->drives[0].autotune = 1;
577 hwif->drives[1].autotune = 1;
578
579 if (hwif->dma_base == 0) 573 if (hwif->dma_base == 0)
580 return; 574 return;
581 575
582 hwif->atapi_dma = 1;
583
584 hwif->ultra_mask = udma_rates[chipset_family]; 576 hwif->ultra_mask = udma_rates[chipset_family];
585 hwif->mwdma_mask = 0x07;
586 577
587 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 578 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
588 hwif->cbl = ata66_sis5513(hwif); 579 hwif->cbl = ata66_sis5513(hwif);
@@ -592,10 +583,11 @@ static ide_pci_device_t sis5513_chipset __devinitdata = {
592 .name = "SIS5513", 583 .name = "SIS5513",
593 .init_chipset = init_chipset_sis5513, 584 .init_chipset = init_chipset_sis5513,
594 .init_hwif = init_hwif_sis5513, 585 .init_hwif = init_hwif_sis5513,
595 .autodma = NOAUTODMA,
596 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 586 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
597 .bootable = ON_BOARD, 587 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA |
588 IDE_HFLAG_BOOTABLE,
598 .pio_mask = ATA_PIO4, 589 .pio_mask = ATA_PIO4,
590 .mwdma_mask = ATA_MWDMA2,
599}; 591};
600 592
601static int __devinit sis5513_init_one(struct pci_dev *dev, const struct pci_device_id *id) 593static int __devinit sis5513_init_one(struct pci_dev *dev, const struct pci_device_id *id)
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 771efb8884c8..0dce459b1269 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -368,12 +368,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
368 hwif->drives[0].io_32bit = hwif->drives[1].io_32bit = 1; 368 hwif->drives[0].io_32bit = hwif->drives[1].io_32bit = 1;
369 hwif->drives[0].unmask = hwif->drives[1].unmask = 1; 369 hwif->drives[0].unmask = hwif->drives[1].unmask = 1;
370 370
371 /*
372 * We always autotune PIO, this is done before DMA is checked,
373 * so there's no risk of accidentally disabling DMA
374 */
375 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
376
377 if (!hwif->dma_base) 371 if (!hwif->dma_base)
378 return; 372 return;
379 373
@@ -388,8 +382,7 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
388 return; 382 return;
389 } 383 }
390 384
391 hwif->atapi_dma = 1; 385 hwif->mwdma_mask = ATA_MWDMA2;
392 hwif->mwdma_mask = 0x07;
393 386
394 hwif->ide_dma_on = &sl82c105_ide_dma_on; 387 hwif->ide_dma_on = &sl82c105_ide_dma_on;
395 hwif->dma_off_quietly = &sl82c105_dma_off_quietly; 388 hwif->dma_off_quietly = &sl82c105_dma_off_quietly;
@@ -405,9 +398,8 @@ static ide_pci_device_t sl82c105_chipset __devinitdata = {
405 .name = "W82C105", 398 .name = "W82C105",
406 .init_chipset = init_chipset_sl82c105, 399 .init_chipset = init_chipset_sl82c105,
407 .init_hwif = init_hwif_sl82c105, 400 .init_hwif = init_hwif_sl82c105,
408 .autodma = NOAUTODMA,
409 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, 401 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
410 .bootable = ON_BOARD, 402 .host_flags = IDE_HFLAG_NO_AUTODMA | IDE_HFLAG_BOOTABLE,
411 .pio_mask = ATA_PIO5, 403 .pio_mask = ATA_PIO5,
412}; 404};
413 405
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index fa8df6d43832..4f22dffdf8ef 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -133,25 +133,14 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
133 u8 reg47 = 0; 133 u8 reg47 = 0;
134 u8 mask = hwif->channel ? 0x01 : 0x02; /* bit0:Primary */ 134 u8 mask = hwif->channel ? 0x01 : 0x02; /* bit0:Primary */
135 135
136 if (!hwif->irq)
137 hwif->irq = hwif->channel ? 15 : 14;
138
139 hwif->set_pio_mode = &slc90e66_set_pio_mode; 136 hwif->set_pio_mode = &slc90e66_set_pio_mode;
140 hwif->set_dma_mode = &slc90e66_set_dma_mode; 137 hwif->set_dma_mode = &slc90e66_set_dma_mode;
141 138
142 pci_read_config_byte(hwif->pci_dev, 0x47, &reg47); 139 pci_read_config_byte(hwif->pci_dev, 0x47, &reg47);
143 140
144 hwif->drives[0].autotune = 1;
145 hwif->drives[1].autotune = 1;
146
147 if (hwif->dma_base == 0) 141 if (hwif->dma_base == 0)
148 return; 142 return;
149 143
150 hwif->atapi_dma = 1;
151 hwif->ultra_mask = 0x1f;
152 hwif->mwdma_mask = 0x06;
153 hwif->swdma_mask = 0x04;
154
155 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 144 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
156 /* bit[0(1)]: 0:80, 1:40 */ 145 /* bit[0(1)]: 0:80, 1:40 */
157 hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; 146 hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
@@ -160,10 +149,12 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
160static ide_pci_device_t slc90e66_chipset __devinitdata = { 149static ide_pci_device_t slc90e66_chipset __devinitdata = {
161 .name = "SLC90E66", 150 .name = "SLC90E66",
162 .init_hwif = init_hwif_slc90e66, 151 .init_hwif = init_hwif_slc90e66,
163 .autodma = AUTODMA,
164 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 152 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}},
165 .bootable = ON_BOARD, 153 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
166 .pio_mask = ATA_PIO4, 154 .pio_mask = ATA_PIO4,
155 .swdma_mask = ATA_SWDMA2_ONLY,
156 .mwdma_mask = ATA_MWDMA12_ONLY,
157 .udma_mask = ATA_UDMA4,
167}; 158};
168 159
169static int __devinit slc90e66_init_one(struct pci_dev *dev, const struct pci_device_id *id) 160static int __devinit slc90e66_init_one(struct pci_dev *dev, const struct pci_device_id *id)
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index de62db576adc..631506e9b5d2 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * drivers/ide/pci/tc86c001.c Version 1.00 Dec 12, 2006 2 * drivers/ide/pci/tc86c001.c Version 1.01 Sep 5, 2007
3 * 3 *
4 * Copyright (C) 2002 Toshiba Corporation 4 * Copyright (C) 2002 Toshiba Corporation
5 * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
@@ -17,7 +17,7 @@ static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed)
17{ 17{
18 ide_hwif_t *hwif = HWIF(drive); 18 ide_hwif_t *hwif = HWIF(drive);
19 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00); 19 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
20 u16 mode, scr = hwif->INW(scr_port); 20 u16 mode, scr = inw(scr_port);
21 21
22 switch (speed) { 22 switch (speed) {
23 case XFER_UDMA_4: mode = 0x00c0; break; 23 case XFER_UDMA_4: mode = 0x00c0; break;
@@ -65,7 +65,7 @@ static int tc86c001_timer_expiry(ide_drive_t *drive)
65 ide_hwif_t *hwif = HWIF(drive); 65 ide_hwif_t *hwif = HWIF(drive);
66 ide_expiry_t *expiry = ide_get_hwifdata(hwif); 66 ide_expiry_t *expiry = ide_get_hwifdata(hwif);
67 ide_hwgroup_t *hwgroup = HWGROUP(drive); 67 ide_hwgroup_t *hwgroup = HWGROUP(drive);
68 u8 dma_stat = hwif->INB(hwif->dma_status); 68 u8 dma_stat = inb(hwif->dma_status);
69 69
70 /* Restore a higher level driver's expiry handler first. */ 70 /* Restore a higher level driver's expiry handler first. */
71 hwgroup->expiry = expiry; 71 hwgroup->expiry = expiry;
@@ -73,7 +73,7 @@ static int tc86c001_timer_expiry(ide_drive_t *drive)
73 if ((dma_stat & 5) == 1) { /* DMA active and no interrupt */ 73 if ((dma_stat & 5) == 1) { /* DMA active and no interrupt */
74 unsigned long sc_base = hwif->config_data; 74 unsigned long sc_base = hwif->config_data;
75 unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04); 75 unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
76 u8 dma_cmd = hwif->INB(hwif->dma_command); 76 u8 dma_cmd = inb(hwif->dma_command);
77 77
78 printk(KERN_WARNING "%s: DMA interrupt possibly stuck, " 78 printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
79 "attempting recovery...\n", drive->name); 79 "attempting recovery...\n", drive->name);
@@ -135,7 +135,7 @@ static int tc86c001_busproc(ide_drive_t *drive, int state)
135 u16 scr1; 135 u16 scr1;
136 136
137 /* System Control 1 Register bit 11 (ATA Hard Reset) read */ 137 /* System Control 1 Register bit 11 (ATA Hard Reset) read */
138 scr1 = hwif->INW(sc_base + 0x00); 138 scr1 = inw(sc_base + 0x00);
139 139
140 switch (state) { 140 switch (state) {
141 case BUSSTATE_ON: 141 case BUSSTATE_ON:
@@ -165,7 +165,7 @@ static int tc86c001_busproc(ide_drive_t *drive, int state)
165static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) 165static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
166{ 166{
167 unsigned long sc_base = pci_resource_start(hwif->pci_dev, 5); 167 unsigned long sc_base = pci_resource_start(hwif->pci_dev, 5);
168 u16 scr1 = hwif->INW(sc_base + 0x00);; 168 u16 scr1 = inw(sc_base + 0x00);
169 169
170 /* System Control 1 Register bit 15 (Soft Reset) set */ 170 /* System Control 1 Register bit 15 (Soft Reset) set */
171 outw(scr1 | 0x8000, sc_base + 0x00); 171 outw(scr1 | 0x8000, sc_base + 0x00);
@@ -184,8 +184,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
184 184
185 hwif->busproc = &tc86c001_busproc; 185 hwif->busproc = &tc86c001_busproc;
186 186
187 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
188
189 if (!hwif->dma_base) 187 if (!hwif->dma_base)
190 return; 188 return;
191 189
@@ -198,10 +196,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
198 /* Sector Count Register limit */ 196 /* Sector Count Register limit */
199 hwif->rqsize = 0xffff; 197 hwif->rqsize = 0xffff;
200 198
201 hwif->atapi_dma = 1;
202 hwif->ultra_mask = 0x1f;
203 hwif->mwdma_mask = 0x07;
204
205 hwif->dma_start = &tc86c001_dma_start; 199 hwif->dma_start = &tc86c001_dma_start;
206 200
207 if (hwif->cbl != ATA_CBL_PATA40_SHORT) { 201 if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
@@ -209,7 +203,7 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
209 * System Control 1 Register bit 13 (PDIAGN): 203 * System Control 1 Register bit 13 (PDIAGN):
210 * 0=80-pin cable, 1=40-pin cable 204 * 0=80-pin cable, 1=40-pin cable
211 */ 205 */
212 scr1 = hwif->INW(sc_base + 0x00); 206 scr1 = inw(sc_base + 0x00);
213 hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; 207 hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
214 } 208 }
215} 209}
@@ -228,10 +222,10 @@ static ide_pci_device_t tc86c001_chipset __devinitdata = {
228 .name = "TC86C001", 222 .name = "TC86C001",
229 .init_chipset = init_chipset_tc86c001, 223 .init_chipset = init_chipset_tc86c001,
230 .init_hwif = init_hwif_tc86c001, 224 .init_hwif = init_hwif_tc86c001,
231 .autodma = AUTODMA, 225 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD,
232 .bootable = OFF_BOARD,
233 .host_flags = IDE_HFLAG_SINGLE,
234 .pio_mask = ATA_PIO4, 226 .pio_mask = ATA_PIO4,
227 .mwdma_mask = ATA_MWDMA2,
228 .udma_mask = ATA_UDMA4,
235}; 229};
236 230
237static int __devinit tc86c001_init_one(struct pci_dev *dev, 231static int __devinit tc86c001_init_one(struct pci_dev *dev,
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c
index 4075c907f05c..30b52f62699a 100644
--- a/drivers/ide/pci/triflex.c
+++ b/drivers/ide/pci/triflex.c
@@ -100,22 +100,16 @@ static void __devinit init_hwif_triflex(ide_hwif_t *hwif)
100{ 100{
101 hwif->set_pio_mode = &triflex_set_pio_mode; 101 hwif->set_pio_mode = &triflex_set_pio_mode;
102 hwif->set_dma_mode = &triflex_set_mode; 102 hwif->set_dma_mode = &triflex_set_mode;
103
104 if (hwif->dma_base == 0)
105 return;
106
107 hwif->atapi_dma = 1;
108 hwif->mwdma_mask = 0x07;
109 hwif->swdma_mask = 0x07;
110} 103}
111 104
112static ide_pci_device_t triflex_device __devinitdata = { 105static ide_pci_device_t triflex_device __devinitdata = {
113 .name = "TRIFLEX", 106 .name = "TRIFLEX",
114 .init_hwif = init_hwif_triflex, 107 .init_hwif = init_hwif_triflex,
115 .autodma = AUTODMA,
116 .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}}, 108 .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}},
117 .bootable = ON_BOARD, 109 .host_flags = IDE_HFLAG_BOOTABLE,
118 .pio_mask = ATA_PIO4, 110 .pio_mask = ATA_PIO4,
111 .swdma_mask = ATA_SWDMA2,
112 .mwdma_mask = ATA_MWDMA2,
119}; 113};
120 114
121static int __devinit triflex_init_one(struct pci_dev *dev, 115static int __devinit triflex_init_one(struct pci_dev *dev,
diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c
index e3d943ada7b0..140d486f6237 100644
--- a/drivers/ide/pci/trm290.c
+++ b/drivers/ide/pci/trm290.c
@@ -250,7 +250,6 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
250 u8 reg = 0; 250 u8 reg = 0;
251 struct pci_dev *dev = hwif->pci_dev; 251 struct pci_dev *dev = hwif->pci_dev;
252 252
253 hwif->no_lba48 = 1;
254 hwif->chipset = ide_trm290; 253 hwif->chipset = ide_trm290;
255 cfgbase = pci_resource_start(dev, 4); 254 cfgbase = pci_resource_start(dev, 4);
256 if ((dev->class & 5) && cfgbase) { 255 if ((dev->class & 5) && cfgbase) {
@@ -324,11 +323,13 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
324static ide_pci_device_t trm290_chipset __devinitdata = { 323static ide_pci_device_t trm290_chipset __devinitdata = {
325 .name = "TRM290", 324 .name = "TRM290",
326 .init_hwif = init_hwif_trm290, 325 .init_hwif = init_hwif_trm290,
327 .autodma = NOAUTODMA, 326 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
328 .bootable = ON_BOARD,
329#if 0 /* play it safe for now */ 327#if 0 /* play it safe for now */
330 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 328 IDE_HFLAG_TRUST_BIOS_FOR_DMA |
331#endif 329#endif
330 IDE_HFLAG_NO_AUTODMA |
331 IDE_HFLAG_BOOTABLE |
332 IDE_HFLAG_NO_LBA48,
332}; 333};
333 334
334static int __devinit trm290_init_one(struct pci_dev *dev, const struct pci_device_id *id) 335static int __devinit trm290_init_one(struct pci_dev *dev, const struct pci_device_id *id)
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index b25fb65b240e..c8022a92a0e3 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -437,17 +437,12 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
437 for (i = 0; i < 2; i++) { 437 for (i = 0; i < 2; i++) {
438 hwif->drives[i].io_32bit = 1; 438 hwif->drives[i].io_32bit = 1;
439 hwif->drives[i].unmask = (vdev->via_config->flags & VIA_NO_UNMASK) ? 0 : 1; 439 hwif->drives[i].unmask = (vdev->via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
440 hwif->drives[i].autotune = 1;
441 } 440 }
442 441
443 if (!hwif->dma_base) 442 if (!hwif->dma_base)
444 return; 443 return;
445 444
446 hwif->atapi_dma = 1;
447
448 hwif->ultra_mask = vdev->via_config->udma_mask; 445 hwif->ultra_mask = vdev->via_config->udma_mask;
449 hwif->mwdma_mask = 0x07;
450 hwif->swdma_mask = 0x07;
451 446
452 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 447 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
453 hwif->cbl = via82cxxx_cable_detect(hwif); 448 hwif->cbl = via82cxxx_cable_detect(hwif);
@@ -458,24 +453,27 @@ static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = {
458 .name = "VP_IDE", 453 .name = "VP_IDE",
459 .init_chipset = init_chipset_via82cxxx, 454 .init_chipset = init_chipset_via82cxxx,
460 .init_hwif = init_hwif_via82cxxx, 455 .init_hwif = init_hwif_via82cxxx,
461 .autodma = NOAUTODMA,
462 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, 456 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
463 .bootable = ON_BOARD, 457 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
464 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST 458 IDE_HFLAG_PIO_NO_DOWNGRADE |
465 | IDE_HFLAG_PIO_NO_DOWNGRADE 459 IDE_HFLAG_POST_SET_MODE |
466 | IDE_HFLAG_POST_SET_MODE, 460 IDE_HFLAG_NO_AUTODMA |
461 IDE_HFLAG_BOOTABLE,
467 .pio_mask = ATA_PIO5, 462 .pio_mask = ATA_PIO5,
463 .swdma_mask = ATA_SWDMA2,
464 .mwdma_mask = ATA_MWDMA2,
468 },{ /* 1 */ 465 },{ /* 1 */
469 .name = "VP_IDE", 466 .name = "VP_IDE",
470 .init_chipset = init_chipset_via82cxxx, 467 .init_chipset = init_chipset_via82cxxx,
471 .init_hwif = init_hwif_via82cxxx, 468 .init_hwif = init_hwif_via82cxxx,
472 .autodma = AUTODMA,
473 .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, 469 .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
474 .bootable = ON_BOARD, 470 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
475 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST 471 IDE_HFLAG_PIO_NO_DOWNGRADE |
476 | IDE_HFLAG_PIO_NO_DOWNGRADE 472 IDE_HFLAG_POST_SET_MODE |
477 | IDE_HFLAG_POST_SET_MODE, 473 IDE_HFLAG_BOOTABLE,
478 .pio_mask = ATA_PIO5, 474 .pio_mask = ATA_PIO5,
475 .swdma_mask = ATA_SWDMA2,
476 .mwdma_mask = ATA_MWDMA2,
479 } 477 }
480}; 478};
481 479
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 1d25a3433008..c55479356768 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -1780,7 +1780,6 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1780 hwif->dma_timeout = &ide_dma_timeout; 1780 hwif->dma_timeout = &ide_dma_timeout;
1781 hwif->dma_lost_irq = &pmac_ide_dma_lost_irq; 1781 hwif->dma_lost_irq = &pmac_ide_dma_lost_irq;
1782 1782
1783 hwif->atapi_dma = 1;
1784 switch(pmif->kind) { 1783 switch(pmif->kind) {
1785 case controller_sh_ata6: 1784 case controller_sh_ata6:
1786 hwif->ultra_mask = pmif->cable_80 ? 0x7f : 0x07; 1785 hwif->ultra_mask = pmif->cable_80 ? 0x7f : 0x07;
diff --git a/drivers/ide/setup-pci.c b/drivers/ide/setup-pci.c
index 3d101f73f910..fff567bcedbe 100644
--- a/drivers/ide/setup-pci.c
+++ b/drivers/ide/setup-pci.c
@@ -147,6 +147,7 @@ static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
147#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 147#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
148/** 148/**
149 * ide_get_or_set_dma_base - setup BMIBA 149 * ide_get_or_set_dma_base - setup BMIBA
150 * @d: IDE pci device data
150 * @hwif: Interface 151 * @hwif: Interface
151 * 152 *
152 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. 153 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
@@ -154,7 +155,7 @@ static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
154 * and enforce IDE simplex rules. 155 * and enforce IDE simplex rules.
155 */ 156 */
156 157
157static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif) 158static unsigned long ide_get_or_set_dma_base(ide_pci_device_t *d, ide_hwif_t *hwif)
158{ 159{
159 unsigned long dma_base = 0; 160 unsigned long dma_base = 0;
160 struct pci_dev *dev = hwif->pci_dev; 161 struct pci_dev *dev = hwif->pci_dev;
@@ -165,14 +166,15 @@ static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif)
165 if (hwif->mate && hwif->mate->dma_base) { 166 if (hwif->mate && hwif->mate->dma_base) {
166 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); 167 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
167 } else { 168 } else {
168 dma_base = pci_resource_start(dev, 4); 169 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
169 if (!dma_base) { 170
170 printk(KERN_ERR "%s: dma_base is invalid\n", 171 dma_base = pci_resource_start(dev, baridx);
171 hwif->cds->name); 172
172 } 173 if (dma_base == 0)
174 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
173 } 175 }
174 176
175 if (dma_base) { 177 if ((d->host_flags & IDE_HFLAG_CS5520) == 0 && dma_base) {
176 u8 simplex_stat = 0; 178 u8 simplex_stat = 0;
177 dma_base += hwif->channel ? 8 : 0; 179 dma_base += hwif->channel ? 8 : 0;
178 180
@@ -183,13 +185,13 @@ static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif)
183 case PCI_DEVICE_ID_CMD_643: 185 case PCI_DEVICE_ID_CMD_643:
184 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE: 186 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
185 case PCI_DEVICE_ID_REVOLUTION: 187 case PCI_DEVICE_ID_REVOLUTION:
186 simplex_stat = hwif->INB(dma_base + 2); 188 simplex_stat = inb(dma_base + 2);
187 hwif->OUTB((simplex_stat&0x60),(dma_base + 2)); 189 outb(simplex_stat & 0x60, dma_base + 2);
188 simplex_stat = hwif->INB(dma_base + 2); 190 simplex_stat = inb(dma_base + 2);
189 if (simplex_stat & 0x80) { 191 if (simplex_stat & 0x80) {
190 printk(KERN_INFO "%s: simplex device: " 192 printk(KERN_INFO "%s: simplex device: "
191 "DMA forced\n", 193 "DMA forced\n",
192 hwif->cds->name); 194 d->name);
193 } 195 }
194 break; 196 break;
195 default: 197 default:
@@ -212,8 +214,8 @@ static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif)
212 */ 214 */
213 if (hwif->mate && hwif->mate->dma_base) { 215 if (hwif->mate && hwif->mate->dma_base) {
214 printk(KERN_INFO "%s: simplex device: " 216 printk(KERN_INFO "%s: simplex device: "
215 "DMA disabled\n", 217 "DMA disabled\n",
216 hwif->cds->name); 218 d->name);
217 dma_base = 0; 219 dma_base = 0;
218 } 220 }
219 } 221 }
@@ -360,6 +362,7 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d,
360{ 362{
361 unsigned long ctl = 0, base = 0; 363 unsigned long ctl = 0, base = 0;
362 ide_hwif_t *hwif; 364 ide_hwif_t *hwif;
365 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0;
363 366
364 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { 367 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
365 /* Possibly we should fail if these checks report true */ 368 /* Possibly we should fail if these checks report true */
@@ -380,7 +383,7 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d,
380 ctl = port ? 0x374 : 0x3f4; 383 ctl = port ? 0x374 : 0x3f4;
381 base = port ? 0x170 : 0x1f0; 384 base = port ? 0x170 : 0x1f0;
382 } 385 }
383 if ((hwif = ide_match_hwif(base, d->bootable, d->name)) == NULL) 386 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL)
384 return NULL; /* no room in ide_hwifs[] */ 387 return NULL; /* no room in ide_hwifs[] */
385 if (hwif->io_ports[IDE_DATA_OFFSET] != base || 388 if (hwif->io_ports[IDE_DATA_OFFSET] != base ||
386 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) { 389 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) {
@@ -427,12 +430,13 @@ static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwi
427static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif) 430static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
428{ 431{
429 u16 pcicmd; 432 u16 pcicmd;
433
430 pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 434 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
431 435
432 if ((d->autodma == AUTODMA) || 436 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
433 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && 437 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
434 (dev->class & 0x80))) { 438 (dev->class & 0x80))) {
435 unsigned long dma_base = ide_get_or_set_dma_base(hwif); 439 unsigned long dma_base = ide_get_or_set_dma_base(d, hwif);
436 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) { 440 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
437 /* 441 /*
438 * Set up BM-DMA capability 442 * Set up BM-DMA capability
@@ -474,7 +478,6 @@ static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwi
474static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config) 478static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config)
475{ 479{
476 int ret; 480 int ret;
477 u32 class_rev;
478 u16 pcicmd; 481 u16 pcicmd;
479 482
480 if (noisy) 483 if (noisy)
@@ -497,10 +500,9 @@ static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, in
497 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name); 500 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
498 } 501 }
499 502
500 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
501 class_rev &= 0xff;
502 if (noisy) 503 if (noisy)
503 printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev); 504 printk(KERN_INFO "%s: chipset revision %d\n",
505 d->name, dev->revision);
504out: 506out:
505 return ret; 507 return ret;
506} 508}
@@ -557,17 +559,27 @@ void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, a
557 if (d->init_iops) 559 if (d->init_iops)
558 d->init_iops(hwif); 560 d->init_iops(hwif);
559 561
560 if (d->autodma == NODMA) 562 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0)
561 goto bypass_legacy_dma;
562
563 if(d->init_setup_dma)
564 d->init_setup_dma(dev, d, hwif);
565 else
566 ide_hwif_setup_dma(dev, d, hwif); 563 ide_hwif_setup_dma(dev, d, hwif);
567bypass_legacy_dma: 564
565 if ((d->host_flags & IDE_HFLAG_LEGACY_IRQS) && hwif->irq == 0)
566 hwif->irq = port ? 15 : 14;
567
568 hwif->host_flags = d->host_flags; 568 hwif->host_flags = d->host_flags;
569 hwif->pio_mask = d->pio_mask; 569 hwif->pio_mask = d->pio_mask;
570 570
571 if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate)
572 hwif->mate->serialized = hwif->serialized = 1;
573
574 if (hwif->dma_base) {
575 hwif->swdma_mask = d->swdma_mask;
576 hwif->mwdma_mask = d->mwdma_mask;
577 hwif->ultra_mask = d->udma_mask;
578 }
579
580 hwif->drives[0].autotune = 1;
581 hwif->drives[1].autotune = 1;
582
571 if (d->init_hwif) 583 if (d->init_hwif)
572 /* Call chipset-specific routine 584 /* Call chipset-specific routine
573 * for each enabled hwif 585 * for each enabled hwif
diff --git a/include/linux/ide.h b/include/linux/ide.h
index e39ee2fa2607..19db0a4ae447 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -685,7 +685,6 @@ typedef struct hwif_s {
685 685
686 u8 pio_mask; 686 u8 pio_mask;
687 687
688 u8 atapi_dma; /* host supports atapi_dma */
689 u8 ultra_mask; 688 u8 ultra_mask;
690 u8 mwdma_mask; 689 u8 mwdma_mask;
691 u8 swdma_mask; 690 u8 swdma_mask;
@@ -797,12 +796,9 @@ typedef struct hwif_s {
797 unsigned serialized : 1; /* serialized all channel operation */ 796 unsigned serialized : 1; /* serialized all channel operation */
798 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */ 797 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
799 unsigned reset : 1; /* reset after probe */ 798 unsigned reset : 1; /* reset after probe */
800 unsigned no_lba48 : 1; /* 1 = cannot do LBA48 */
801 unsigned no_lba48_dma : 1; /* 1 = cannot do LBA48 DMA */
802 unsigned auto_poll : 1; /* supports nop auto-poll */ 799 unsigned auto_poll : 1; /* supports nop auto-poll */
803 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */ 800 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
804 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */ 801 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
805 unsigned err_stops_fifo : 1; /* 1=data FIFO is cleared by an error */
806 unsigned mmio : 1; /* host uses MMIO */ 802 unsigned mmio : 1; /* host uses MMIO */
807 803
808 struct device gendev; 804 struct device gendev;
@@ -1211,19 +1207,6 @@ extern void default_hwif_iops(ide_hwif_t *);
1211extern void default_hwif_mmiops(ide_hwif_t *); 1207extern void default_hwif_mmiops(ide_hwif_t *);
1212extern void default_hwif_transport(ide_hwif_t *); 1208extern void default_hwif_transport(ide_hwif_t *);
1213 1209
1214#define ON_BOARD 1
1215#define NEVER_BOARD 0
1216
1217#ifdef CONFIG_BLK_DEV_OFFBOARD
1218# define OFF_BOARD ON_BOARD
1219#else /* CONFIG_BLK_DEV_OFFBOARD */
1220# define OFF_BOARD NEVER_BOARD
1221#endif /* CONFIG_BLK_DEV_OFFBOARD */
1222
1223#define NODMA 0
1224#define NOAUTODMA 1
1225#define AUTODMA 2
1226
1227typedef struct ide_pci_enablebit_s { 1210typedef struct ide_pci_enablebit_s {
1228 u8 reg; /* byte pci reg holding the enable-bit */ 1211 u8 reg; /* byte pci reg holding the enable-bit */
1229 u8 mask; /* mask to isolate the enable-bit */ 1212 u8 mask; /* mask to isolate the enable-bit */
@@ -1258,24 +1241,48 @@ enum {
1258 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), 1241 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1259 /* host uses VDMA */ 1242 /* host uses VDMA */
1260 IDE_HFLAG_VDMA = (1 << 11), 1243 IDE_HFLAG_VDMA = (1 << 11),
1244 /* ATAPI DMA is unsupported */
1245 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1246 /* set if host is a "bootable" controller */
1247 IDE_HFLAG_BOOTABLE = (1 << 13),
1248 /* host doesn't support DMA */
1249 IDE_HFLAG_NO_DMA = (1 << 14),
1250 /* check if host is PCI IDE device before allowing DMA */
1251 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1252 /* host is CS5510/CS5520 */
1253 IDE_HFLAG_CS5520 = (1 << 16),
1254 /* no LBA48 */
1255 IDE_HFLAG_NO_LBA48 = (1 << 17),
1256 /* no LBA48 DMA */
1257 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1258 /* data FIFO is cleared by an error */
1259 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1260 /* serialize ports */
1261 IDE_HFLAG_SERIALIZE = (1 << 20),
1262 /* use legacy IRQs */
1263 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1261}; 1264};
1262 1265
1266#ifdef CONFIG_BLK_DEV_OFFBOARD
1267# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1268#else
1269# define IDE_HFLAG_OFF_BOARD 0
1270#endif
1271
1263typedef struct ide_pci_device_s { 1272typedef struct ide_pci_device_s {
1264 char *name; 1273 char *name;
1265 int (*init_setup)(struct pci_dev *, struct ide_pci_device_s *);
1266 void (*init_setup_dma)(struct pci_dev *, struct ide_pci_device_s *, ide_hwif_t *);
1267 unsigned int (*init_chipset)(struct pci_dev *, const char *); 1274 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1268 void (*init_iops)(ide_hwif_t *); 1275 void (*init_iops)(ide_hwif_t *);
1269 void (*init_hwif)(ide_hwif_t *); 1276 void (*init_hwif)(ide_hwif_t *);
1270 void (*init_dma)(ide_hwif_t *, unsigned long); 1277 void (*init_dma)(ide_hwif_t *, unsigned long);
1271 void (*fixup)(ide_hwif_t *); 1278 void (*fixup)(ide_hwif_t *);
1272 u8 autodma;
1273 ide_pci_enablebit_t enablebits[2]; 1279 ide_pci_enablebit_t enablebits[2];
1274 u8 bootable;
1275 unsigned int extra; 1280 unsigned int extra;
1276 struct ide_pci_device_s *next; 1281 struct ide_pci_device_s *next;
1277 u16 host_flags; 1282 u32 host_flags;
1278 u8 pio_mask; 1283 u8 pio_mask;
1284 u8 swdma_mask;
1285 u8 mwdma_mask;
1279 u8 udma_mask; 1286 u8 udma_mask;
1280} ide_pci_device_t; 1287} ide_pci_device_t;
1281 1288
@@ -1454,4 +1461,11 @@ static inline int hwif_to_node(ide_hwif_t *hwif)
1454 return dev ? pcibus_to_node(dev->bus) : -1; 1461 return dev ? pcibus_to_node(dev->bus) : -1;
1455} 1462}
1456 1463
1464static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1465{
1466 ide_hwif_t *hwif = HWIF(drive);
1467
1468 return &hwif->drives[(drive->dn ^ 1) & 1];
1469}
1470
1457#endif /* _IDE_H */ 1471#endif /* _IDE_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 05:06:17 -0500