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authorRalf Baechle <ralf@linux-mips.org>2007-10-19 02:55:18 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-19 13:15:57 -0400
commit9c9ad7917bf22350c59e6568d6d570f9be102d00 (patch)
treea3ab8d3d238fce64314019e66f36a372d3d3239a
parent723ee050aa2dd4aa483bdb30413dcd7d48829783 (diff)
[MIPS] time: Delete dead code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/kernel/time.c59
1 files changed, 0 insertions, 59 deletions
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index ea7cfe766a8e..ca38fb0faed3 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -40,17 +40,6 @@
40#include <irq.h> 40#include <irq.h>
41 41
42/* 42/*
43 * The integer part of the number of usecs per jiffy is taken from tick,
44 * but the fractional part is not recorded, so we calculate it using the
45 * initial value of HZ. This aids systems where tick isn't really an
46 * integer (e.g. for HZ = 128).
47 */
48#define USECS_PER_JIFFY TICK_SIZE
49#define USECS_PER_JIFFY_FRAC ((unsigned long)(u32)((1000000ULL << 32) / HZ))
50
51#define TICK_SIZE (tick_nsec / 1000)
52
53/*
54 * forward reference 43 * forward reference
55 */ 44 */
56DEFINE_SPINLOCK(rtc_lock); 45DEFINE_SPINLOCK(rtc_lock);
@@ -213,54 +202,6 @@ void __init __weak plat_timer_setup(struct irqaction *irq)
213{ 202{
214} 203}
215 204
216#ifdef CONFIG_MIPS_MT_SMTC
217DEFINE_PER_CPU(struct clock_event_device, smtc_dummy_clockevent_device);
218
219static void smtc_set_mode(enum clock_event_mode mode,
220 struct clock_event_device *evt)
221{
222}
223
224static void mips_broadcast(cpumask_t mask)
225{
226 unsigned int cpu;
227
228 for_each_cpu_mask(cpu, mask)
229 smtc_send_ipi(cpu, SMTC_CLOCK_TICK, 0);
230}
231
232static void setup_smtc_dummy_clockevent_device(void)
233{
234 //uint64_t mips_freq = mips_hpt_^frequency;
235 unsigned int cpu = smp_processor_id();
236 struct clock_event_device *cd;
237
238 cd = &per_cpu(smtc_dummy_clockevent_device, cpu);
239
240 cd->name = "SMTC";
241 cd->features = CLOCK_EVT_FEAT_DUMMY;
242
243 /* Calculate the min / max delta */
244 cd->mult = 0; //div_sc((unsigned long) mips_freq, NSEC_PER_SEC, 32);
245 cd->shift = 0; //32;
246 cd->max_delta_ns = 0; //clockevent_delta2ns(0x7fffffff, cd);
247 cd->min_delta_ns = 0; //clockevent_delta2ns(0x30, cd);
248
249 cd->rating = 200;
250 cd->irq = 17; //-1;
251// if (cpu)
252// cd->cpumask = CPU_MASK_ALL; // cpumask_of_cpu(cpu);
253// else
254 cd->cpumask = cpumask_of_cpu(cpu);
255
256 cd->set_mode = smtc_set_mode;
257
258 cd->broadcast = mips_broadcast;
259
260 clockevents_register_device(cd);
261}
262#endif
263
264void __init time_init(void) 205void __init time_init(void)
265{ 206{
266 plat_time_init(); 207 plat_time_init();