diff options
author | Francisco Jerez <currojerez@riseup.net> | 2009-12-25 20:09:36 -0500 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2010-01-10 18:06:38 -0500 |
commit | 8c032ce73ef3a9e5a14c35ea3de19f1b9a8d7c0d (patch) | |
tree | 5fb5838a8fd14fd40b699a1150685e6b18fea663 | |
parent | f03a314b4671407c4ff69a2d85e72413e8064c48 (diff) |
drm/nouveau: Use the software object for fencing.
This should avoid a race condition on nv0x, if we're doing it with
actual PGRAPH objects and a there's a fence within the FIFO DMA fetch
area when a context switch kicks in.
In that case we get an ILLEGAL_MTHD interrupt as expected, but the
values in PGRAPH_TRAPPED_ADDR aren't calculated correctly and they're
almost useless (e.g. you can see ILLEGAL_MTHDs for the now inactive
channel, with a wrong offset/data pair).
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_fence.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv04_graph.c | 5 |
2 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c index dacac9a0842a..faddf53ff9ed 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fence.c +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c | |||
@@ -142,7 +142,7 @@ nouveau_fence_emit(struct nouveau_fence *fence) | |||
142 | list_add_tail(&fence->entry, &chan->fence.pending); | 142 | list_add_tail(&fence->entry, &chan->fence.pending); |
143 | spin_unlock_irqrestore(&chan->fence.lock, flags); | 143 | spin_unlock_irqrestore(&chan->fence.lock, flags); |
144 | 144 | ||
145 | BEGIN_RING(chan, NvSubM2MF, USE_REFCNT ? 0x0050 : 0x0150, 1); | 145 | BEGIN_RING(chan, NvSubSw, USE_REFCNT ? 0x0050 : 0x0150, 1); |
146 | OUT_RING(chan, fence->sequence); | 146 | OUT_RING(chan, fence->sequence); |
147 | FIRE_RING(chan); | 147 | FIRE_RING(chan); |
148 | 148 | ||
diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c index d561d773c0f4..82c77f9d4695 100644 --- a/drivers/gpu/drm/nouveau/nv04_graph.c +++ b/drivers/gpu/drm/nouveau/nv04_graph.c | |||
@@ -547,7 +547,7 @@ nv04_graph_mthd_set_operation(struct nouveau_channel *chan, int grclass, | |||
547 | return 0; | 547 | return 0; |
548 | } | 548 | } |
549 | 549 | ||
550 | static struct nouveau_pgraph_object_method nv04_graph_mthds_m2mf[] = { | 550 | static struct nouveau_pgraph_object_method nv04_graph_mthds_sw[] = { |
551 | { 0x0150, nv04_graph_mthd_set_ref }, | 551 | { 0x0150, nv04_graph_mthd_set_ref }, |
552 | {} | 552 | {} |
553 | }; | 553 | }; |
@@ -558,7 +558,7 @@ static struct nouveau_pgraph_object_method nv04_graph_mthds_set_operation[] = { | |||
558 | }; | 558 | }; |
559 | 559 | ||
560 | struct nouveau_pgraph_object_class nv04_graph_grclass[] = { | 560 | struct nouveau_pgraph_object_class nv04_graph_grclass[] = { |
561 | { 0x0039, false, nv04_graph_mthds_m2mf }, | 561 | { 0x0039, false, NULL }, |
562 | { 0x004a, false, nv04_graph_mthds_set_operation }, /* gdirect */ | 562 | { 0x004a, false, nv04_graph_mthds_set_operation }, /* gdirect */ |
563 | { 0x005f, false, nv04_graph_mthds_set_operation }, /* imageblit */ | 563 | { 0x005f, false, nv04_graph_mthds_set_operation }, /* imageblit */ |
564 | { 0x0061, false, nv04_graph_mthds_set_operation }, /* ifc */ | 564 | { 0x0061, false, nv04_graph_mthds_set_operation }, /* ifc */ |
@@ -574,6 +574,7 @@ struct nouveau_pgraph_object_class nv04_graph_grclass[] = { | |||
574 | { 0x0053, false, NULL }, /* surf3d */ | 574 | { 0x0053, false, NULL }, /* surf3d */ |
575 | { 0x0054, false, NULL }, /* tex_tri */ | 575 | { 0x0054, false, NULL }, /* tex_tri */ |
576 | { 0x0055, false, NULL }, /* multitex_tri */ | 576 | { 0x0055, false, NULL }, /* multitex_tri */ |
577 | { 0x506e, true, nv04_graph_mthds_sw }, | ||
577 | {} | 578 | {} |
578 | }; | 579 | }; |
579 | 580 | ||