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authorDavid Brownell <dbrownell@users.sourceforge.net>2009-03-31 15:30:04 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2009-06-16 00:44:40 -0400
commit84e250ffa76dddc1bad84e04248a27f442c25986 (patch)
treeb253b1e2b030b160d2c458aece9c8122446e433f
parentcc835e321a9f3fa5e083436872e198095f4805b9 (diff)
musb: proper hookup to transceiver drivers
Let the otg_transceiver in MUSB be managed by an external driver; don't assume it's integrated. OMAP3 chips need it to be external, and there may be ways to interact with the transceiver which add functionality to the system. Platform init code is responsible for setting up the transeciver, probably using the NOP transceiver for integrated transceivers. External ones will use whatever the board init code provided, such as twl4030 or something more hands-off. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat
-rw-r--r--drivers/usb/musb/Kconfig2
-rw-r--r--drivers/usb/musb/blackfin.c11
-rw-r--r--drivers/usb/musb/davinci.c33
-rw-r--r--drivers/usb/musb/musb_core.c96
-rw-r--r--drivers/usb/musb/musb_core.h2
-rw-r--r--drivers/usb/musb/musb_gadget.c38
-rw-r--r--drivers/usb/musb/musb_host.c2
-rw-r--r--drivers/usb/musb/musb_virthub.c20
-rw-r--r--drivers/usb/musb/omap2430.c62
-rw-r--r--drivers/usb/musb/tusb6010.c70
10 files changed, 181 insertions, 155 deletions
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index b66e8544d8b9..70073b157f0a 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -10,6 +10,7 @@ comment "Enable Host or Gadget support to see Inventra options"
10config USB_MUSB_HDRC 10config USB_MUSB_HDRC
11 depends on (USB || USB_GADGET) && HAVE_CLK 11 depends on (USB || USB_GADGET) && HAVE_CLK
12 depends on !SUPERH 12 depends on !SUPERH
13 select NOP_USB_XCEIV if ARCH_DAVINCI
13 select TWL4030_USB if MACH_OMAP_3430SDP 14 select TWL4030_USB if MACH_OMAP_3430SDP
14 select USB_OTG_UTILS 15 select USB_OTG_UTILS
15 tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)' 16 tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)'
@@ -55,6 +56,7 @@ comment "Blackfin high speed USB Support"
55config USB_TUSB6010 56config USB_TUSB6010
56 boolean "TUSB 6010 support" 57 boolean "TUSB 6010 support"
57 depends on USB_MUSB_HDRC && !USB_MUSB_SOC 58 depends on USB_MUSB_HDRC && !USB_MUSB_SOC
59 select NOP_USB_XCEIV
58 default y 60 default y
59 help 61 help
60 The TUSB 6010 chip, from Texas Instruments, connects a discrete 62 The TUSB 6010 chip, from Texas Instruments, connects a discrete
diff --git a/drivers/usb/musb/blackfin.c b/drivers/usb/musb/blackfin.c
index 786134852092..f2f66ebc7362 100644
--- a/drivers/usb/musb/blackfin.c
+++ b/drivers/usb/musb/blackfin.c
@@ -143,7 +143,7 @@ static void musb_conn_timer_handler(unsigned long _musb)
143 u16 val; 143 u16 val;
144 144
145 spin_lock_irqsave(&musb->lock, flags); 145 spin_lock_irqsave(&musb->lock, flags);
146 switch (musb->xceiv.state) { 146 switch (musb->xceiv->state) {
147 case OTG_STATE_A_IDLE: 147 case OTG_STATE_A_IDLE:
148 case OTG_STATE_A_WAIT_BCON: 148 case OTG_STATE_A_WAIT_BCON:
149 /* Start a new session */ 149 /* Start a new session */
@@ -154,7 +154,7 @@ static void musb_conn_timer_handler(unsigned long _musb)
154 val = musb_readw(musb->mregs, MUSB_DEVCTL); 154 val = musb_readw(musb->mregs, MUSB_DEVCTL);
155 if (!(val & MUSB_DEVCTL_BDEVICE)) { 155 if (!(val & MUSB_DEVCTL_BDEVICE)) {
156 gpio_set_value(musb->config->gpio_vrsel, 1); 156 gpio_set_value(musb->config->gpio_vrsel, 1);
157 musb->xceiv.state = OTG_STATE_A_WAIT_BCON; 157 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
158 } else { 158 } else {
159 gpio_set_value(musb->config->gpio_vrsel, 0); 159 gpio_set_value(musb->config->gpio_vrsel, 0);
160 160
@@ -247,6 +247,11 @@ int __init musb_platform_init(struct musb *musb)
247 } 247 }
248 gpio_direction_output(musb->config->gpio_vrsel, 0); 248 gpio_direction_output(musb->config->gpio_vrsel, 0);
249 249
250 usb_nop_xceiv_register();
251 musb->xceiv = otg_get_transceiver();
252 if (!musb->xceiv)
253 return -ENODEV;
254
250 if (ANOMALY_05000346) { 255 if (ANOMALY_05000346) {
251 bfin_write_USB_APHY_CALIB(ANOMALY_05000346_value); 256 bfin_write_USB_APHY_CALIB(ANOMALY_05000346_value);
252 SSYNC(); 257 SSYNC();
@@ -291,7 +296,7 @@ int __init musb_platform_init(struct musb *musb)
291 musb_conn_timer_handler, (unsigned long) musb); 296 musb_conn_timer_handler, (unsigned long) musb);
292 } 297 }
293 if (is_peripheral_enabled(musb)) 298 if (is_peripheral_enabled(musb))
294 musb->xceiv.set_power = bfin_set_power; 299 musb->xceiv->set_power = bfin_set_power;
295 300
296 musb->isr = blackfin_interrupt; 301 musb->isr = blackfin_interrupt;
297 302
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index 6e14e06ff820..180d7daa4099 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -215,7 +215,7 @@ static void otg_timer(unsigned long _musb)
215 DBG(7, "poll devctl %02x (%s)\n", devctl, otg_state_string(musb)); 215 DBG(7, "poll devctl %02x (%s)\n", devctl, otg_state_string(musb));
216 216
217 spin_lock_irqsave(&musb->lock, flags); 217 spin_lock_irqsave(&musb->lock, flags);
218 switch (musb->xceiv.state) { 218 switch (musb->xceiv->state) {
219 case OTG_STATE_A_WAIT_VFALL: 219 case OTG_STATE_A_WAIT_VFALL:
220 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL 220 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
221 * seems to mis-handle session "start" otherwise (or in our 221 * seems to mis-handle session "start" otherwise (or in our
@@ -226,7 +226,7 @@ static void otg_timer(unsigned long _musb)
226 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 226 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
227 break; 227 break;
228 } 228 }
229 musb->xceiv.state = OTG_STATE_A_WAIT_VRISE; 229 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
230 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, 230 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
231 MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT); 231 MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
232 break; 232 break;
@@ -251,7 +251,7 @@ static void otg_timer(unsigned long _musb)
251 if (devctl & MUSB_DEVCTL_BDEVICE) 251 if (devctl & MUSB_DEVCTL_BDEVICE)
252 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 252 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
253 else 253 else
254 musb->xceiv.state = OTG_STATE_A_IDLE; 254 musb->xceiv->state = OTG_STATE_A_IDLE;
255 break; 255 break;
256 default: 256 default:
257 break; 257 break;
@@ -325,21 +325,21 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci)
325 * to stop registering in devctl. 325 * to stop registering in devctl.
326 */ 326 */
327 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 327 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
328 musb->xceiv.state = OTG_STATE_A_WAIT_VFALL; 328 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
329 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 329 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
330 WARNING("VBUS error workaround (delay coming)\n"); 330 WARNING("VBUS error workaround (delay coming)\n");
331 } else if (is_host_enabled(musb) && drvvbus) { 331 } else if (is_host_enabled(musb) && drvvbus) {
332 musb->is_active = 1; 332 musb->is_active = 1;
333 MUSB_HST_MODE(musb); 333 MUSB_HST_MODE(musb);
334 musb->xceiv.default_a = 1; 334 musb->xceiv->default_a = 1;
335 musb->xceiv.state = OTG_STATE_A_WAIT_VRISE; 335 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
336 portstate(musb->port1_status |= USB_PORT_STAT_POWER); 336 portstate(musb->port1_status |= USB_PORT_STAT_POWER);
337 del_timer(&otg_workaround); 337 del_timer(&otg_workaround);
338 } else { 338 } else {
339 musb->is_active = 0; 339 musb->is_active = 0;
340 MUSB_DEV_MODE(musb); 340 MUSB_DEV_MODE(musb);
341 musb->xceiv.default_a = 0; 341 musb->xceiv->default_a = 0;
342 musb->xceiv.state = OTG_STATE_B_IDLE; 342 musb->xceiv->state = OTG_STATE_B_IDLE;
343 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); 343 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
344 } 344 }
345 345
@@ -361,7 +361,7 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci)
361 361
362 /* poll for ID change */ 362 /* poll for ID change */
363 if (is_otg_enabled(musb) 363 if (is_otg_enabled(musb)
364 && musb->xceiv.state == OTG_STATE_B_IDLE) 364 && musb->xceiv->state == OTG_STATE_B_IDLE)
365 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 365 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
366 366
367 spin_unlock_irqrestore(&musb->lock, flags); 367 spin_unlock_irqrestore(&musb->lock, flags);
@@ -380,6 +380,11 @@ int __init musb_platform_init(struct musb *musb)
380 void __iomem *tibase = musb->ctrl_base; 380 void __iomem *tibase = musb->ctrl_base;
381 u32 revision; 381 u32 revision;
382 382
383 usb_nop_xceiv_register();
384 musb->xceiv = otg_get_transceiver();
385 if (!musb->xceiv)
386 return -ENODEV;
387
383 musb->mregs += DAVINCI_BASE_OFFSET; 388 musb->mregs += DAVINCI_BASE_OFFSET;
384 389
385 clk_enable(musb->clock); 390 clk_enable(musb->clock);
@@ -387,7 +392,7 @@ int __init musb_platform_init(struct musb *musb)
387 /* returns zero if e.g. not clocked */ 392 /* returns zero if e.g. not clocked */
388 revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG); 393 revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
389 if (revision == 0) 394 if (revision == 0)
390 return -ENODEV; 395 goto fail;
391 396
392 if (is_host_enabled(musb)) 397 if (is_host_enabled(musb))
393 setup_timer(&otg_workaround, otg_timer, (unsigned long) musb); 398 setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
@@ -421,6 +426,10 @@ int __init musb_platform_init(struct musb *musb)
421 426
422 musb->isr = davinci_interrupt; 427 musb->isr = davinci_interrupt;
423 return 0; 428 return 0;
429
430fail:
431 usb_nop_xceiv_unregister();
432 return -ENODEV;
424} 433}
425 434
426int musb_platform_exit(struct musb *musb) 435int musb_platform_exit(struct musb *musb)
@@ -431,7 +440,7 @@ int musb_platform_exit(struct musb *musb)
431 davinci_source_power(musb, 0 /*off*/, 1); 440 davinci_source_power(musb, 0 /*off*/, 1);
432 441
433 /* delay, to avoid problems with module reload */ 442 /* delay, to avoid problems with module reload */
434 if (is_host_enabled(musb) && musb->xceiv.default_a) { 443 if (is_host_enabled(musb) && musb->xceiv->default_a) {
435 int maxdelay = 30; 444 int maxdelay = 30;
436 u8 devctl, warn = 0; 445 u8 devctl, warn = 0;
437 446
@@ -460,5 +469,7 @@ int musb_platform_exit(struct musb *musb)
460 469
461 clk_disable(musb->clock); 470 clk_disable(musb->clock);
462 471
472 usb_nop_xceiv_unregister();
473
463 return 0; 474 return 0;
464} 475}
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 324459b619f7..2460c3986c96 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -267,7 +267,7 @@ void musb_load_testpacket(struct musb *musb)
267 267
268const char *otg_state_string(struct musb *musb) 268const char *otg_state_string(struct musb *musb)
269{ 269{
270 switch (musb->xceiv.state) { 270 switch (musb->xceiv->state) {
271 case OTG_STATE_A_IDLE: return "a_idle"; 271 case OTG_STATE_A_IDLE: return "a_idle";
272 case OTG_STATE_A_WAIT_VRISE: return "a_wait_vrise"; 272 case OTG_STATE_A_WAIT_VRISE: return "a_wait_vrise";
273 case OTG_STATE_A_WAIT_BCON: return "a_wait_bcon"; 273 case OTG_STATE_A_WAIT_BCON: return "a_wait_bcon";
@@ -302,11 +302,11 @@ void musb_otg_timer_func(unsigned long data)
302 unsigned long flags; 302 unsigned long flags;
303 303
304 spin_lock_irqsave(&musb->lock, flags); 304 spin_lock_irqsave(&musb->lock, flags);
305 switch (musb->xceiv.state) { 305 switch (musb->xceiv->state) {
306 case OTG_STATE_B_WAIT_ACON: 306 case OTG_STATE_B_WAIT_ACON:
307 DBG(1, "HNP: b_wait_acon timeout; back to b_peripheral\n"); 307 DBG(1, "HNP: b_wait_acon timeout; back to b_peripheral\n");
308 musb_g_disconnect(musb); 308 musb_g_disconnect(musb);
309 musb->xceiv.state = OTG_STATE_B_PERIPHERAL; 309 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
310 musb->is_active = 0; 310 musb->is_active = 0;
311 break; 311 break;
312 case OTG_STATE_A_WAIT_BCON: 312 case OTG_STATE_A_WAIT_BCON:
@@ -331,20 +331,20 @@ void musb_hnp_stop(struct musb *musb)
331 void __iomem *mbase = musb->mregs; 331 void __iomem *mbase = musb->mregs;
332 u8 reg; 332 u8 reg;
333 333
334 switch (musb->xceiv.state) { 334 switch (musb->xceiv->state) {
335 case OTG_STATE_A_PERIPHERAL: 335 case OTG_STATE_A_PERIPHERAL:
336 case OTG_STATE_A_WAIT_VFALL: 336 case OTG_STATE_A_WAIT_VFALL:
337 case OTG_STATE_A_WAIT_BCON: 337 case OTG_STATE_A_WAIT_BCON:
338 DBG(1, "HNP: Switching back to A-host\n"); 338 DBG(1, "HNP: Switching back to A-host\n");
339 musb_g_disconnect(musb); 339 musb_g_disconnect(musb);
340 musb->xceiv.state = OTG_STATE_A_IDLE; 340 musb->xceiv->state = OTG_STATE_A_IDLE;
341 MUSB_HST_MODE(musb); 341 MUSB_HST_MODE(musb);
342 musb->is_active = 0; 342 musb->is_active = 0;
343 break; 343 break;
344 case OTG_STATE_B_HOST: 344 case OTG_STATE_B_HOST:
345 DBG(1, "HNP: Disabling HR\n"); 345 DBG(1, "HNP: Disabling HR\n");
346 hcd->self.is_b_host = 0; 346 hcd->self.is_b_host = 0;
347 musb->xceiv.state = OTG_STATE_B_PERIPHERAL; 347 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
348 MUSB_DEV_MODE(musb); 348 MUSB_DEV_MODE(musb);
349 reg = musb_readb(mbase, MUSB_POWER); 349 reg = musb_readb(mbase, MUSB_POWER);
350 reg |= MUSB_POWER_SUSPENDM; 350 reg |= MUSB_POWER_SUSPENDM;
@@ -402,7 +402,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
402 402
403 if (devctl & MUSB_DEVCTL_HM) { 403 if (devctl & MUSB_DEVCTL_HM) {
404#ifdef CONFIG_USB_MUSB_HDRC_HCD 404#ifdef CONFIG_USB_MUSB_HDRC_HCD
405 switch (musb->xceiv.state) { 405 switch (musb->xceiv->state) {
406 case OTG_STATE_A_SUSPEND: 406 case OTG_STATE_A_SUSPEND:
407 /* remote wakeup? later, GetPortStatus 407 /* remote wakeup? later, GetPortStatus
408 * will stop RESUME signaling 408 * will stop RESUME signaling
@@ -425,12 +425,12 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
425 musb->rh_timer = jiffies 425 musb->rh_timer = jiffies
426 + msecs_to_jiffies(20); 426 + msecs_to_jiffies(20);
427 427
428 musb->xceiv.state = OTG_STATE_A_HOST; 428 musb->xceiv->state = OTG_STATE_A_HOST;
429 musb->is_active = 1; 429 musb->is_active = 1;
430 usb_hcd_resume_root_hub(musb_to_hcd(musb)); 430 usb_hcd_resume_root_hub(musb_to_hcd(musb));
431 break; 431 break;
432 case OTG_STATE_B_WAIT_ACON: 432 case OTG_STATE_B_WAIT_ACON:
433 musb->xceiv.state = OTG_STATE_B_PERIPHERAL; 433 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
434 musb->is_active = 1; 434 musb->is_active = 1;
435 MUSB_DEV_MODE(musb); 435 MUSB_DEV_MODE(musb);
436 break; 436 break;
@@ -441,11 +441,11 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
441 } 441 }
442#endif 442#endif
443 } else { 443 } else {
444 switch (musb->xceiv.state) { 444 switch (musb->xceiv->state) {
445#ifdef CONFIG_USB_MUSB_HDRC_HCD 445#ifdef CONFIG_USB_MUSB_HDRC_HCD
446 case OTG_STATE_A_SUSPEND: 446 case OTG_STATE_A_SUSPEND:
447 /* possibly DISCONNECT is upcoming */ 447 /* possibly DISCONNECT is upcoming */
448 musb->xceiv.state = OTG_STATE_A_HOST; 448 musb->xceiv->state = OTG_STATE_A_HOST;
449 usb_hcd_resume_root_hub(musb_to_hcd(musb)); 449 usb_hcd_resume_root_hub(musb_to_hcd(musb));
450 break; 450 break;
451#endif 451#endif
@@ -490,7 +490,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
490 */ 490 */
491 musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); 491 musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
492 musb->ep0_stage = MUSB_EP0_START; 492 musb->ep0_stage = MUSB_EP0_START;
493 musb->xceiv.state = OTG_STATE_A_IDLE; 493 musb->xceiv->state = OTG_STATE_A_IDLE;
494 MUSB_HST_MODE(musb); 494 MUSB_HST_MODE(musb);
495 musb_set_vbus(musb, 1); 495 musb_set_vbus(musb, 1);
496 496
@@ -516,7 +516,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
516 * REVISIT: do delays from lots of DEBUG_KERNEL checks 516 * REVISIT: do delays from lots of DEBUG_KERNEL checks
517 * make trouble here, keeping VBUS < 4.4V ? 517 * make trouble here, keeping VBUS < 4.4V ?
518 */ 518 */
519 switch (musb->xceiv.state) { 519 switch (musb->xceiv->state) {
520 case OTG_STATE_A_HOST: 520 case OTG_STATE_A_HOST:
521 /* recovery is dicey once we've gotten past the 521 /* recovery is dicey once we've gotten past the
522 * initial stages of enumeration, but if VBUS 522 * initial stages of enumeration, but if VBUS
@@ -602,11 +602,11 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
602 MUSB_HST_MODE(musb); 602 MUSB_HST_MODE(musb);
603 603
604 /* indicate new connection to OTG machine */ 604 /* indicate new connection to OTG machine */
605 switch (musb->xceiv.state) { 605 switch (musb->xceiv->state) {
606 case OTG_STATE_B_PERIPHERAL: 606 case OTG_STATE_B_PERIPHERAL:
607 if (int_usb & MUSB_INTR_SUSPEND) { 607 if (int_usb & MUSB_INTR_SUSPEND) {
608 DBG(1, "HNP: SUSPEND+CONNECT, now b_host\n"); 608 DBG(1, "HNP: SUSPEND+CONNECT, now b_host\n");
609 musb->xceiv.state = OTG_STATE_B_HOST; 609 musb->xceiv->state = OTG_STATE_B_HOST;
610 hcd->self.is_b_host = 1; 610 hcd->self.is_b_host = 1;
611 int_usb &= ~MUSB_INTR_SUSPEND; 611 int_usb &= ~MUSB_INTR_SUSPEND;
612 } else 612 } else
@@ -614,13 +614,13 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
614 break; 614 break;
615 case OTG_STATE_B_WAIT_ACON: 615 case OTG_STATE_B_WAIT_ACON:
616 DBG(1, "HNP: Waiting to switch to b_host state\n"); 616 DBG(1, "HNP: Waiting to switch to b_host state\n");
617 musb->xceiv.state = OTG_STATE_B_HOST; 617 musb->xceiv->state = OTG_STATE_B_HOST;
618 hcd->self.is_b_host = 1; 618 hcd->self.is_b_host = 1;
619 break; 619 break;
620 default: 620 default:
621 if ((devctl & MUSB_DEVCTL_VBUS) 621 if ((devctl & MUSB_DEVCTL_VBUS)
622 == (3 << MUSB_DEVCTL_VBUS_SHIFT)) { 622 == (3 << MUSB_DEVCTL_VBUS_SHIFT)) {
623 musb->xceiv.state = OTG_STATE_A_HOST; 623 musb->xceiv->state = OTG_STATE_A_HOST;
624 hcd->self.is_b_host = 0; 624 hcd->self.is_b_host = 0;
625 } 625 }
626 break; 626 break;
@@ -650,7 +650,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
650 } 650 }
651 } else if (is_peripheral_capable()) { 651 } else if (is_peripheral_capable()) {
652 DBG(1, "BUS RESET as %s\n", otg_state_string(musb)); 652 DBG(1, "BUS RESET as %s\n", otg_state_string(musb));
653 switch (musb->xceiv.state) { 653 switch (musb->xceiv->state) {
654#ifdef CONFIG_USB_OTG 654#ifdef CONFIG_USB_OTG
655 case OTG_STATE_A_SUSPEND: 655 case OTG_STATE_A_SUSPEND:
656 /* We need to ignore disconnect on suspend 656 /* We need to ignore disconnect on suspend
@@ -673,12 +673,12 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
673 case OTG_STATE_B_WAIT_ACON: 673 case OTG_STATE_B_WAIT_ACON:
674 DBG(1, "HNP: RESET (%s), to b_peripheral\n", 674 DBG(1, "HNP: RESET (%s), to b_peripheral\n",
675 otg_state_string(musb)); 675 otg_state_string(musb));
676 musb->xceiv.state = OTG_STATE_B_PERIPHERAL; 676 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
677 musb_g_reset(musb); 677 musb_g_reset(musb);
678 break; 678 break;
679#endif 679#endif
680 case OTG_STATE_B_IDLE: 680 case OTG_STATE_B_IDLE:
681 musb->xceiv.state = OTG_STATE_B_PERIPHERAL; 681 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
682 /* FALLTHROUGH */ 682 /* FALLTHROUGH */
683 case OTG_STATE_B_PERIPHERAL: 683 case OTG_STATE_B_PERIPHERAL:
684 musb_g_reset(musb); 684 musb_g_reset(musb);
@@ -763,7 +763,7 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
763 MUSB_MODE(musb), devctl); 763 MUSB_MODE(musb), devctl);
764 handled = IRQ_HANDLED; 764 handled = IRQ_HANDLED;
765 765
766 switch (musb->xceiv.state) { 766 switch (musb->xceiv->state) {
767#ifdef CONFIG_USB_MUSB_HDRC_HCD 767#ifdef CONFIG_USB_MUSB_HDRC_HCD
768 case OTG_STATE_A_HOST: 768 case OTG_STATE_A_HOST:
769 case OTG_STATE_A_SUSPEND: 769 case OTG_STATE_A_SUSPEND:
@@ -805,7 +805,7 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
805 otg_state_string(musb), devctl, power); 805 otg_state_string(musb), devctl, power);
806 handled = IRQ_HANDLED; 806 handled = IRQ_HANDLED;
807 807
808 switch (musb->xceiv.state) { 808 switch (musb->xceiv->state) {
809#ifdef CONFIG_USB_MUSB_OTG 809#ifdef CONFIG_USB_MUSB_OTG
810 case OTG_STATE_A_PERIPHERAL: 810 case OTG_STATE_A_PERIPHERAL:
811 /* 811 /*
@@ -817,10 +817,10 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
817 case OTG_STATE_B_PERIPHERAL: 817 case OTG_STATE_B_PERIPHERAL:
818 musb_g_suspend(musb); 818 musb_g_suspend(musb);
819 musb->is_active = is_otg_enabled(musb) 819 musb->is_active = is_otg_enabled(musb)
820 && musb->xceiv.gadget->b_hnp_enable; 820 && musb->xceiv->gadget->b_hnp_enable;
821 if (musb->is_active) { 821 if (musb->is_active) {
822#ifdef CONFIG_USB_MUSB_OTG 822#ifdef CONFIG_USB_MUSB_OTG
823 musb->xceiv.state = OTG_STATE_B_WAIT_ACON; 823 musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
824 DBG(1, "HNP: Setting timer for b_ase0_brst\n"); 824 DBG(1, "HNP: Setting timer for b_ase0_brst\n");
825 musb_otg_timer.data = (unsigned long)musb; 825 musb_otg_timer.data = (unsigned long)musb;
826 mod_timer(&musb_otg_timer, jiffies 826 mod_timer(&musb_otg_timer, jiffies
@@ -834,9 +834,9 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
834 + msecs_to_jiffies(musb->a_wait_bcon)); 834 + msecs_to_jiffies(musb->a_wait_bcon));
835 break; 835 break;
836 case OTG_STATE_A_HOST: 836 case OTG_STATE_A_HOST:
837 musb->xceiv.state = OTG_STATE_A_SUSPEND; 837 musb->xceiv->state = OTG_STATE_A_SUSPEND;
838 musb->is_active = is_otg_enabled(musb) 838 musb->is_active = is_otg_enabled(musb)
839 && musb->xceiv.host->b_hnp_enable; 839 && musb->xceiv->host->b_hnp_enable;
840 break; 840 break;
841 case OTG_STATE_B_HOST: 841 case OTG_STATE_B_HOST:
842 /* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */ 842 /* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
@@ -1682,7 +1682,7 @@ musb_vbus_store(struct device *dev, struct device_attribute *attr,
1682 1682
1683 spin_lock_irqsave(&musb->lock, flags); 1683 spin_lock_irqsave(&musb->lock, flags);
1684 musb->a_wait_bcon = val; 1684 musb->a_wait_bcon = val;
1685 if (musb->xceiv.state == OTG_STATE_A_WAIT_BCON) 1685 if (musb->xceiv->state == OTG_STATE_A_WAIT_BCON)
1686 musb->is_active = 0; 1686 musb->is_active = 0;
1687 musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val)); 1687 musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val));
1688 spin_unlock_irqrestore(&musb->lock, flags); 1688 spin_unlock_irqrestore(&musb->lock, flags);
@@ -1743,8 +1743,8 @@ static void musb_irq_work(struct work_struct *data)
1743 struct musb *musb = container_of(data, struct musb, irq_work); 1743 struct musb *musb = container_of(data, struct musb, irq_work);
1744 static int old_state; 1744 static int old_state;
1745 1745
1746 if (musb->xceiv.state != old_state) { 1746 if (musb->xceiv->state != old_state) {
1747 old_state = musb->xceiv.state; 1747 old_state = musb->xceiv->state;
1748 sysfs_notify(&musb->controller->kobj, NULL, "mode"); 1748 sysfs_notify(&musb->controller->kobj, NULL, "mode");
1749 } 1749 }
1750} 1750}
@@ -1841,7 +1841,7 @@ static void musb_free(struct musb *musb)
1841 } 1841 }
1842 1842
1843#ifdef CONFIG_USB_MUSB_OTG 1843#ifdef CONFIG_USB_MUSB_OTG
1844 put_device(musb->xceiv.dev); 1844 put_device(musb->xceiv->dev);
1845#endif 1845#endif
1846 1846
1847#ifdef CONFIG_USB_MUSB_HDRC_HCD 1847#ifdef CONFIG_USB_MUSB_HDRC_HCD
@@ -1922,10 +1922,18 @@ bad_config:
1922 } 1922 }
1923 } 1923 }
1924 1924
1925 /* assume vbus is off */ 1925 /* The musb_platform_init() call:
1926 1926 * - adjusts musb->mregs and musb->isr if needed,
1927 /* platform adjusts musb->mregs and musb->isr if needed, 1927 * - may initialize an integrated tranceiver
1928 * and activates clocks 1928 * - initializes musb->xceiv, usually by otg_get_transceiver()
1929 * - activates clocks.
1930 * - stops powering VBUS
1931 * - assigns musb->board_set_vbus if host mode is enabled
1932 *
1933 * There are various transciever configurations. Blackfin,
1934 * DaVinci, TUSB60x0, and others integrate them. OMAP3 uses
1935 * external/discrete ones in various flavors (twl4030 family,
1936 * isp1504, non-OTG, etc) mostly hooking up through ULPI.
1929 */ 1937 */
1930 musb->isr = generic_interrupt; 1938 musb->isr = generic_interrupt;
1931 status = musb_platform_init(musb); 1939 status = musb_platform_init(musb);
@@ -1993,17 +2001,17 @@ bad_config:
1993 ? "DMA" : "PIO", 2001 ? "DMA" : "PIO",
1994 musb->nIrq); 2002 musb->nIrq);
1995 2003
1996#ifdef CONFIG_USB_MUSB_HDRC_HCD 2004 /* host side needs more setup */
1997 /* host side needs more setup, except for no-host modes */ 2005 if (is_host_enabled(musb)) {
1998 if (musb->board_mode != MUSB_PERIPHERAL) {
1999 struct usb_hcd *hcd = musb_to_hcd(musb); 2006 struct usb_hcd *hcd = musb_to_hcd(musb);
2000 2007
2001 if (musb->board_mode == MUSB_OTG) 2008 otg_set_host(musb->xceiv, &hcd->self);
2009
2010 if (is_otg_enabled(musb))
2002 hcd->self.otg_port = 1; 2011 hcd->self.otg_port = 1;
2003 musb->xceiv.host = &hcd->self; 2012 musb->xceiv->host = &hcd->self;
2004 hcd->power_budget = 2 * (plat->power ? : 250); 2013 hcd->power_budget = 2 * (plat->power ? : 250);
2005 } 2014 }
2006#endif /* CONFIG_USB_MUSB_HDRC_HCD */
2007 2015
2008 /* For the host-only role, we can activate right away. 2016 /* For the host-only role, we can activate right away.
2009 * (We expect the ID pin to be forcibly grounded!!) 2017 * (We expect the ID pin to be forcibly grounded!!)
@@ -2011,8 +2019,8 @@ bad_config:
2011 */ 2019 */
2012 if (!is_otg_enabled(musb) && is_host_enabled(musb)) { 2020 if (!is_otg_enabled(musb) && is_host_enabled(musb)) {
2013 MUSB_HST_MODE(musb); 2021 MUSB_HST_MODE(musb);
2014 musb->xceiv.default_a = 1; 2022 musb->xceiv->default_a = 1;
2015 musb->xceiv.state = OTG_STATE_A_IDLE; 2023 musb->xceiv->state = OTG_STATE_A_IDLE;
2016 2024
2017 status = usb_add_hcd(musb_to_hcd(musb), -1, 0); 2025 status = usb_add_hcd(musb_to_hcd(musb), -1, 0);
2018 if (status) 2026 if (status)
@@ -2027,8 +2035,8 @@ bad_config:
2027 2035
2028 } else /* peripheral is enabled */ { 2036 } else /* peripheral is enabled */ {
2029 MUSB_DEV_MODE(musb); 2037 MUSB_DEV_MODE(musb);
2030 musb->xceiv.default_a = 0; 2038 musb->xceiv->default_a = 0;
2031 musb->xceiv.state = OTG_STATE_B_IDLE; 2039 musb->xceiv->state = OTG_STATE_B_IDLE;
2032 2040
2033 status = musb_gadget_setup(musb); 2041 status = musb_gadget_setup(musb);
2034 if (status) 2042 if (status)
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index c2a776ee1947..2b49c989f043 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -356,7 +356,7 @@ struct musb {
356 u16 int_rx; 356 u16 int_rx;
357 u16 int_tx; 357 u16 int_tx;
358 358
359 struct otg_transceiver xceiv; 359 struct otg_transceiver *xceiv;
360 360
361 int nIrq; 361 int nIrq;
362 unsigned irq_wake:1; 362 unsigned irq_wake:1;
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index bc197b28ac40..8dfad1189da2 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -1406,7 +1406,7 @@ static int musb_gadget_wakeup(struct usb_gadget *gadget)
1406 1406
1407 spin_lock_irqsave(&musb->lock, flags); 1407 spin_lock_irqsave(&musb->lock, flags);
1408 1408
1409 switch (musb->xceiv.state) { 1409 switch (musb->xceiv->state) {
1410 case OTG_STATE_B_PERIPHERAL: 1410 case OTG_STATE_B_PERIPHERAL:
1411 /* NOTE: OTG state machine doesn't include B_SUSPENDED; 1411 /* NOTE: OTG state machine doesn't include B_SUSPENDED;
1412 * that's part of the standard usb 1.1 state machine, and 1412 * that's part of the standard usb 1.1 state machine, and
@@ -1508,9 +1508,9 @@ static int musb_gadget_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1508{ 1508{
1509 struct musb *musb = gadget_to_musb(gadget); 1509 struct musb *musb = gadget_to_musb(gadget);
1510 1510
1511 if (!musb->xceiv.set_power) 1511 if (!musb->xceiv->set_power)
1512 return -EOPNOTSUPP; 1512 return -EOPNOTSUPP;
1513 return otg_set_power(&musb->xceiv, mA); 1513 return otg_set_power(musb->xceiv, mA);
1514} 1514}
1515 1515
1516static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on) 1516static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on)
@@ -1733,11 +1733,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1733 1733
1734 spin_lock_irqsave(&musb->lock, flags); 1734 spin_lock_irqsave(&musb->lock, flags);
1735 1735
1736 /* REVISIT always use otg_set_peripheral(), handling 1736 otg_set_peripheral(musb->xceiv, &musb->g);
1737 * issues including the root hub one below ...
1738 */
1739 musb->xceiv.gadget = &musb->g;
1740 musb->xceiv.state = OTG_STATE_B_IDLE;
1741 musb->is_active = 1; 1737 musb->is_active = 1;
1742 1738
1743 /* FIXME this ignores the softconnect flag. Drivers are 1739 /* FIXME this ignores the softconnect flag. Drivers are
@@ -1749,6 +1745,8 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1749 if (!is_otg_enabled(musb)) 1745 if (!is_otg_enabled(musb))
1750 musb_start(musb); 1746 musb_start(musb);
1751 1747
1748 otg_set_peripheral(musb->xceiv, &musb->g);
1749
1752 spin_unlock_irqrestore(&musb->lock, flags); 1750 spin_unlock_irqrestore(&musb->lock, flags);
1753 1751
1754 if (is_otg_enabled(musb)) { 1752 if (is_otg_enabled(musb)) {
@@ -1762,8 +1760,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1762 if (retval < 0) { 1760 if (retval < 0) {
1763 DBG(1, "add_hcd failed, %d\n", retval); 1761 DBG(1, "add_hcd failed, %d\n", retval);
1764 spin_lock_irqsave(&musb->lock, flags); 1762 spin_lock_irqsave(&musb->lock, flags);
1765 musb->xceiv.gadget = NULL; 1763 otg_set_peripheral(musb->xceiv, NULL);
1766 musb->xceiv.state = OTG_STATE_UNDEFINED;
1767 musb->gadget_driver = NULL; 1764 musb->gadget_driver = NULL;
1768 musb->g.dev.driver = NULL; 1765 musb->g.dev.driver = NULL;
1769 spin_unlock_irqrestore(&musb->lock, flags); 1766 spin_unlock_irqrestore(&musb->lock, flags);
@@ -1846,8 +1843,9 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1846 1843
1847 (void) musb_gadget_vbus_draw(&musb->g, 0); 1844 (void) musb_gadget_vbus_draw(&musb->g, 0);
1848 1845
1849 musb->xceiv.state = OTG_STATE_UNDEFINED; 1846 musb->xceiv->state = OTG_STATE_UNDEFINED;
1850 stop_activity(musb, driver); 1847 stop_activity(musb, driver);
1848 otg_set_peripheral(musb->xceiv, NULL);
1851 1849
1852 DBG(3, "unregistering driver %s\n", driver->function); 1850 DBG(3, "unregistering driver %s\n", driver->function);
1853 spin_unlock_irqrestore(&musb->lock, flags); 1851 spin_unlock_irqrestore(&musb->lock, flags);
@@ -1883,7 +1881,7 @@ EXPORT_SYMBOL(usb_gadget_unregister_driver);
1883void musb_g_resume(struct musb *musb) 1881void musb_g_resume(struct musb *musb)
1884{ 1882{
1885 musb->is_suspended = 0; 1883 musb->is_suspended = 0;
1886 switch (musb->xceiv.state) { 1884 switch (musb->xceiv->state) {
1887 case OTG_STATE_B_IDLE: 1885 case OTG_STATE_B_IDLE:
1888 break; 1886 break;
1889 case OTG_STATE_B_WAIT_ACON: 1887 case OTG_STATE_B_WAIT_ACON:
@@ -1909,10 +1907,10 @@ void musb_g_suspend(struct musb *musb)
1909 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 1907 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
1910 DBG(3, "devctl %02x\n", devctl); 1908 DBG(3, "devctl %02x\n", devctl);
1911 1909
1912 switch (musb->xceiv.state) { 1910 switch (musb->xceiv->state) {
1913 case OTG_STATE_B_IDLE: 1911 case OTG_STATE_B_IDLE:
1914 if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) 1912 if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
1915 musb->xceiv.state = OTG_STATE_B_PERIPHERAL; 1913 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
1916 break; 1914 break;
1917 case OTG_STATE_B_PERIPHERAL: 1915 case OTG_STATE_B_PERIPHERAL:
1918 musb->is_suspended = 1; 1916 musb->is_suspended = 1;
@@ -1958,22 +1956,22 @@ void musb_g_disconnect(struct musb *musb)
1958 spin_lock(&musb->lock); 1956 spin_lock(&musb->lock);
1959 } 1957 }
1960 1958
1961 switch (musb->xceiv.state) { 1959 switch (musb->xceiv->state) {
1962 default: 1960 default:
1963#ifdef CONFIG_USB_MUSB_OTG 1961#ifdef CONFIG_USB_MUSB_OTG
1964 DBG(2, "Unhandled disconnect %s, setting a_idle\n", 1962 DBG(2, "Unhandled disconnect %s, setting a_idle\n",
1965 otg_state_string(musb)); 1963 otg_state_string(musb));
1966 musb->xceiv.state = OTG_STATE_A_IDLE; 1964 musb->xceiv->state = OTG_STATE_A_IDLE;
1967 break; 1965 break;
1968 case OTG_STATE_A_PERIPHERAL: 1966 case OTG_STATE_A_PERIPHERAL:
1969 musb->xceiv.state = OTG_STATE_A_WAIT_VFALL; 1967 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
1970 break; 1968 break;
1971 case OTG_STATE_B_WAIT_ACON: 1969 case OTG_STATE_B_WAIT_ACON:
1972 case OTG_STATE_B_HOST: 1970 case OTG_STATE_B_HOST:
1973#endif 1971#endif
1974 case OTG_STATE_B_PERIPHERAL: 1972 case OTG_STATE_B_PERIPHERAL:
1975 case OTG_STATE_B_IDLE: 1973 case OTG_STATE_B_IDLE:
1976 musb->xceiv.state = OTG_STATE_B_IDLE; 1974 musb->xceiv->state = OTG_STATE_B_IDLE;
1977 break; 1975 break;
1978 case OTG_STATE_B_SRP_INIT: 1976 case OTG_STATE_B_SRP_INIT:
1979 break; 1977 break;
@@ -2029,10 +2027,10 @@ __acquires(musb->lock)
2029 * or else after HNP, as A-Device 2027 * or else after HNP, as A-Device
2030 */ 2028 */
2031 if (devctl & MUSB_DEVCTL_BDEVICE) { 2029 if (devctl & MUSB_DEVCTL_BDEVICE) {
2032 musb->xceiv.state = OTG_STATE_B_PERIPHERAL; 2030 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
2033 musb->g.is_a_peripheral = 0; 2031 musb->g.is_a_peripheral = 0;
2034 } else if (is_otg_enabled(musb)) { 2032 } else if (is_otg_enabled(musb)) {
2035 musb->xceiv.state = OTG_STATE_A_PERIPHERAL; 2033 musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
2036 musb->g.is_a_peripheral = 1; 2034 musb->g.is_a_peripheral = 1;
2037 } else 2035 } else
2038 WARN_ON(1); 2036 WARN_ON(1);
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index c1bb192ecbef..0d1f15336a9c 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -2213,7 +2213,7 @@ static int musb_bus_suspend(struct usb_hcd *hcd)
2213{ 2213{
2214 struct musb *musb = hcd_to_musb(hcd); 2214 struct musb *musb = hcd_to_musb(hcd);
2215 2215
2216 if (musb->xceiv.state == OTG_STATE_A_SUSPEND) 2216 if (musb->xceiv->state == OTG_STATE_A_SUSPEND)
2217 return 0; 2217 return 0;
2218 2218
2219 if (is_host_active(musb) && musb->is_active) { 2219 if (is_host_active(musb) && musb->is_active) {
diff --git a/drivers/usb/musb/musb_virthub.c b/drivers/usb/musb/musb_virthub.c
index bf677acc83db..d7e1bc44f00a 100644
--- a/drivers/usb/musb/musb_virthub.c
+++ b/drivers/usb/musb/musb_virthub.c
@@ -78,18 +78,18 @@ static void musb_port_suspend(struct musb *musb, bool do_suspend)
78 DBG(3, "Root port suspended, power %02x\n", power); 78 DBG(3, "Root port suspended, power %02x\n", power);
79 79
80 musb->port1_status |= USB_PORT_STAT_SUSPEND; 80 musb->port1_status |= USB_PORT_STAT_SUSPEND;
81 switch (musb->xceiv.state) { 81 switch (musb->xceiv->state) {
82 case OTG_STATE_A_HOST: 82 case OTG_STATE_A_HOST:
83 musb->xceiv.state = OTG_STATE_A_SUSPEND; 83 musb->xceiv->state = OTG_STATE_A_SUSPEND;
84 musb->is_active = is_otg_enabled(musb) 84 musb->is_active = is_otg_enabled(musb)
85 && musb->xceiv.host->b_hnp_enable; 85 && musb->xceiv->host->b_hnp_enable;
86 musb_platform_try_idle(musb, 0); 86 musb_platform_try_idle(musb, 0);
87 break; 87 break;
88#ifdef CONFIG_USB_MUSB_OTG 88#ifdef CONFIG_USB_MUSB_OTG
89 case OTG_STATE_B_HOST: 89 case OTG_STATE_B_HOST:
90 musb->xceiv.state = OTG_STATE_B_WAIT_ACON; 90 musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
91 musb->is_active = is_otg_enabled(musb) 91 musb->is_active = is_otg_enabled(musb)
92 && musb->xceiv.host->b_hnp_enable; 92 && musb->xceiv->host->b_hnp_enable;
93 musb_platform_try_idle(musb, 0); 93 musb_platform_try_idle(musb, 0);
94 break; 94 break;
95#endif 95#endif
@@ -116,7 +116,7 @@ static void musb_port_reset(struct musb *musb, bool do_reset)
116 void __iomem *mbase = musb->mregs; 116 void __iomem *mbase = musb->mregs;
117 117
118#ifdef CONFIG_USB_MUSB_OTG 118#ifdef CONFIG_USB_MUSB_OTG
119 if (musb->xceiv.state == OTG_STATE_B_IDLE) { 119 if (musb->xceiv->state == OTG_STATE_B_IDLE) {
120 DBG(2, "HNP: Returning from HNP; no hub reset from b_idle\n"); 120 DBG(2, "HNP: Returning from HNP; no hub reset from b_idle\n");
121 musb->port1_status &= ~USB_PORT_STAT_RESET; 121 musb->port1_status &= ~USB_PORT_STAT_RESET;
122 return; 122 return;
@@ -186,14 +186,14 @@ void musb_root_disconnect(struct musb *musb)
186 usb_hcd_poll_rh_status(musb_to_hcd(musb)); 186 usb_hcd_poll_rh_status(musb_to_hcd(musb));
187 musb->is_active = 0; 187 musb->is_active = 0;
188 188
189 switch (musb->xceiv.state) { 189 switch (musb->xceiv->state) {
190 case OTG_STATE_A_HOST: 190 case OTG_STATE_A_HOST:
191 case OTG_STATE_A_SUSPEND: 191 case OTG_STATE_A_SUSPEND:
192 musb->xceiv.state = OTG_STATE_A_WAIT_BCON; 192 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
193 musb->is_active = 0; 193 musb->is_active = 0;
194 break; 194 break;
195 case OTG_STATE_A_WAIT_VFALL: 195 case OTG_STATE_A_WAIT_VFALL:
196 musb->xceiv.state = OTG_STATE_B_IDLE; 196 musb->xceiv->state = OTG_STATE_B_IDLE;
197 break; 197 break;
198 default: 198 default:
199 DBG(1, "host disconnect (%s)\n", otg_state_string(musb)); 199 DBG(1, "host disconnect (%s)\n", otg_state_string(musb));
@@ -332,7 +332,7 @@ int musb_hub_control(
332 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16; 332 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
333 usb_hcd_poll_rh_status(musb_to_hcd(musb)); 333 usb_hcd_poll_rh_status(musb_to_hcd(musb));
334 /* NOTE: it might really be A_WAIT_BCON ... */ 334 /* NOTE: it might really be A_WAIT_BCON ... */
335 musb->xceiv.state = OTG_STATE_A_HOST; 335 musb->xceiv->state = OTG_STATE_A_HOST;
336 } 336 }
337 337
338 put_unaligned(cpu_to_le32(musb->port1_status 338 put_unaligned(cpu_to_le32(musb->port1_status
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index 60924ce08493..a2f443859358 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -61,17 +61,17 @@ static void musb_do_idle(unsigned long _musb)
61 61
62 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 62 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
63 63
64 switch (musb->xceiv.state) { 64 switch (musb->xceiv->state) {
65 case OTG_STATE_A_WAIT_BCON: 65 case OTG_STATE_A_WAIT_BCON:
66 devctl &= ~MUSB_DEVCTL_SESSION; 66 devctl &= ~MUSB_DEVCTL_SESSION;
67 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 67 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
68 68
69 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 69 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
70 if (devctl & MUSB_DEVCTL_BDEVICE) { 70 if (devctl & MUSB_DEVCTL_BDEVICE) {
71 musb->xceiv.state = OTG_STATE_B_IDLE; 71 musb->xceiv->state = OTG_STATE_B_IDLE;
72 MUSB_DEV_MODE(musb); 72 MUSB_DEV_MODE(musb);
73 } else { 73 } else {
74 musb->xceiv.state = OTG_STATE_A_IDLE; 74 musb->xceiv->state = OTG_STATE_A_IDLE;
75 MUSB_HST_MODE(musb); 75 MUSB_HST_MODE(musb);
76 } 76 }
77 break; 77 break;
@@ -89,7 +89,7 @@ static void musb_do_idle(unsigned long _musb)
89 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16; 89 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
90 usb_hcd_poll_rh_status(musb_to_hcd(musb)); 90 usb_hcd_poll_rh_status(musb_to_hcd(musb));
91 /* NOTE: it might really be A_WAIT_BCON ... */ 91 /* NOTE: it might really be A_WAIT_BCON ... */
92 musb->xceiv.state = OTG_STATE_A_HOST; 92 musb->xceiv->state = OTG_STATE_A_HOST;
93 } 93 }
94 break; 94 break;
95#endif 95#endif
@@ -97,9 +97,9 @@ static void musb_do_idle(unsigned long _musb)
97 case OTG_STATE_A_HOST: 97 case OTG_STATE_A_HOST:
98 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 98 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
99 if (devctl & MUSB_DEVCTL_BDEVICE) 99 if (devctl & MUSB_DEVCTL_BDEVICE)
100 musb->xceiv.state = OTG_STATE_B_IDLE; 100 musb->xceiv->state = OTG_STATE_B_IDLE;
101 else 101 else
102 musb->xceiv.state = OTG_STATE_A_WAIT_BCON; 102 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
103#endif 103#endif
104 default: 104 default:
105 break; 105 break;
@@ -118,7 +118,7 @@ void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
118 118
119 /* Never idle if active, or when VBUS timeout is not set as host */ 119 /* Never idle if active, or when VBUS timeout is not set as host */
120 if (musb->is_active || ((musb->a_wait_bcon == 0) 120 if (musb->is_active || ((musb->a_wait_bcon == 0)
121 && (musb->xceiv.state == OTG_STATE_A_WAIT_BCON))) { 121 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
122 DBG(4, "%s active, deleting timer\n", otg_state_string(musb)); 122 DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
123 del_timer(&musb_idle_timer); 123 del_timer(&musb_idle_timer);
124 last_timer = jiffies; 124 last_timer = jiffies;
@@ -163,8 +163,8 @@ static void omap_set_vbus(struct musb *musb, int is_on)
163 163
164 if (is_on) { 164 if (is_on) {
165 musb->is_active = 1; 165 musb->is_active = 1;
166 musb->xceiv.default_a = 1; 166 musb->xceiv->default_a = 1;
167 musb->xceiv.state = OTG_STATE_A_WAIT_VRISE; 167 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
168 devctl |= MUSB_DEVCTL_SESSION; 168 devctl |= MUSB_DEVCTL_SESSION;
169 169
170 MUSB_HST_MODE(musb); 170 MUSB_HST_MODE(musb);
@@ -175,8 +175,8 @@ static void omap_set_vbus(struct musb *musb, int is_on)
175 * jumping right to B_IDLE... 175 * jumping right to B_IDLE...
176 */ 176 */
177 177
178 musb->xceiv.default_a = 0; 178 musb->xceiv->default_a = 0;
179 musb->xceiv.state = OTG_STATE_B_IDLE; 179 musb->xceiv->state = OTG_STATE_B_IDLE;
180 devctl &= ~MUSB_DEVCTL_SESSION; 180 devctl &= ~MUSB_DEVCTL_SESSION;
181 181
182 MUSB_DEV_MODE(musb); 182 MUSB_DEV_MODE(musb);
@@ -188,10 +188,6 @@ static void omap_set_vbus(struct musb *musb, int is_on)
188 otg_state_string(musb), 188 otg_state_string(musb),
189 musb_readb(musb->mregs, MUSB_DEVCTL)); 189 musb_readb(musb->mregs, MUSB_DEVCTL));
190} 190}
191static int omap_set_power(struct otg_transceiver *x, unsigned mA)
192{
193 return 0;
194}
195 191
196static int musb_platform_resume(struct musb *musb); 192static int musb_platform_resume(struct musb *musb);
197 193
@@ -202,24 +198,6 @@ int musb_platform_set_mode(struct musb *musb, u8 musb_mode)
202 devctl |= MUSB_DEVCTL_SESSION; 198 devctl |= MUSB_DEVCTL_SESSION;
203 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 199 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
204 200
205 switch (musb_mode) {
206#ifdef CONFIG_USB_MUSB_HDRC_HCD
207 case MUSB_HOST:
208 otg_set_host(&musb->xceiv, musb->xceiv.host);
209 break;
210#endif
211#ifdef CONFIG_USB_GADGET_MUSB_HDRC
212 case MUSB_PERIPHERAL:
213 otg_set_peripheral(&musb->xceiv, musb->xceiv.gadget);
214 break;
215#endif
216#ifdef CONFIG_USB_MUSB_OTG
217 case MUSB_OTG:
218 break;
219#endif
220 default:
221 return -EINVAL;
222 }
223 return 0; 201 return 0;
224} 202}
225 203
@@ -231,6 +209,16 @@ int __init musb_platform_init(struct musb *musb)
231 omap_cfg_reg(AE5_2430_USB0HS_STP); 209 omap_cfg_reg(AE5_2430_USB0HS_STP);
232#endif 210#endif
233 211
212 /* We require some kind of external transceiver, hooked
213 * up through ULPI. TWL4030-family PMICs include one,
214 * which needs a driver, drivers aren't always needed.
215 */
216 musb->xceiv = otg_get_transceiver();
217 if (!musb->xceiv) {
218 pr_err("HS USB OTG: no transceiver configured\n");
219 return -ENODEV;
220 }
221
234 musb_platform_resume(musb); 222 musb_platform_resume(musb);
235 223
236 l = omap_readl(OTG_SYSCONFIG); 224 l = omap_readl(OTG_SYSCONFIG);
@@ -257,8 +245,6 @@ int __init musb_platform_init(struct musb *musb)
257 245
258 if (is_host_enabled(musb)) 246 if (is_host_enabled(musb))
259 musb->board_set_vbus = omap_set_vbus; 247 musb->board_set_vbus = omap_set_vbus;
260 if (is_peripheral_enabled(musb))
261 musb->xceiv.set_power = omap_set_power;
262 musb->a_wait_bcon = MUSB_TIMEOUT_A_WAIT_BCON; 248 musb->a_wait_bcon = MUSB_TIMEOUT_A_WAIT_BCON;
263 249
264 setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb); 250 setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
@@ -282,8 +268,7 @@ int musb_platform_suspend(struct musb *musb)
282 l |= ENABLEWAKEUP; /* enable wakeup */ 268 l |= ENABLEWAKEUP; /* enable wakeup */
283 omap_writel(l, OTG_SYSCONFIG); 269 omap_writel(l, OTG_SYSCONFIG);
284 270
285 if (musb->xceiv.set_suspend) 271 otg_set_suspend(musb->xceiv, 1);
286 musb->xceiv.set_suspend(&musb->xceiv, 1);
287 272
288 if (musb->set_clock) 273 if (musb->set_clock)
289 musb->set_clock(musb->clock, 0); 274 musb->set_clock(musb->clock, 0);
@@ -300,8 +285,7 @@ static int musb_platform_resume(struct musb *musb)
300 if (!musb->clock) 285 if (!musb->clock)
301 return 0; 286 return 0;
302 287
303 if (musb->xceiv.set_suspend) 288 otg_set_suspend(musb->xceiv, 0);
304 musb->xceiv.set_suspend(&musb->xceiv, 0);
305 289
306 if (musb->set_clock) 290 if (musb->set_clock)
307 musb->set_clock(musb->clock, 1); 291 musb->set_clock(musb->clock, 1);
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
index 4ac1477d3569..88b587c703e9 100644
--- a/drivers/usb/musb/tusb6010.c
+++ b/drivers/usb/musb/tusb6010.c
@@ -259,6 +259,8 @@ void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf)
259 tusb_fifo_read_unaligned(fifo, buf, len); 259 tusb_fifo_read_unaligned(fifo, buf, len);
260} 260}
261 261
262static struct musb *the_musb;
263
262#ifdef CONFIG_USB_GADGET_MUSB_HDRC 264#ifdef CONFIG_USB_GADGET_MUSB_HDRC
263 265
264/* This is used by gadget drivers, and OTG transceiver logic, allowing 266/* This is used by gadget drivers, and OTG transceiver logic, allowing
@@ -269,7 +271,7 @@ void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf)
269 */ 271 */
270static int tusb_draw_power(struct otg_transceiver *x, unsigned mA) 272static int tusb_draw_power(struct otg_transceiver *x, unsigned mA)
271{ 273{
272 struct musb *musb = container_of(x, struct musb, xceiv); 274 struct musb *musb = the_musb;
273 void __iomem *tbase = musb->ctrl_base; 275 void __iomem *tbase = musb->ctrl_base;
274 u32 reg; 276 u32 reg;
275 277
@@ -419,7 +421,7 @@ static void musb_do_idle(unsigned long _musb)
419 421
420 spin_lock_irqsave(&musb->lock, flags); 422 spin_lock_irqsave(&musb->lock, flags);
421 423
422 switch (musb->xceiv.state) { 424 switch (musb->xceiv->state) {
423 case OTG_STATE_A_WAIT_BCON: 425 case OTG_STATE_A_WAIT_BCON:
424 if ((musb->a_wait_bcon != 0) 426 if ((musb->a_wait_bcon != 0)
425 && (musb->idle_timeout == 0 427 && (musb->idle_timeout == 0
@@ -483,7 +485,7 @@ void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
483 485
484 /* Never idle if active, or when VBUS timeout is not set as host */ 486 /* Never idle if active, or when VBUS timeout is not set as host */
485 if (musb->is_active || ((musb->a_wait_bcon == 0) 487 if (musb->is_active || ((musb->a_wait_bcon == 0)
486 && (musb->xceiv.state == OTG_STATE_A_WAIT_BCON))) { 488 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
487 DBG(4, "%s active, deleting timer\n", otg_state_string(musb)); 489 DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
488 del_timer(&musb_idle_timer); 490 del_timer(&musb_idle_timer);
489 last_timer = jiffies; 491 last_timer = jiffies;
@@ -532,8 +534,8 @@ static void tusb_source_power(struct musb *musb, int is_on)
532 if (musb->set_clock) 534 if (musb->set_clock)
533 musb->set_clock(musb->clock, 1); 535 musb->set_clock(musb->clock, 1);
534 timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE); 536 timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE);
535 musb->xceiv.default_a = 1; 537 musb->xceiv->default_a = 1;
536 musb->xceiv.state = OTG_STATE_A_WAIT_VRISE; 538 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
537 devctl |= MUSB_DEVCTL_SESSION; 539 devctl |= MUSB_DEVCTL_SESSION;
538 540
539 conf |= TUSB_DEV_CONF_USB_HOST_MODE; 541 conf |= TUSB_DEV_CONF_USB_HOST_MODE;
@@ -546,24 +548,24 @@ static void tusb_source_power(struct musb *musb, int is_on)
546 /* If ID pin is grounded, we want to be a_idle */ 548 /* If ID pin is grounded, we want to be a_idle */
547 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT); 549 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
548 if (!(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) { 550 if (!(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) {
549 switch (musb->xceiv.state) { 551 switch (musb->xceiv->state) {
550 case OTG_STATE_A_WAIT_VRISE: 552 case OTG_STATE_A_WAIT_VRISE:
551 case OTG_STATE_A_WAIT_BCON: 553 case OTG_STATE_A_WAIT_BCON:
552 musb->xceiv.state = OTG_STATE_A_WAIT_VFALL; 554 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
553 break; 555 break;
554 case OTG_STATE_A_WAIT_VFALL: 556 case OTG_STATE_A_WAIT_VFALL:
555 musb->xceiv.state = OTG_STATE_A_IDLE; 557 musb->xceiv->state = OTG_STATE_A_IDLE;
556 break; 558 break;
557 default: 559 default:
558 musb->xceiv.state = OTG_STATE_A_IDLE; 560 musb->xceiv->state = OTG_STATE_A_IDLE;
559 } 561 }
560 musb->is_active = 0; 562 musb->is_active = 0;
561 musb->xceiv.default_a = 1; 563 musb->xceiv->default_a = 1;
562 MUSB_HST_MODE(musb); 564 MUSB_HST_MODE(musb);
563 } else { 565 } else {
564 musb->is_active = 0; 566 musb->is_active = 0;
565 musb->xceiv.default_a = 0; 567 musb->xceiv->default_a = 0;
566 musb->xceiv.state = OTG_STATE_B_IDLE; 568 musb->xceiv->state = OTG_STATE_B_IDLE;
567 MUSB_DEV_MODE(musb); 569 MUSB_DEV_MODE(musb);
568 } 570 }
569 571
@@ -674,7 +676,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
674 else 676 else
675 default_a = is_host_enabled(musb); 677 default_a = is_host_enabled(musb);
676 DBG(2, "Default-%c\n", default_a ? 'A' : 'B'); 678 DBG(2, "Default-%c\n", default_a ? 'A' : 'B');
677 musb->xceiv.default_a = default_a; 679 musb->xceiv->default_a = default_a;
678 tusb_source_power(musb, default_a); 680 tusb_source_power(musb, default_a);
679 681
680 /* Don't allow idling immediately */ 682 /* Don't allow idling immediately */
@@ -686,7 +688,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
686 if (int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG) { 688 if (int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG) {
687 689
688 /* B-dev state machine: no vbus ~= disconnect */ 690 /* B-dev state machine: no vbus ~= disconnect */
689 if ((is_otg_enabled(musb) && !musb->xceiv.default_a) 691 if ((is_otg_enabled(musb) && !musb->xceiv->default_a)
690 || !is_host_enabled(musb)) { 692 || !is_host_enabled(musb)) {
691#ifdef CONFIG_USB_MUSB_HDRC_HCD 693#ifdef CONFIG_USB_MUSB_HDRC_HCD
692 /* ? musb_root_disconnect(musb); */ 694 /* ? musb_root_disconnect(musb); */
@@ -701,9 +703,9 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
701 703
702 if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) { 704 if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) {
703 DBG(1, "Forcing disconnect (no interrupt)\n"); 705 DBG(1, "Forcing disconnect (no interrupt)\n");
704 if (musb->xceiv.state != OTG_STATE_B_IDLE) { 706 if (musb->xceiv->state != OTG_STATE_B_IDLE) {
705 /* INTR_DISCONNECT can hide... */ 707 /* INTR_DISCONNECT can hide... */
706 musb->xceiv.state = OTG_STATE_B_IDLE; 708 musb->xceiv->state = OTG_STATE_B_IDLE;
707 musb->int_usb |= MUSB_INTR_DISCONNECT; 709 musb->int_usb |= MUSB_INTR_DISCONNECT;
708 } 710 }
709 musb->is_active = 0; 711 musb->is_active = 0;
@@ -717,7 +719,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
717 DBG(2, "vbus change, %s, otg %03x\n", 719 DBG(2, "vbus change, %s, otg %03x\n",
718 otg_state_string(musb), otg_stat); 720 otg_state_string(musb), otg_stat);
719 721
720 switch (musb->xceiv.state) { 722 switch (musb->xceiv->state) {
721 case OTG_STATE_A_IDLE: 723 case OTG_STATE_A_IDLE:
722 DBG(2, "Got SRP, turning on VBUS\n"); 724 DBG(2, "Got SRP, turning on VBUS\n");
723 musb_set_vbus(musb, 1); 725 musb_set_vbus(musb, 1);
@@ -765,7 +767,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
765 767
766 DBG(4, "%s timer, %03x\n", otg_state_string(musb), otg_stat); 768 DBG(4, "%s timer, %03x\n", otg_state_string(musb), otg_stat);
767 769
768 switch (musb->xceiv.state) { 770 switch (musb->xceiv->state) {
769 case OTG_STATE_A_WAIT_VRISE: 771 case OTG_STATE_A_WAIT_VRISE:
770 /* VBUS has probably been valid for a while now, 772 /* VBUS has probably been valid for a while now,
771 * but may well have bounced out of range a bit 773 * but may well have bounced out of range a bit
@@ -777,7 +779,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
777 DBG(2, "devctl %02x\n", devctl); 779 DBG(2, "devctl %02x\n", devctl);
778 break; 780 break;
779 } 781 }
780 musb->xceiv.state = OTG_STATE_A_WAIT_BCON; 782 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
781 musb->is_active = 0; 783 musb->is_active = 0;
782 idle_timeout = jiffies 784 idle_timeout = jiffies
783 + msecs_to_jiffies(musb->a_wait_bcon); 785 + msecs_to_jiffies(musb->a_wait_bcon);
@@ -1093,9 +1095,14 @@ int __init musb_platform_init(struct musb *musb)
1093{ 1095{
1094 struct platform_device *pdev; 1096 struct platform_device *pdev;
1095 struct resource *mem; 1097 struct resource *mem;
1096 void __iomem *sync; 1098 void __iomem *sync = NULL;
1097 int ret; 1099 int ret;
1098 1100
1101 usb_nop_xceiv_register();
1102 musb->xceiv = otg_get_transceiver();
1103 if (!musb->xceiv)
1104 return -ENODEV;
1105
1099 pdev = to_platform_device(musb->controller); 1106 pdev = to_platform_device(musb->controller);
1100 1107
1101 /* dma address for async dma */ 1108 /* dma address for async dma */
@@ -1106,14 +1113,16 @@ int __init musb_platform_init(struct musb *musb)
1106 mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1113 mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1107 if (!mem) { 1114 if (!mem) {
1108 pr_debug("no sync dma resource?\n"); 1115 pr_debug("no sync dma resource?\n");
1109 return -ENODEV; 1116 ret = -ENODEV;
1117 goto done;
1110 } 1118 }
1111 musb->sync = mem->start; 1119 musb->sync = mem->start;
1112 1120
1113 sync = ioremap(mem->start, mem->end - mem->start + 1); 1121 sync = ioremap(mem->start, mem->end - mem->start + 1);
1114 if (!sync) { 1122 if (!sync) {
1115 pr_debug("ioremap for sync failed\n"); 1123 pr_debug("ioremap for sync failed\n");
1116 return -ENOMEM; 1124 ret = -ENOMEM;
1125 goto done;
1117 } 1126 }
1118 musb->sync_va = sync; 1127 musb->sync_va = sync;
1119 1128
@@ -1126,28 +1135,37 @@ int __init musb_platform_init(struct musb *musb)
1126 if (ret) { 1135 if (ret) {
1127 printk(KERN_ERR "Could not start tusb6010 (%d)\n", 1136 printk(KERN_ERR "Could not start tusb6010 (%d)\n",
1128 ret); 1137 ret);
1129 return -ENODEV; 1138 goto done;
1130 } 1139 }
1131 musb->isr = tusb_interrupt; 1140 musb->isr = tusb_interrupt;
1132 1141
1133 if (is_host_enabled(musb)) 1142 if (is_host_enabled(musb))
1134 musb->board_set_vbus = tusb_source_power; 1143 musb->board_set_vbus = tusb_source_power;
1135 if (is_peripheral_enabled(musb)) 1144 if (is_peripheral_enabled(musb)) {
1136 musb->xceiv.set_power = tusb_draw_power; 1145 musb->xceiv->set_power = tusb_draw_power;
1146 the_musb = musb;
1147 }
1137 1148
1138 setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb); 1149 setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
1139 1150
1151done:
1152 if (ret < 0) {
1153 if (sync)
1154 iounmap(sync);
1155 usb_nop_xceiv_unregister();
1156 }
1140 return ret; 1157 return ret;
1141} 1158}
1142 1159
1143int musb_platform_exit(struct musb *musb) 1160int musb_platform_exit(struct musb *musb)
1144{ 1161{
1145 del_timer_sync(&musb_idle_timer); 1162 del_timer_sync(&musb_idle_timer);
1163 the_musb = NULL;
1146 1164
1147 if (musb->board_set_power) 1165 if (musb->board_set_power)
1148 musb->board_set_power(0); 1166 musb->board_set_power(0);
1149 1167
1150 iounmap(musb->sync_va); 1168 iounmap(musb->sync_va);
1151 1169 usb_nop_xceiv_unregister();
1152 return 0; 1170 return 0;
1153} 1171}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 15:13:49 -0500