diff options
author | Tony Lindgren <tony@atomide.com> | 2009-03-23 21:23:49 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2009-03-23 21:51:23 -0400 |
commit | 828c707e6dbd0ca7882f721a466ff28729376ff0 (patch) | |
tree | e664f72712fdef0d9cb5f517b4ee6596fa93a5b2 | |
parent | e51151a53fc85fb1730ec4d6c1474275dcdb9ec3 (diff) |
ARM: OMAP3: Add base address definitions and resources for OMAP 3 IS, v2
This replaces earlier patch from Sergio Aguirre titled "[REVIEW PATCH 03/14]
OMAP34XX: CAM: Resources fixes".
Signed-off-by: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/mach-omap2/devices.c | 108 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/omap34xx.h | 27 |
2 files changed, 135 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 14537ffd8af3..7b2af1ba5533 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -28,6 +28,113 @@ | |||
28 | #include <mach/eac.h> | 28 | #include <mach/eac.h> |
29 | #include <mach/mmc.h> | 29 | #include <mach/mmc.h> |
30 | 30 | ||
31 | #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) | ||
32 | |||
33 | static struct resource cam_resources[] = { | ||
34 | { | ||
35 | .start = OMAP24XX_CAMERA_BASE, | ||
36 | .end = OMAP24XX_CAMERA_BASE + 0xfff, | ||
37 | .flags = IORESOURCE_MEM, | ||
38 | }, | ||
39 | { | ||
40 | .start = INT_24XX_CAM_IRQ, | ||
41 | .flags = IORESOURCE_IRQ, | ||
42 | } | ||
43 | }; | ||
44 | |||
45 | static struct platform_device omap_cam_device = { | ||
46 | .name = "omap24xxcam", | ||
47 | .id = -1, | ||
48 | .num_resources = ARRAY_SIZE(cam_resources), | ||
49 | .resource = cam_resources, | ||
50 | }; | ||
51 | |||
52 | static inline void omap_init_camera(void) | ||
53 | { | ||
54 | platform_device_register(&omap_cam_device); | ||
55 | } | ||
56 | |||
57 | #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) | ||
58 | |||
59 | static struct resource omap3isp_resources[] = { | ||
60 | { | ||
61 | .start = OMAP3430_ISP_BASE, | ||
62 | .end = OMAP3430_ISP_END, | ||
63 | .flags = IORESOURCE_MEM, | ||
64 | }, | ||
65 | { | ||
66 | .start = OMAP3430_ISP_CBUFF_BASE, | ||
67 | .end = OMAP3430_ISP_CBUFF_END, | ||
68 | .flags = IORESOURCE_MEM, | ||
69 | }, | ||
70 | { | ||
71 | .start = OMAP3430_ISP_CCP2_BASE, | ||
72 | .end = OMAP3430_ISP_CCP2_END, | ||
73 | .flags = IORESOURCE_MEM, | ||
74 | }, | ||
75 | { | ||
76 | .start = OMAP3430_ISP_CCDC_BASE, | ||
77 | .end = OMAP3430_ISP_CCDC_END, | ||
78 | .flags = IORESOURCE_MEM, | ||
79 | }, | ||
80 | { | ||
81 | .start = OMAP3430_ISP_HIST_BASE, | ||
82 | .end = OMAP3430_ISP_HIST_END, | ||
83 | .flags = IORESOURCE_MEM, | ||
84 | }, | ||
85 | { | ||
86 | .start = OMAP3430_ISP_H3A_BASE, | ||
87 | .end = OMAP3430_ISP_H3A_END, | ||
88 | .flags = IORESOURCE_MEM, | ||
89 | }, | ||
90 | { | ||
91 | .start = OMAP3430_ISP_PREV_BASE, | ||
92 | .end = OMAP3430_ISP_PREV_END, | ||
93 | .flags = IORESOURCE_MEM, | ||
94 | }, | ||
95 | { | ||
96 | .start = OMAP3430_ISP_RESZ_BASE, | ||
97 | .end = OMAP3430_ISP_RESZ_END, | ||
98 | .flags = IORESOURCE_MEM, | ||
99 | }, | ||
100 | { | ||
101 | .start = OMAP3430_ISP_SBL_BASE, | ||
102 | .end = OMAP3430_ISP_SBL_END, | ||
103 | .flags = IORESOURCE_MEM, | ||
104 | }, | ||
105 | { | ||
106 | .start = OMAP3430_ISP_CSI2A_BASE, | ||
107 | .end = OMAP3430_ISP_CSI2A_END, | ||
108 | .flags = IORESOURCE_MEM, | ||
109 | }, | ||
110 | { | ||
111 | .start = OMAP3430_ISP_CSI2PHY_BASE, | ||
112 | .end = OMAP3430_ISP_CSI2PHY_END, | ||
113 | .flags = IORESOURCE_MEM, | ||
114 | }, | ||
115 | { | ||
116 | .start = INT_34XX_CAM_IRQ, | ||
117 | .flags = IORESOURCE_IRQ, | ||
118 | } | ||
119 | }; | ||
120 | |||
121 | static struct platform_device omap3isp_device = { | ||
122 | .name = "omap3isp", | ||
123 | .id = -1, | ||
124 | .num_resources = ARRAY_SIZE(omap3isp_resources), | ||
125 | .resource = omap3isp_resources, | ||
126 | }; | ||
127 | |||
128 | static inline void omap_init_camera(void) | ||
129 | { | ||
130 | platform_device_register(&omap3isp_device); | ||
131 | } | ||
132 | #else | ||
133 | static inline void omap_init_camera(void) | ||
134 | { | ||
135 | } | ||
136 | #endif | ||
137 | |||
31 | #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) | 138 | #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) |
32 | 139 | ||
33 | #define MBOX_REG_SIZE 0x120 | 140 | #define MBOX_REG_SIZE 0x120 |
@@ -527,6 +634,7 @@ static int __init omap2_init_devices(void) | |||
527 | * in alphabetical order so they're easier to sort through. | 634 | * in alphabetical order so they're easier to sort through. |
528 | */ | 635 | */ |
529 | omap_hsmmc_reset(); | 636 | omap_hsmmc_reset(); |
637 | omap_init_camera(); | ||
530 | omap_init_mbox(); | 638 | omap_init_mbox(); |
531 | omap_init_mcspi(); | 639 | omap_init_mcspi(); |
532 | omap_hdq_init(); | 640 | omap_hdq_init(); |
diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/mach/omap34xx.h index 89173f16b9b7..1b1c35d21697 100644 --- a/arch/arm/plat-omap/include/mach/omap34xx.h +++ b/arch/arm/plat-omap/include/mach/omap34xx.h | |||
@@ -49,6 +49,33 @@ | |||
49 | #define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE | 49 | #define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE |
50 | 50 | ||
51 | #define OMAP34XX_IC_BASE 0x48200000 | 51 | #define OMAP34XX_IC_BASE 0x48200000 |
52 | |||
53 | #define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000) | ||
54 | #define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100) | ||
55 | #define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400) | ||
56 | #define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600) | ||
57 | #define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00) | ||
58 | #define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00) | ||
59 | #define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00) | ||
60 | #define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000) | ||
61 | #define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200) | ||
62 | #define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400) | ||
63 | #define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800) | ||
64 | #define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970) | ||
65 | |||
66 | #define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F) | ||
67 | #define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077) | ||
68 | #define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF) | ||
69 | #define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7) | ||
70 | #define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047) | ||
71 | #define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F) | ||
72 | #define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F) | ||
73 | #define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB) | ||
74 | #define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB) | ||
75 | #define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F) | ||
76 | #define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F) | ||
77 | #define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007) | ||
78 | |||
52 | #define OMAP34XX_IVA_INTC_BASE 0x40000000 | 79 | #define OMAP34XX_IVA_INTC_BASE 0x40000000 |
53 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) | 80 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) |
54 | #define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) | 81 | #define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) |