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authorTejun Heo <htejun@gmail.com>2007-02-02 00:51:09 -0500
committerJeff Garzik <jeff@garzik.org>2007-02-02 11:52:05 -0500
commit77280989673ee1ef736a92617f52e2be45651833 (patch)
tree58d3792bd06a7583c91564737599b0392c16d798
parente34efe3b100d0fbdf053128956c3dd0bc68754d6 (diff)
ahci/pata_jmicron: fix JMicron quirk
For all JMicrons except for 361 and 368, AHCI mode enable bits in the Control(1) should be set. This used to be done in both ahci and pata_jmicron but while moving programming to PCI quirk, it was removed from ahci part while still left in pata_jmicron. The implemented JMicron PCI quirk was incorrect in that it didn't program AHCI mode enable bits. If pata_jmicron is loaded first and programs those bits, the ahci ports work; otherwise, ahci device detection fails miserably. This patch makes JMicron PCI quirk clear SATA IDE mode bits and set AHCI mode bits and remove the respective part from pata_jmicron. Tested on JMB361, 363 and 368. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
-rw-r--r--drivers/ata/pata_jmicron.c18
-rw-r--r--drivers/pci/quirks.c4
2 files changed, 7 insertions, 15 deletions
diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c
index 2d661cb4df3c..d50264af2848 100644
--- a/drivers/ata/pata_jmicron.c
+++ b/drivers/ata/pata_jmicron.c
@@ -204,20 +204,12 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i
204 204
205 u32 reg; 205 u32 reg;
206 206
207 if (id->driver_data != 368) { 207 /* PATA controller is fn 1, AHCI is fn 0 */
208 /* Put the controller into AHCI mode in case the AHCI driver 208 if (id->driver_data != 368 && PCI_FUNC(pdev->devfn) != 1)
209 has not yet been loaded. This can be done with either 209 return -ENODEV;
210 function present */
211 210
212 /* FIXME: We may want a way to override this in future */ 211 /* The 365/66 have two PATA channels, redirect the second */
213 pci_write_config_byte(pdev, 0x41, 0xa1); 212 if (id->driver_data == 365 || id->driver_data == 366) {
214
215 /* PATA controller is fn 1, AHCI is fn 0 */
216 if (PCI_FUNC(pdev->devfn) != 1)
217 return -ENODEV;
218 }
219 if ( id->driver_data == 365 || id->driver_data == 366) {
220 /* The 365/66 have two PATA channels, redirect the second */
221 pci_read_config_dword(pdev, 0x80, &reg); 213 pci_read_config_dword(pdev, 0x80, &reg);
222 reg |= (1 << 24); /* IDE1 to PATA IDE secondary */ 214 reg |= (1 << 24); /* IDE1 to PATA IDE secondary */
223 pci_write_config_dword(pdev, 0x80, reg); 215 pci_write_config_dword(pdev, 0x80, reg);
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index dcc0c1ab95ed..c913ea4e545c 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1262,8 +1262,8 @@ static void quirk_jmicron_dualfn(struct pci_dev *pdev)
1262 pci_read_config_dword(pdev, 0x40, &conf); 1262 pci_read_config_dword(pdev, 0x40, &conf);
1263 /* Enable dual function mode, AHCI on fn 0, IDE fn1 */ 1263 /* Enable dual function mode, AHCI on fn 0, IDE fn1 */
1264 /* Set the class codes correctly and then direct IDE 0 */ 1264 /* Set the class codes correctly and then direct IDE 0 */
1265 conf &= ~0x000F0200; /* Clear bit 9 and 16-19 */ 1265 conf &= ~0x000FF200; /* Clear bit 9 and 12-19 */
1266 conf |= 0x00C20002; /* Set bit 1, 17, 22, 23 */ 1266 conf |= 0x00C2A102; /* Set 1, 8, 13, 15, 17, 22, 23 */
1267 pci_write_config_dword(pdev, 0x40, conf); 1267 pci_write_config_dword(pdev, 0x40, conf);
1268 1268
1269 /* Reconfigure so that the PCI scanner discovers the 1269 /* Reconfigure so that the PCI scanner discovers the