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authorKeith Packard <keithp@keithp.com>2009-04-16 18:17:39 -0400
committerEric Anholt <eric@anholt.net>2009-04-17 16:31:05 -0400
commit5b0bdd6f7284ed39ee553f8a8c4f0d372c87133a (patch)
tree205b53b4f5da4bff800e04d620fbcea1b89af3e9
parent07f4f8bf436e3f389a12cb792ad16275b9091b51 (diff)
drm/i915: fix transition to I915_TILING_NONE
Transitions to TILING_NONE skipped the call to unbind the object, which left the fence register set and caused future CPU access through the GTT to access the object in tiled mode. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net>
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index f27e523c764f..52a059354e83 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -283,7 +283,6 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
283 mutex_lock(&dev->struct_mutex); 283 mutex_lock(&dev->struct_mutex);
284 284
285 if (args->tiling_mode == I915_TILING_NONE) { 285 if (args->tiling_mode == I915_TILING_NONE) {
286 obj_priv->tiling_mode = I915_TILING_NONE;
287 args->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; 286 args->swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
288 } else { 287 } else {
289 if (args->tiling_mode == I915_TILING_X) 288 if (args->tiling_mode == I915_TILING_X)