diff options
author | Paul Mackerras <paulus@samba.org> | 2006-09-27 17:18:28 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-09-27 17:18:28 -0400 |
commit | 4e6d816e51728d5006c53e78e079ac62b902f8aa (patch) | |
tree | d388c87dabc063c08c52d17610738d2f49b3855c | |
parent | d86d9b8cab45adf64e2ea8fe975bec3282b5de81 (diff) | |
parent | 611a15afcdaacec6efba984c7eb089b853564bdf (diff) |
Merge branch 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/vitb/linux-2.6-PQ
26 files changed, 2597 insertions, 88 deletions
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts new file mode 100644 index 000000000000..2b168486aeba --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8560ads.dts | |||
@@ -0,0 +1,302 @@ | |||
1 | /* | ||
2 | * MPC8560 ADS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8560ADS"; | ||
15 | compatible = "MPC85xxADS"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | linux,phandle = <100>; | ||
19 | |||
20 | cpus { | ||
21 | #cpus = <1>; | ||
22 | #address-cells = <1>; | ||
23 | #size-cells = <0>; | ||
24 | linux,phandle = <200>; | ||
25 | |||
26 | PowerPC,8560@0 { | ||
27 | device_type = "cpu"; | ||
28 | reg = <0>; | ||
29 | d-cache-line-size = <20>; // 32 bytes | ||
30 | i-cache-line-size = <20>; // 32 bytes | ||
31 | d-cache-size = <8000>; // L1, 32K | ||
32 | i-cache-size = <8000>; // L1, 32K | ||
33 | timebase-frequency = <04ead9a0>; | ||
34 | bus-frequency = <13ab6680>; | ||
35 | clock-frequency = <312c8040>; | ||
36 | 32-bit; | ||
37 | linux,phandle = <201>; | ||
38 | linux,boot-cpu; | ||
39 | }; | ||
40 | }; | ||
41 | |||
42 | memory { | ||
43 | device_type = "memory"; | ||
44 | linux,phandle = <300>; | ||
45 | reg = <00000000 10000000>; | ||
46 | }; | ||
47 | |||
48 | soc8560@e0000000 { | ||
49 | #address-cells = <1>; | ||
50 | #size-cells = <1>; | ||
51 | #interrupt-cells = <2>; | ||
52 | device_type = "soc"; | ||
53 | ranges = <0 e0000000 00100000>; | ||
54 | reg = <e0000000 00000200>; | ||
55 | bus-frequency = <13ab6680>; | ||
56 | |||
57 | mdio@24520 { | ||
58 | device_type = "mdio"; | ||
59 | compatible = "gianfar"; | ||
60 | reg = <24520 20>; | ||
61 | linux,phandle = <24520>; | ||
62 | #address-cells = <1>; | ||
63 | #size-cells = <0>; | ||
64 | ethernet-phy@0 { | ||
65 | linux,phandle = <2452000>; | ||
66 | interrupt-parent = <40000>; | ||
67 | interrupts = <35 1>; | ||
68 | reg = <0>; | ||
69 | device_type = "ethernet-phy"; | ||
70 | }; | ||
71 | ethernet-phy@1 { | ||
72 | linux,phandle = <2452001>; | ||
73 | interrupt-parent = <40000>; | ||
74 | interrupts = <35 1>; | ||
75 | reg = <1>; | ||
76 | device_type = "ethernet-phy"; | ||
77 | }; | ||
78 | ethernet-phy@2 { | ||
79 | linux,phandle = <2452002>; | ||
80 | interrupt-parent = <40000>; | ||
81 | interrupts = <37 1>; | ||
82 | reg = <2>; | ||
83 | device_type = "ethernet-phy"; | ||
84 | }; | ||
85 | ethernet-phy@3 { | ||
86 | linux,phandle = <2452003>; | ||
87 | interrupt-parent = <40000>; | ||
88 | interrupts = <37 1>; | ||
89 | reg = <3>; | ||
90 | device_type = "ethernet-phy"; | ||
91 | }; | ||
92 | }; | ||
93 | |||
94 | ethernet@24000 { | ||
95 | device_type = "network"; | ||
96 | model = "TSEC"; | ||
97 | compatible = "gianfar"; | ||
98 | reg = <24000 1000>; | ||
99 | address = [ 00 00 0C 00 00 FD ]; | ||
100 | interrupts = <d 2 e 2 12 2>; | ||
101 | interrupt-parent = <40000>; | ||
102 | phy-handle = <2452000>; | ||
103 | }; | ||
104 | |||
105 | ethernet@25000 { | ||
106 | #address-cells = <1>; | ||
107 | #size-cells = <0>; | ||
108 | device_type = "network"; | ||
109 | model = "TSEC"; | ||
110 | compatible = "gianfar"; | ||
111 | reg = <25000 1000>; | ||
112 | address = [ 00 00 0C 00 01 FD ]; | ||
113 | interrupts = <13 2 14 2 18 2>; | ||
114 | interrupt-parent = <40000>; | ||
115 | phy-handle = <2452001>; | ||
116 | }; | ||
117 | |||
118 | pci@8000 { | ||
119 | linux,phandle = <8000>; | ||
120 | #interrupt-cells = <1>; | ||
121 | #size-cells = <2>; | ||
122 | #address-cells = <3>; | ||
123 | compatible = "85xx"; | ||
124 | device_type = "pci"; | ||
125 | reg = <8000 400>; | ||
126 | clock-frequency = <3f940aa>; | ||
127 | interrupt-map-mask = <f800 0 0 7>; | ||
128 | interrupt-map = < | ||
129 | |||
130 | /* IDSEL 0x2 */ | ||
131 | 1000 0 0 1 40000 31 1 | ||
132 | 1000 0 0 2 40000 32 1 | ||
133 | 1000 0 0 3 40000 33 1 | ||
134 | 1000 0 0 4 40000 34 1 | ||
135 | |||
136 | /* IDSEL 0x3 */ | ||
137 | 1800 0 0 1 40000 34 1 | ||
138 | 1800 0 0 2 40000 31 1 | ||
139 | 1800 0 0 3 40000 32 1 | ||
140 | 1800 0 0 4 40000 33 1 | ||
141 | |||
142 | /* IDSEL 0x4 */ | ||
143 | 2000 0 0 1 40000 33 1 | ||
144 | 2000 0 0 2 40000 34 1 | ||
145 | 2000 0 0 3 40000 31 1 | ||
146 | 2000 0 0 4 40000 32 1 | ||
147 | |||
148 | /* IDSEL 0x5 */ | ||
149 | 2800 0 0 1 40000 32 1 | ||
150 | 2800 0 0 2 40000 33 1 | ||
151 | 2800 0 0 3 40000 34 1 | ||
152 | 2800 0 0 4 40000 31 1 | ||
153 | |||
154 | /* IDSEL 12 */ | ||
155 | 6000 0 0 1 40000 31 1 | ||
156 | 6000 0 0 2 40000 32 1 | ||
157 | 6000 0 0 3 40000 33 1 | ||
158 | 6000 0 0 4 40000 34 1 | ||
159 | |||
160 | /* IDSEL 13 */ | ||
161 | 6800 0 0 1 40000 34 1 | ||
162 | 6800 0 0 2 40000 31 1 | ||
163 | 6800 0 0 3 40000 32 1 | ||
164 | 6800 0 0 4 40000 33 1 | ||
165 | |||
166 | /* IDSEL 14*/ | ||
167 | 7000 0 0 1 40000 33 1 | ||
168 | 7000 0 0 2 40000 34 1 | ||
169 | 7000 0 0 3 40000 31 1 | ||
170 | 7000 0 0 4 40000 32 1 | ||
171 | |||
172 | /* IDSEL 15 */ | ||
173 | 7800 0 0 1 40000 32 1 | ||
174 | 7800 0 0 2 40000 33 1 | ||
175 | 7800 0 0 3 40000 34 1 | ||
176 | 7800 0 0 4 40000 31 1 | ||
177 | |||
178 | /* IDSEL 18 */ | ||
179 | 9000 0 0 1 40000 31 1 | ||
180 | 9000 0 0 2 40000 32 1 | ||
181 | 9000 0 0 3 40000 33 1 | ||
182 | 9000 0 0 4 40000 34 1 | ||
183 | |||
184 | /* IDSEL 19 */ | ||
185 | 9800 0 0 1 40000 34 1 | ||
186 | 9800 0 0 2 40000 31 1 | ||
187 | 9800 0 0 3 40000 32 1 | ||
188 | 9800 0 0 4 40000 33 1 | ||
189 | |||
190 | /* IDSEL 20 */ | ||
191 | a000 0 0 1 40000 33 1 | ||
192 | a000 0 0 2 40000 34 1 | ||
193 | a000 0 0 3 40000 31 1 | ||
194 | a000 0 0 4 40000 32 1 | ||
195 | |||
196 | /* IDSEL 21 */ | ||
197 | a800 0 0 1 40000 32 1 | ||
198 | a800 0 0 2 40000 33 1 | ||
199 | a800 0 0 3 40000 34 1 | ||
200 | a800 0 0 4 40000 31 1>; | ||
201 | |||
202 | interrupt-parent = <40000>; | ||
203 | interrupts = <42 0>; | ||
204 | bus-range = <0 0>; | ||
205 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
206 | 01000000 0 00000000 e2000000 0 01000000>; | ||
207 | }; | ||
208 | |||
209 | pic@40000 { | ||
210 | linux,phandle = <40000>; | ||
211 | interrupt-controller; | ||
212 | #address-cells = <0>; | ||
213 | #interrupt-cells = <2>; | ||
214 | reg = <40000 20100>; | ||
215 | built-in; | ||
216 | device_type = "open-pic"; | ||
217 | }; | ||
218 | |||
219 | cpm@e0000000 { | ||
220 | linux,phandle = <e0000000>; | ||
221 | #address-cells = <1>; | ||
222 | #size-cells = <1>; | ||
223 | #interrupt-cells = <2>; | ||
224 | device_type = "cpm"; | ||
225 | model = "CPM2"; | ||
226 | ranges = <0 0 c0000>; | ||
227 | reg = <80000 40000>; | ||
228 | command-proc = <919c0>; | ||
229 | brg-frequency = <9d5b340>; | ||
230 | |||
231 | pic@90c00 { | ||
232 | linux,phandle = <90c00>; | ||
233 | interrupt-controller; | ||
234 | #address-cells = <0>; | ||
235 | #interrupt-cells = <2>; | ||
236 | interrupts = <1e 0>; | ||
237 | interrupt-parent = <40000>; | ||
238 | reg = <90c00 80>; | ||
239 | built-in; | ||
240 | device_type = "cpm-pic"; | ||
241 | }; | ||
242 | |||
243 | scc@91a00 { | ||
244 | device_type = "serial"; | ||
245 | compatible = "cpm_uart"; | ||
246 | model = "SCC"; | ||
247 | device-id = <1>; | ||
248 | reg = <91a00 20 88000 100>; | ||
249 | clock-setup = <00ffffff 0>; | ||
250 | rx-clock = <1>; | ||
251 | tx-clock = <1>; | ||
252 | current-speed = <1c200>; | ||
253 | interrupts = <64 1>; | ||
254 | interrupt-parent = <90c00>; | ||
255 | }; | ||
256 | |||
257 | scc@91a20 { | ||
258 | device_type = "serial"; | ||
259 | compatible = "cpm_uart"; | ||
260 | model = "SCC"; | ||
261 | device-id = <2>; | ||
262 | reg = <91a20 20 88100 100>; | ||
263 | clock-setup = <ff00ffff 90000>; | ||
264 | rx-clock = <2>; | ||
265 | tx-clock = <2>; | ||
266 | current-speed = <1c200>; | ||
267 | interrupts = <65 1>; | ||
268 | interrupt-parent = <90c00>; | ||
269 | }; | ||
270 | |||
271 | fcc@91320 { | ||
272 | device_type = "network"; | ||
273 | compatible = "fs_enet"; | ||
274 | model = "FCC"; | ||
275 | device-id = <2>; | ||
276 | reg = <91320 20 88500 100 913a0 30>; | ||
277 | mac-address = [ 00 00 0C 00 02 FD ]; | ||
278 | clock-setup = <ff00ffff 250000>; | ||
279 | rx-clock = <15>; | ||
280 | tx-clock = <16>; | ||
281 | interrupts = <5d 1>; | ||
282 | interrupt-parent = <90c00>; | ||
283 | phy-handle = <2452002>; | ||
284 | }; | ||
285 | |||
286 | fcc@91340 { | ||
287 | device_type = "network"; | ||
288 | compatible = "fs_enet"; | ||
289 | model = "FCC"; | ||
290 | device-id = <3>; | ||
291 | reg = <91340 20 88600 100 913d0 30>; | ||
292 | mac-address = [ 00 00 0C 00 03 FD ]; | ||
293 | clock-setup = <ffff00ff 3700>; | ||
294 | rx-clock = <17>; | ||
295 | tx-clock = <18>; | ||
296 | interrupts = <5e 1>; | ||
297 | interrupt-parent = <90c00>; | ||
298 | phy-handle = <2452003>; | ||
299 | }; | ||
300 | }; | ||
301 | }; | ||
302 | }; | ||
diff --git a/arch/powerpc/configs/mpc8560_ads_defconfig b/arch/powerpc/configs/mpc8560_ads_defconfig new file mode 100644 index 000000000000..ddc2a7b07ba0 --- /dev/null +++ b/arch/powerpc/configs/mpc8560_ads_defconfig | |||
@@ -0,0 +1,854 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.18-rc4 | ||
4 | # Fri Aug 11 16:45:05 2006 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | CONFIG_PPC32=y | ||
8 | CONFIG_PPC_MERGE=y | ||
9 | CONFIG_MMU=y | ||
10 | CONFIG_GENERIC_HARDIRQS=y | ||
11 | CONFIG_IRQ_PER_CPU=y | ||
12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
13 | CONFIG_GENERIC_HWEIGHT=y | ||
14 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
15 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
16 | CONFIG_PPC=y | ||
17 | CONFIG_EARLY_PRINTK=y | ||
18 | CONFIG_GENERIC_NVRAM=y | ||
19 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
20 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
21 | CONFIG_PPC_OF=y | ||
22 | # CONFIG_PPC_UDBG_16550 is not set | ||
23 | # CONFIG_GENERIC_TBSYNC is not set | ||
24 | CONFIG_DEFAULT_UIMAGE=y | ||
25 | |||
26 | # | ||
27 | # Processor support | ||
28 | # | ||
29 | # CONFIG_CLASSIC32 is not set | ||
30 | # CONFIG_PPC_52xx is not set | ||
31 | # CONFIG_PPC_82xx is not set | ||
32 | # CONFIG_PPC_83xx is not set | ||
33 | CONFIG_PPC_85xx=y | ||
34 | # CONFIG_PPC_86xx is not set | ||
35 | # CONFIG_40x is not set | ||
36 | # CONFIG_44x is not set | ||
37 | # CONFIG_8xx is not set | ||
38 | # CONFIG_E200 is not set | ||
39 | CONFIG_85xx=y | ||
40 | CONFIG_E500=y | ||
41 | CONFIG_BOOKE=y | ||
42 | CONFIG_FSL_BOOKE=y | ||
43 | # CONFIG_PHYS_64BIT is not set | ||
44 | CONFIG_SPE=y | ||
45 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
46 | |||
47 | # | ||
48 | # Code maturity level options | ||
49 | # | ||
50 | CONFIG_EXPERIMENTAL=y | ||
51 | CONFIG_BROKEN_ON_SMP=y | ||
52 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
53 | |||
54 | # | ||
55 | # General setup | ||
56 | # | ||
57 | CONFIG_LOCALVERSION="" | ||
58 | CONFIG_LOCALVERSION_AUTO=y | ||
59 | CONFIG_SWAP=y | ||
60 | CONFIG_SYSVIPC=y | ||
61 | # CONFIG_POSIX_MQUEUE is not set | ||
62 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
63 | # CONFIG_TASKSTATS is not set | ||
64 | CONFIG_SYSCTL=y | ||
65 | # CONFIG_AUDIT is not set | ||
66 | # CONFIG_IKCONFIG is not set | ||
67 | # CONFIG_RELAY is not set | ||
68 | CONFIG_INITRAMFS_SOURCE="" | ||
69 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
70 | CONFIG_EMBEDDED=y | ||
71 | CONFIG_KALLSYMS=y | ||
72 | # CONFIG_KALLSYMS_ALL is not set | ||
73 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
74 | CONFIG_HOTPLUG=y | ||
75 | CONFIG_PRINTK=y | ||
76 | CONFIG_BUG=y | ||
77 | CONFIG_ELF_CORE=y | ||
78 | CONFIG_BASE_FULL=y | ||
79 | CONFIG_RT_MUTEXES=y | ||
80 | CONFIG_FUTEX=y | ||
81 | CONFIG_EPOLL=y | ||
82 | CONFIG_SHMEM=y | ||
83 | CONFIG_SLAB=y | ||
84 | CONFIG_VM_EVENT_COUNTERS=y | ||
85 | # CONFIG_TINY_SHMEM is not set | ||
86 | CONFIG_BASE_SMALL=0 | ||
87 | # CONFIG_SLOB is not set | ||
88 | |||
89 | # | ||
90 | # Loadable module support | ||
91 | # | ||
92 | # CONFIG_MODULES is not set | ||
93 | |||
94 | # | ||
95 | # Block layer | ||
96 | # | ||
97 | # CONFIG_LBD is not set | ||
98 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
99 | # CONFIG_LSF is not set | ||
100 | |||
101 | # | ||
102 | # IO Schedulers | ||
103 | # | ||
104 | CONFIG_IOSCHED_NOOP=y | ||
105 | CONFIG_IOSCHED_AS=y | ||
106 | CONFIG_IOSCHED_DEADLINE=y | ||
107 | CONFIG_IOSCHED_CFQ=y | ||
108 | CONFIG_DEFAULT_AS=y | ||
109 | # CONFIG_DEFAULT_DEADLINE is not set | ||
110 | # CONFIG_DEFAULT_CFQ is not set | ||
111 | # CONFIG_DEFAULT_NOOP is not set | ||
112 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
113 | CONFIG_MPIC=y | ||
114 | CONFIG_CPM2=y | ||
115 | # CONFIG_WANT_EARLY_SERIAL is not set | ||
116 | |||
117 | # | ||
118 | # Platform support | ||
119 | # | ||
120 | # CONFIG_MPC8540_ADS is not set | ||
121 | CONFIG_MPC8560_ADS=y | ||
122 | # CONFIG_MPC85xx_CDS is not set | ||
123 | CONFIG_MPC8560=y | ||
124 | CONFIG_PPC_INDIRECT_PCI_BE=y | ||
125 | |||
126 | # | ||
127 | # Kernel options | ||
128 | # | ||
129 | # CONFIG_HIGHMEM is not set | ||
130 | # CONFIG_HZ_100 is not set | ||
131 | CONFIG_HZ_250=y | ||
132 | # CONFIG_HZ_1000 is not set | ||
133 | CONFIG_HZ=250 | ||
134 | CONFIG_PREEMPT_NONE=y | ||
135 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
136 | # CONFIG_PREEMPT is not set | ||
137 | CONFIG_BINFMT_ELF=y | ||
138 | CONFIG_BINFMT_MISC=y | ||
139 | # CONFIG_MATH_EMULATION is not set | ||
140 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
141 | # CONFIG_PC_KEYBOARD is not set | ||
142 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
143 | CONFIG_SELECT_MEMORY_MODEL=y | ||
144 | CONFIG_FLATMEM_MANUAL=y | ||
145 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
146 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
147 | CONFIG_FLATMEM=y | ||
148 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
149 | # CONFIG_SPARSEMEM_STATIC is not set | ||
150 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
151 | # CONFIG_RESOURCES_64BIT is not set | ||
152 | # CONFIG_PROC_DEVICETREE is not set | ||
153 | # CONFIG_CMDLINE_BOOL is not set | ||
154 | # CONFIG_PM is not set | ||
155 | # CONFIG_SOFTWARE_SUSPEND is not set | ||
156 | # CONFIG_SECCOMP is not set | ||
157 | CONFIG_ISA_DMA_API=y | ||
158 | |||
159 | # | ||
160 | # Bus options | ||
161 | # | ||
162 | # CONFIG_PPC_I8259 is not set | ||
163 | CONFIG_PPC_INDIRECT_PCI=y | ||
164 | CONFIG_FSL_SOC=y | ||
165 | CONFIG_PCI=y | ||
166 | CONFIG_PCI_DOMAINS=y | ||
167 | # CONFIG_PCIEPORTBUS is not set | ||
168 | CONFIG_PCI_DEBUG=y | ||
169 | |||
170 | # | ||
171 | # PCCARD (PCMCIA/CardBus) support | ||
172 | # | ||
173 | # CONFIG_PCCARD is not set | ||
174 | |||
175 | # | ||
176 | # PCI Hotplug Support | ||
177 | # | ||
178 | # CONFIG_HOTPLUG_PCI is not set | ||
179 | |||
180 | # | ||
181 | # Advanced setup | ||
182 | # | ||
183 | # CONFIG_ADVANCED_OPTIONS is not set | ||
184 | |||
185 | # | ||
186 | # Default settings for advanced configuration options are used | ||
187 | # | ||
188 | CONFIG_HIGHMEM_START=0xfe000000 | ||
189 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
190 | CONFIG_KERNEL_START=0xc0000000 | ||
191 | CONFIG_TASK_SIZE=0x80000000 | ||
192 | CONFIG_BOOT_LOAD=0x00800000 | ||
193 | |||
194 | # | ||
195 | # Networking | ||
196 | # | ||
197 | CONFIG_NET=y | ||
198 | |||
199 | # | ||
200 | # Networking options | ||
201 | # | ||
202 | # CONFIG_NETDEBUG is not set | ||
203 | CONFIG_PACKET=y | ||
204 | # CONFIG_PACKET_MMAP is not set | ||
205 | CONFIG_UNIX=y | ||
206 | CONFIG_XFRM=y | ||
207 | # CONFIG_XFRM_USER is not set | ||
208 | # CONFIG_NET_KEY is not set | ||
209 | CONFIG_INET=y | ||
210 | CONFIG_IP_MULTICAST=y | ||
211 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
212 | CONFIG_IP_FIB_HASH=y | ||
213 | CONFIG_IP_PNP=y | ||
214 | CONFIG_IP_PNP_DHCP=y | ||
215 | CONFIG_IP_PNP_BOOTP=y | ||
216 | # CONFIG_IP_PNP_RARP is not set | ||
217 | # CONFIG_NET_IPIP is not set | ||
218 | # CONFIG_NET_IPGRE is not set | ||
219 | # CONFIG_IP_MROUTE is not set | ||
220 | # CONFIG_ARPD is not set | ||
221 | CONFIG_SYN_COOKIES=y | ||
222 | # CONFIG_INET_AH is not set | ||
223 | # CONFIG_INET_ESP is not set | ||
224 | # CONFIG_INET_IPCOMP is not set | ||
225 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
226 | # CONFIG_INET_TUNNEL is not set | ||
227 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
228 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
229 | CONFIG_INET_DIAG=y | ||
230 | CONFIG_INET_TCP_DIAG=y | ||
231 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
232 | CONFIG_TCP_CONG_BIC=y | ||
233 | # CONFIG_IPV6 is not set | ||
234 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
235 | # CONFIG_INET6_TUNNEL is not set | ||
236 | # CONFIG_NETWORK_SECMARK is not set | ||
237 | # CONFIG_NETFILTER is not set | ||
238 | |||
239 | # | ||
240 | # DCCP Configuration (EXPERIMENTAL) | ||
241 | # | ||
242 | # CONFIG_IP_DCCP is not set | ||
243 | |||
244 | # | ||
245 | # SCTP Configuration (EXPERIMENTAL) | ||
246 | # | ||
247 | # CONFIG_IP_SCTP is not set | ||
248 | |||
249 | # | ||
250 | # TIPC Configuration (EXPERIMENTAL) | ||
251 | # | ||
252 | # CONFIG_TIPC is not set | ||
253 | # CONFIG_ATM is not set | ||
254 | # CONFIG_BRIDGE is not set | ||
255 | # CONFIG_VLAN_8021Q is not set | ||
256 | # CONFIG_DECNET is not set | ||
257 | # CONFIG_LLC2 is not set | ||
258 | # CONFIG_IPX is not set | ||
259 | # CONFIG_ATALK is not set | ||
260 | # CONFIG_X25 is not set | ||
261 | # CONFIG_LAPB is not set | ||
262 | # CONFIG_NET_DIVERT is not set | ||
263 | # CONFIG_ECONET is not set | ||
264 | # CONFIG_WAN_ROUTER is not set | ||
265 | |||
266 | # | ||
267 | # QoS and/or fair queueing | ||
268 | # | ||
269 | # CONFIG_NET_SCHED is not set | ||
270 | |||
271 | # | ||
272 | # Network testing | ||
273 | # | ||
274 | # CONFIG_NET_PKTGEN is not set | ||
275 | # CONFIG_HAMRADIO is not set | ||
276 | # CONFIG_IRDA is not set | ||
277 | # CONFIG_BT is not set | ||
278 | # CONFIG_IEEE80211 is not set | ||
279 | |||
280 | # | ||
281 | # Device Drivers | ||
282 | # | ||
283 | |||
284 | # | ||
285 | # Generic Driver Options | ||
286 | # | ||
287 | CONFIG_STANDALONE=y | ||
288 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
289 | # CONFIG_FW_LOADER is not set | ||
290 | # CONFIG_DEBUG_DRIVER is not set | ||
291 | # CONFIG_SYS_HYPERVISOR is not set | ||
292 | |||
293 | # | ||
294 | # Connector - unified userspace <-> kernelspace linker | ||
295 | # | ||
296 | # CONFIG_CONNECTOR is not set | ||
297 | |||
298 | # | ||
299 | # Memory Technology Devices (MTD) | ||
300 | # | ||
301 | # CONFIG_MTD is not set | ||
302 | |||
303 | # | ||
304 | # Parallel port support | ||
305 | # | ||
306 | # CONFIG_PARPORT is not set | ||
307 | |||
308 | # | ||
309 | # Plug and Play support | ||
310 | # | ||
311 | |||
312 | # | ||
313 | # Block devices | ||
314 | # | ||
315 | # CONFIG_BLK_DEV_FD is not set | ||
316 | # CONFIG_BLK_CPQ_DA is not set | ||
317 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
318 | # CONFIG_BLK_DEV_DAC960 is not set | ||
319 | # CONFIG_BLK_DEV_UMEM is not set | ||
320 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
321 | CONFIG_BLK_DEV_LOOP=y | ||
322 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
323 | # CONFIG_BLK_DEV_NBD is not set | ||
324 | # CONFIG_BLK_DEV_SX8 is not set | ||
325 | CONFIG_BLK_DEV_RAM=y | ||
326 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
327 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
328 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
329 | CONFIG_BLK_DEV_INITRD=y | ||
330 | # CONFIG_CDROM_PKTCDVD is not set | ||
331 | # CONFIG_ATA_OVER_ETH is not set | ||
332 | |||
333 | # | ||
334 | # ATA/ATAPI/MFM/RLL support | ||
335 | # | ||
336 | # CONFIG_IDE is not set | ||
337 | |||
338 | # | ||
339 | # SCSI device support | ||
340 | # | ||
341 | # CONFIG_RAID_ATTRS is not set | ||
342 | # CONFIG_SCSI is not set | ||
343 | |||
344 | # | ||
345 | # Multi-device support (RAID and LVM) | ||
346 | # | ||
347 | # CONFIG_MD is not set | ||
348 | |||
349 | # | ||
350 | # Fusion MPT device support | ||
351 | # | ||
352 | # CONFIG_FUSION is not set | ||
353 | |||
354 | # | ||
355 | # IEEE 1394 (FireWire) support | ||
356 | # | ||
357 | # CONFIG_IEEE1394 is not set | ||
358 | |||
359 | # | ||
360 | # I2O device support | ||
361 | # | ||
362 | # CONFIG_I2O is not set | ||
363 | |||
364 | # | ||
365 | # Macintosh device drivers | ||
366 | # | ||
367 | # CONFIG_WINDFARM is not set | ||
368 | |||
369 | # | ||
370 | # Network device support | ||
371 | # | ||
372 | CONFIG_NETDEVICES=y | ||
373 | # CONFIG_DUMMY is not set | ||
374 | # CONFIG_BONDING is not set | ||
375 | # CONFIG_EQUALIZER is not set | ||
376 | # CONFIG_TUN is not set | ||
377 | |||
378 | # | ||
379 | # ARCnet devices | ||
380 | # | ||
381 | # CONFIG_ARCNET is not set | ||
382 | |||
383 | # | ||
384 | # PHY device support | ||
385 | # | ||
386 | CONFIG_PHYLIB=y | ||
387 | |||
388 | # | ||
389 | # MII PHY device drivers | ||
390 | # | ||
391 | CONFIG_MARVELL_PHY=y | ||
392 | CONFIG_DAVICOM_PHY=y | ||
393 | # CONFIG_QSEMI_PHY is not set | ||
394 | # CONFIG_LXT_PHY is not set | ||
395 | # CONFIG_CICADA_PHY is not set | ||
396 | # CONFIG_VITESSE_PHY is not set | ||
397 | # CONFIG_SMSC_PHY is not set | ||
398 | # CONFIG_FIXED_PHY is not set | ||
399 | |||
400 | # | ||
401 | # Ethernet (10 or 100Mbit) | ||
402 | # | ||
403 | CONFIG_NET_ETHERNET=y | ||
404 | CONFIG_MII=y | ||
405 | # CONFIG_HAPPYMEAL is not set | ||
406 | # CONFIG_SUNGEM is not set | ||
407 | # CONFIG_CASSINI is not set | ||
408 | # CONFIG_NET_VENDOR_3COM is not set | ||
409 | |||
410 | # | ||
411 | # Tulip family network device support | ||
412 | # | ||
413 | # CONFIG_NET_TULIP is not set | ||
414 | # CONFIG_HP100 is not set | ||
415 | # CONFIG_NET_PCI is not set | ||
416 | CONFIG_FS_ENET=y | ||
417 | # CONFIG_FS_ENET_HAS_SCC is not set | ||
418 | CONFIG_FS_ENET_HAS_FCC=y | ||
419 | |||
420 | # | ||
421 | # Ethernet (1000 Mbit) | ||
422 | # | ||
423 | # CONFIG_ACENIC is not set | ||
424 | # CONFIG_DL2K is not set | ||
425 | CONFIG_E1000=y | ||
426 | CONFIG_E1000_NAPI=y | ||
427 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set | ||
428 | # CONFIG_NS83820 is not set | ||
429 | # CONFIG_HAMACHI is not set | ||
430 | # CONFIG_YELLOWFIN is not set | ||
431 | # CONFIG_R8169 is not set | ||
432 | # CONFIG_SIS190 is not set | ||
433 | # CONFIG_SKGE is not set | ||
434 | # CONFIG_SKY2 is not set | ||
435 | # CONFIG_SK98LIN is not set | ||
436 | # CONFIG_TIGON3 is not set | ||
437 | # CONFIG_BNX2 is not set | ||
438 | CONFIG_GIANFAR=y | ||
439 | CONFIG_GFAR_NAPI=y | ||
440 | |||
441 | # | ||
442 | # Ethernet (10000 Mbit) | ||
443 | # | ||
444 | # CONFIG_CHELSIO_T1 is not set | ||
445 | # CONFIG_IXGB is not set | ||
446 | # CONFIG_S2IO is not set | ||
447 | # CONFIG_MYRI10GE is not set | ||
448 | |||
449 | # | ||
450 | # Token Ring devices | ||
451 | # | ||
452 | # CONFIG_TR is not set | ||
453 | |||
454 | # | ||
455 | # Wireless LAN (non-hamradio) | ||
456 | # | ||
457 | # CONFIG_NET_RADIO is not set | ||
458 | |||
459 | # | ||
460 | # Wan interfaces | ||
461 | # | ||
462 | # CONFIG_WAN is not set | ||
463 | # CONFIG_FDDI is not set | ||
464 | # CONFIG_HIPPI is not set | ||
465 | # CONFIG_PPP is not set | ||
466 | # CONFIG_SLIP is not set | ||
467 | # CONFIG_SHAPER is not set | ||
468 | # CONFIG_NETCONSOLE is not set | ||
469 | # CONFIG_NETPOLL is not set | ||
470 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
471 | |||
472 | # | ||
473 | # ISDN subsystem | ||
474 | # | ||
475 | # CONFIG_ISDN is not set | ||
476 | |||
477 | # | ||
478 | # Telephony Support | ||
479 | # | ||
480 | # CONFIG_PHONE is not set | ||
481 | |||
482 | # | ||
483 | # Input device support | ||
484 | # | ||
485 | CONFIG_INPUT=y | ||
486 | |||
487 | # | ||
488 | # Userland interfaces | ||
489 | # | ||
490 | # CONFIG_INPUT_MOUSEDEV is not set | ||
491 | # CONFIG_INPUT_JOYDEV is not set | ||
492 | # CONFIG_INPUT_TSDEV is not set | ||
493 | # CONFIG_INPUT_EVDEV is not set | ||
494 | # CONFIG_INPUT_EVBUG is not set | ||
495 | |||
496 | # | ||
497 | # Input Device Drivers | ||
498 | # | ||
499 | # CONFIG_INPUT_KEYBOARD is not set | ||
500 | # CONFIG_INPUT_MOUSE is not set | ||
501 | # CONFIG_INPUT_JOYSTICK is not set | ||
502 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
503 | # CONFIG_INPUT_MISC is not set | ||
504 | |||
505 | # | ||
506 | # Hardware I/O ports | ||
507 | # | ||
508 | # CONFIG_SERIO is not set | ||
509 | # CONFIG_GAMEPORT is not set | ||
510 | |||
511 | # | ||
512 | # Character devices | ||
513 | # | ||
514 | # CONFIG_VT is not set | ||
515 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
516 | |||
517 | # | ||
518 | # Serial drivers | ||
519 | # | ||
520 | # CONFIG_SERIAL_8250 is not set | ||
521 | |||
522 | # | ||
523 | # Non-8250 serial port support | ||
524 | # | ||
525 | CONFIG_SERIAL_CORE=y | ||
526 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
527 | CONFIG_SERIAL_CPM=y | ||
528 | CONFIG_SERIAL_CPM_CONSOLE=y | ||
529 | CONFIG_SERIAL_CPM_SCC1=y | ||
530 | CONFIG_SERIAL_CPM_SCC2=y | ||
531 | # CONFIG_SERIAL_CPM_SCC3 is not set | ||
532 | # CONFIG_SERIAL_CPM_SCC4 is not set | ||
533 | # CONFIG_SERIAL_CPM_SMC1 is not set | ||
534 | # CONFIG_SERIAL_CPM_SMC2 is not set | ||
535 | # CONFIG_SERIAL_JSM is not set | ||
536 | CONFIG_UNIX98_PTYS=y | ||
537 | CONFIG_LEGACY_PTYS=y | ||
538 | CONFIG_LEGACY_PTY_COUNT=256 | ||
539 | # CONFIG_BRIQ_PANEL is not set | ||
540 | |||
541 | # | ||
542 | # IPMI | ||
543 | # | ||
544 | # CONFIG_IPMI_HANDLER is not set | ||
545 | |||
546 | # | ||
547 | # Watchdog Cards | ||
548 | # | ||
549 | # CONFIG_WATCHDOG is not set | ||
550 | CONFIG_HW_RANDOM=y | ||
551 | # CONFIG_NVRAM is not set | ||
552 | CONFIG_GEN_RTC=y | ||
553 | # CONFIG_GEN_RTC_X is not set | ||
554 | # CONFIG_DTLK is not set | ||
555 | # CONFIG_R3964 is not set | ||
556 | # CONFIG_APPLICOM is not set | ||
557 | |||
558 | # | ||
559 | # Ftape, the floppy tape device driver | ||
560 | # | ||
561 | # CONFIG_AGP is not set | ||
562 | # CONFIG_DRM is not set | ||
563 | # CONFIG_RAW_DRIVER is not set | ||
564 | |||
565 | # | ||
566 | # TPM devices | ||
567 | # | ||
568 | # CONFIG_TCG_TPM is not set | ||
569 | # CONFIG_TELCLOCK is not set | ||
570 | |||
571 | # | ||
572 | # I2C support | ||
573 | # | ||
574 | # CONFIG_I2C is not set | ||
575 | |||
576 | # | ||
577 | # SPI support | ||
578 | # | ||
579 | # CONFIG_SPI is not set | ||
580 | # CONFIG_SPI_MASTER is not set | ||
581 | |||
582 | # | ||
583 | # Dallas's 1-wire bus | ||
584 | # | ||
585 | |||
586 | # | ||
587 | # Hardware Monitoring support | ||
588 | # | ||
589 | CONFIG_HWMON=y | ||
590 | # CONFIG_HWMON_VID is not set | ||
591 | # CONFIG_SENSORS_ABITUGURU is not set | ||
592 | # CONFIG_SENSORS_F71805F is not set | ||
593 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
594 | |||
595 | # | ||
596 | # Misc devices | ||
597 | # | ||
598 | |||
599 | # | ||
600 | # Multimedia devices | ||
601 | # | ||
602 | # CONFIG_VIDEO_DEV is not set | ||
603 | CONFIG_VIDEO_V4L2=y | ||
604 | |||
605 | # | ||
606 | # Digital Video Broadcasting Devices | ||
607 | # | ||
608 | # CONFIG_DVB is not set | ||
609 | |||
610 | # | ||
611 | # Graphics support | ||
612 | # | ||
613 | CONFIG_FIRMWARE_EDID=y | ||
614 | # CONFIG_FB is not set | ||
615 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
616 | |||
617 | # | ||
618 | # Sound | ||
619 | # | ||
620 | # CONFIG_SOUND is not set | ||
621 | |||
622 | # | ||
623 | # USB support | ||
624 | # | ||
625 | CONFIG_USB_ARCH_HAS_HCD=y | ||
626 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
627 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
628 | # CONFIG_USB is not set | ||
629 | |||
630 | # | ||
631 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
632 | # | ||
633 | |||
634 | # | ||
635 | # USB Gadget Support | ||
636 | # | ||
637 | # CONFIG_USB_GADGET is not set | ||
638 | |||
639 | # | ||
640 | # MMC/SD Card support | ||
641 | # | ||
642 | # CONFIG_MMC is not set | ||
643 | |||
644 | # | ||
645 | # LED devices | ||
646 | # | ||
647 | # CONFIG_NEW_LEDS is not set | ||
648 | |||
649 | # | ||
650 | # LED drivers | ||
651 | # | ||
652 | |||
653 | # | ||
654 | # LED Triggers | ||
655 | # | ||
656 | |||
657 | # | ||
658 | # InfiniBand support | ||
659 | # | ||
660 | # CONFIG_INFINIBAND is not set | ||
661 | |||
662 | # | ||
663 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
664 | # | ||
665 | |||
666 | # | ||
667 | # Real Time Clock | ||
668 | # | ||
669 | # CONFIG_RTC_CLASS is not set | ||
670 | |||
671 | # | ||
672 | # DMA Engine support | ||
673 | # | ||
674 | # CONFIG_DMA_ENGINE is not set | ||
675 | |||
676 | # | ||
677 | # DMA Clients | ||
678 | # | ||
679 | |||
680 | # | ||
681 | # DMA Devices | ||
682 | # | ||
683 | |||
684 | # | ||
685 | # File systems | ||
686 | # | ||
687 | CONFIG_EXT2_FS=y | ||
688 | # CONFIG_EXT2_FS_XATTR is not set | ||
689 | # CONFIG_EXT2_FS_XIP is not set | ||
690 | CONFIG_EXT3_FS=y | ||
691 | CONFIG_EXT3_FS_XATTR=y | ||
692 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
693 | # CONFIG_EXT3_FS_SECURITY is not set | ||
694 | CONFIG_JBD=y | ||
695 | # CONFIG_JBD_DEBUG is not set | ||
696 | CONFIG_FS_MBCACHE=y | ||
697 | # CONFIG_REISERFS_FS is not set | ||
698 | # CONFIG_JFS_FS is not set | ||
699 | # CONFIG_FS_POSIX_ACL is not set | ||
700 | # CONFIG_XFS_FS is not set | ||
701 | # CONFIG_OCFS2_FS is not set | ||
702 | # CONFIG_MINIX_FS is not set | ||
703 | # CONFIG_ROMFS_FS is not set | ||
704 | CONFIG_INOTIFY=y | ||
705 | CONFIG_INOTIFY_USER=y | ||
706 | # CONFIG_QUOTA is not set | ||
707 | CONFIG_DNOTIFY=y | ||
708 | # CONFIG_AUTOFS_FS is not set | ||
709 | # CONFIG_AUTOFS4_FS is not set | ||
710 | # CONFIG_FUSE_FS is not set | ||
711 | |||
712 | # | ||
713 | # CD-ROM/DVD Filesystems | ||
714 | # | ||
715 | # CONFIG_ISO9660_FS is not set | ||
716 | # CONFIG_UDF_FS is not set | ||
717 | |||
718 | # | ||
719 | # DOS/FAT/NT Filesystems | ||
720 | # | ||
721 | # CONFIG_MSDOS_FS is not set | ||
722 | # CONFIG_VFAT_FS is not set | ||
723 | # CONFIG_NTFS_FS is not set | ||
724 | |||
725 | # | ||
726 | # Pseudo filesystems | ||
727 | # | ||
728 | CONFIG_PROC_FS=y | ||
729 | CONFIG_PROC_KCORE=y | ||
730 | CONFIG_SYSFS=y | ||
731 | CONFIG_TMPFS=y | ||
732 | # CONFIG_HUGETLB_PAGE is not set | ||
733 | CONFIG_RAMFS=y | ||
734 | # CONFIG_CONFIGFS_FS is not set | ||
735 | |||
736 | # | ||
737 | # Miscellaneous filesystems | ||
738 | # | ||
739 | # CONFIG_ADFS_FS is not set | ||
740 | # CONFIG_AFFS_FS is not set | ||
741 | # CONFIG_HFS_FS is not set | ||
742 | # CONFIG_HFSPLUS_FS is not set | ||
743 | # CONFIG_BEFS_FS is not set | ||
744 | # CONFIG_BFS_FS is not set | ||
745 | # CONFIG_EFS_FS is not set | ||
746 | # CONFIG_CRAMFS is not set | ||
747 | # CONFIG_VXFS_FS is not set | ||
748 | # CONFIG_HPFS_FS is not set | ||
749 | # CONFIG_QNX4FS_FS is not set | ||
750 | # CONFIG_SYSV_FS is not set | ||
751 | # CONFIG_UFS_FS is not set | ||
752 | |||
753 | # | ||
754 | # Network File Systems | ||
755 | # | ||
756 | CONFIG_NFS_FS=y | ||
757 | # CONFIG_NFS_V3 is not set | ||
758 | # CONFIG_NFS_V4 is not set | ||
759 | # CONFIG_NFS_DIRECTIO is not set | ||
760 | # CONFIG_NFSD is not set | ||
761 | CONFIG_ROOT_NFS=y | ||
762 | CONFIG_LOCKD=y | ||
763 | CONFIG_NFS_COMMON=y | ||
764 | CONFIG_SUNRPC=y | ||
765 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
766 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
767 | # CONFIG_SMB_FS is not set | ||
768 | # CONFIG_CIFS is not set | ||
769 | # CONFIG_NCP_FS is not set | ||
770 | # CONFIG_CODA_FS is not set | ||
771 | # CONFIG_AFS_FS is not set | ||
772 | # CONFIG_9P_FS is not set | ||
773 | |||
774 | # | ||
775 | # Partition Types | ||
776 | # | ||
777 | CONFIG_PARTITION_ADVANCED=y | ||
778 | # CONFIG_ACORN_PARTITION is not set | ||
779 | # CONFIG_OSF_PARTITION is not set | ||
780 | # CONFIG_AMIGA_PARTITION is not set | ||
781 | # CONFIG_ATARI_PARTITION is not set | ||
782 | # CONFIG_MAC_PARTITION is not set | ||
783 | # CONFIG_MSDOS_PARTITION is not set | ||
784 | # CONFIG_LDM_PARTITION is not set | ||
785 | # CONFIG_SGI_PARTITION is not set | ||
786 | # CONFIG_ULTRIX_PARTITION is not set | ||
787 | # CONFIG_SUN_PARTITION is not set | ||
788 | # CONFIG_KARMA_PARTITION is not set | ||
789 | # CONFIG_EFI_PARTITION is not set | ||
790 | |||
791 | # | ||
792 | # Native Language Support | ||
793 | # | ||
794 | # CONFIG_NLS is not set | ||
795 | |||
796 | # | ||
797 | # Library routines | ||
798 | # | ||
799 | # CONFIG_CRC_CCITT is not set | ||
800 | # CONFIG_CRC16 is not set | ||
801 | CONFIG_CRC32=y | ||
802 | # CONFIG_LIBCRC32C is not set | ||
803 | CONFIG_PLIST=y | ||
804 | |||
805 | # | ||
806 | # Instrumentation Support | ||
807 | # | ||
808 | # CONFIG_PROFILING is not set | ||
809 | |||
810 | # | ||
811 | # Kernel hacking | ||
812 | # | ||
813 | # CONFIG_PRINTK_TIME is not set | ||
814 | # CONFIG_MAGIC_SYSRQ is not set | ||
815 | # CONFIG_UNUSED_SYMBOLS is not set | ||
816 | CONFIG_DEBUG_KERNEL=y | ||
817 | CONFIG_LOG_BUF_SHIFT=14 | ||
818 | CONFIG_DETECT_SOFTLOCKUP=y | ||
819 | # CONFIG_SCHEDSTATS is not set | ||
820 | # CONFIG_DEBUG_SLAB is not set | ||
821 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
822 | # CONFIG_RT_MUTEX_TESTER is not set | ||
823 | # CONFIG_DEBUG_SPINLOCK is not set | ||
824 | CONFIG_DEBUG_MUTEXES=y | ||
825 | # CONFIG_DEBUG_RWSEMS is not set | ||
826 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
827 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
828 | # CONFIG_DEBUG_KOBJECT is not set | ||
829 | # CONFIG_DEBUG_INFO is not set | ||
830 | # CONFIG_DEBUG_FS is not set | ||
831 | # CONFIG_DEBUG_VM is not set | ||
832 | # CONFIG_UNWIND_INFO is not set | ||
833 | CONFIG_FORCED_INLINING=y | ||
834 | # CONFIG_RCU_TORTURE_TEST is not set | ||
835 | # CONFIG_DEBUGGER is not set | ||
836 | # CONFIG_KGDB_CONSOLE is not set | ||
837 | # CONFIG_BDI_SWITCH is not set | ||
838 | # CONFIG_BOOTX_TEXT is not set | ||
839 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
840 | |||
841 | # | ||
842 | # Security options | ||
843 | # | ||
844 | # CONFIG_KEYS is not set | ||
845 | # CONFIG_SECURITY is not set | ||
846 | |||
847 | # | ||
848 | # Cryptographic options | ||
849 | # | ||
850 | # CONFIG_CRYPTO is not set | ||
851 | |||
852 | # | ||
853 | # Hardware crypto devices | ||
854 | # | ||
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 336dd191f768..8030f6245d82 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile | |||
@@ -20,3 +20,8 @@ ifeq ($(CONFIG_PPC64),y) | |||
20 | obj-$(CONFIG_SMP) += locks.o | 20 | obj-$(CONFIG_SMP) += locks.o |
21 | obj-$(CONFIG_DEBUG_KERNEL) += sstep.o | 21 | obj-$(CONFIG_DEBUG_KERNEL) += sstep.o |
22 | endif | 22 | endif |
23 | |||
24 | # Temporary hack until we have migrated to asm-powerpc | ||
25 | ifeq ($(CONFIG_PPC_MERGE),y) | ||
26 | obj-$(CONFIG_CPM2) += rheap.o | ||
27 | endif | ||
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index c3268d9877e4..0584f3c7e884 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -11,6 +11,12 @@ config MPC8540_ADS | |||
11 | help | 11 | help |
12 | This option enables support for the MPC 8540 ADS board | 12 | This option enables support for the MPC 8540 ADS board |
13 | 13 | ||
14 | config MPC8560_ADS | ||
15 | bool "Freescale MPC8560 ADS" | ||
16 | select DEFAULT_UIMAGE | ||
17 | help | ||
18 | This option enables support for the MPC 8560 ADS board | ||
19 | |||
14 | config MPC85xx_CDS | 20 | config MPC85xx_CDS |
15 | bool "Freescale MPC85xx CDS" | 21 | bool "Freescale MPC85xx CDS" |
16 | select DEFAULT_UIMAGE | 22 | select DEFAULT_UIMAGE |
@@ -25,6 +31,11 @@ config MPC8540 | |||
25 | select PPC_INDIRECT_PCI | 31 | select PPC_INDIRECT_PCI |
26 | default y if MPC8540_ADS || MPC85xx_CDS | 32 | default y if MPC8540_ADS || MPC85xx_CDS |
27 | 33 | ||
34 | config MPC8560 | ||
35 | bool | ||
36 | select PPC_INDIRECT_PCI | ||
37 | default y if MPC8560_ADS | ||
38 | |||
28 | config PPC_INDIRECT_PCI_BE | 39 | config PPC_INDIRECT_PCI_BE |
29 | bool | 40 | bool |
30 | depends on PPC_85xx | 41 | depends on PPC_85xx |
@@ -34,4 +45,14 @@ config MPIC | |||
34 | bool | 45 | bool |
35 | default y | 46 | default y |
36 | 47 | ||
48 | config CPM2 | ||
49 | bool | ||
50 | depends on MPC8560 | ||
51 | default y | ||
52 | help | ||
53 | The CPM2 (Communications Processor Module) is a coprocessor on | ||
54 | embedded CPUs made by Motorola. Selecting this option means that | ||
55 | you wish to build a kernel for a machine with a CPM2 coprocessor | ||
56 | on it. | ||
57 | |||
37 | endmenu | 58 | endmenu |
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 7615aa59c78b..282f5d0d0152 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile | |||
@@ -3,4 +3,5 @@ | |||
3 | # | 3 | # |
4 | obj-$(CONFIG_PPC_85xx) += misc.o pci.o | 4 | obj-$(CONFIG_PPC_85xx) += misc.o pci.o |
5 | obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o | 5 | obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o |
6 | obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o | ||
6 | obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o | 7 | obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index cae6b73357d5..28070e7ae507 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c | |||
@@ -32,6 +32,13 @@ | |||
32 | #include <sysdev/fsl_soc.h> | 32 | #include <sysdev/fsl_soc.h> |
33 | #include "mpc85xx.h" | 33 | #include "mpc85xx.h" |
34 | 34 | ||
35 | #ifdef CONFIG_CPM2 | ||
36 | #include <linux/fs_enet_pd.h> | ||
37 | #include <asm/cpm2.h> | ||
38 | #include <sysdev/cpm2_pic.h> | ||
39 | #include <asm/fs_pd.h> | ||
40 | #endif | ||
41 | |||
35 | #ifndef CONFIG_PCI | 42 | #ifndef CONFIG_PCI |
36 | unsigned long isa_io_base = 0; | 43 | unsigned long isa_io_base = 0; |
37 | unsigned long isa_mem_base = 0; | 44 | unsigned long isa_mem_base = 0; |
@@ -57,12 +64,29 @@ mpc85xx_pcibios_fixup(void) | |||
57 | } | 64 | } |
58 | #endif /* CONFIG_PCI */ | 65 | #endif /* CONFIG_PCI */ |
59 | 66 | ||
67 | #ifdef CONFIG_CPM2 | ||
68 | |||
69 | static void cpm2_cascade(unsigned int irq, struct irq_desc *desc, | ||
70 | struct pt_regs *regs) | ||
71 | { | ||
72 | int cascade_irq; | ||
73 | |||
74 | while ((cascade_irq = cpm2_get_irq(regs)) >= 0) { | ||
75 | generic_handle_irq(cascade_irq, regs); | ||
76 | } | ||
77 | desc->chip->eoi(irq); | ||
78 | } | ||
79 | |||
80 | #endif /* CONFIG_CPM2 */ | ||
60 | 81 | ||
61 | void __init mpc85xx_ads_pic_init(void) | 82 | void __init mpc85xx_ads_pic_init(void) |
62 | { | 83 | { |
63 | struct mpic *mpic; | 84 | struct mpic *mpic; |
64 | struct resource r; | 85 | struct resource r; |
65 | struct device_node *np = NULL; | 86 | struct device_node *np = NULL; |
87 | #ifdef CONFIG_CPM2 | ||
88 | int irq; | ||
89 | #endif | ||
66 | 90 | ||
67 | np = of_find_node_by_type(np, "open-pic"); | 91 | np = of_find_node_by_type(np, "open-pic"); |
68 | 92 | ||
@@ -104,11 +128,103 @@ void __init mpc85xx_ads_pic_init(void) | |||
104 | mpic_assign_isu(mpic, 14, r.start + 0x10100); | 128 | mpic_assign_isu(mpic, 14, r.start + 0x10100); |
105 | 129 | ||
106 | mpic_init(mpic); | 130 | mpic_init(mpic); |
131 | |||
132 | #ifdef CONFIG_CPM2 | ||
133 | /* Setup CPM2 PIC */ | ||
134 | np = of_find_node_by_type(NULL, "cpm-pic"); | ||
135 | if (np == NULL) { | ||
136 | printk(KERN_ERR "PIC init: can not find cpm-pic node\n"); | ||
137 | return; | ||
138 | } | ||
139 | irq = irq_of_parse_and_map(np, 0); | ||
140 | |||
141 | cpm2_pic_init(np); | ||
142 | set_irq_chained_handler(irq, cpm2_cascade); | ||
143 | #endif | ||
107 | } | 144 | } |
108 | 145 | ||
109 | /* | 146 | /* |
110 | * Setup the architecture | 147 | * Setup the architecture |
111 | */ | 148 | */ |
149 | #ifdef CONFIG_CPM2 | ||
150 | void init_fcc_ioports(struct fs_platform_info *fpi) | ||
151 | { | ||
152 | struct io_port *io = cpm2_map(im_ioport); | ||
153 | int fcc_no = fs_get_fcc_index(fpi->fs_no); | ||
154 | int target; | ||
155 | u32 tempval; | ||
156 | |||
157 | switch(fcc_no) { | ||
158 | case 1: | ||
159 | tempval = in_be32(&io->iop_pdirb); | ||
160 | tempval &= ~PB2_DIRB0; | ||
161 | tempval |= PB2_DIRB1; | ||
162 | out_be32(&io->iop_pdirb, tempval); | ||
163 | |||
164 | tempval = in_be32(&io->iop_psorb); | ||
165 | tempval &= ~PB2_PSORB0; | ||
166 | tempval |= PB2_PSORB1; | ||
167 | out_be32(&io->iop_psorb, tempval); | ||
168 | |||
169 | tempval = in_be32(&io->iop_pparb); | ||
170 | tempval |= (PB2_DIRB0 | PB2_DIRB1); | ||
171 | out_be32(&io->iop_pparb, tempval); | ||
172 | |||
173 | target = CPM_CLK_FCC2; | ||
174 | break; | ||
175 | case 2: | ||
176 | tempval = in_be32(&io->iop_pdirb); | ||
177 | tempval &= ~PB3_DIRB0; | ||
178 | tempval |= PB3_DIRB1; | ||
179 | out_be32(&io->iop_pdirb, tempval); | ||
180 | |||
181 | tempval = in_be32(&io->iop_psorb); | ||
182 | tempval &= ~PB3_PSORB0; | ||
183 | tempval |= PB3_PSORB1; | ||
184 | out_be32(&io->iop_psorb, tempval); | ||
185 | |||
186 | tempval = in_be32(&io->iop_pparb); | ||
187 | tempval |= (PB3_DIRB0 | PB3_DIRB1); | ||
188 | out_be32(&io->iop_pparb, tempval); | ||
189 | |||
190 | tempval = in_be32(&io->iop_pdirc); | ||
191 | tempval |= PC3_DIRC1; | ||
192 | out_be32(&io->iop_pdirc, tempval); | ||
193 | |||
194 | tempval = in_be32(&io->iop_pparc); | ||
195 | tempval |= PC3_DIRC1; | ||
196 | out_be32(&io->iop_pparc, tempval); | ||
197 | |||
198 | target = CPM_CLK_FCC3; | ||
199 | break; | ||
200 | default: | ||
201 | printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n"); | ||
202 | return; | ||
203 | } | ||
204 | |||
205 | /* Port C has clocks...... */ | ||
206 | tempval = in_be32(&io->iop_psorc); | ||
207 | tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); | ||
208 | out_be32(&io->iop_psorc, tempval); | ||
209 | |||
210 | tempval = in_be32(&io->iop_pdirc); | ||
211 | tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); | ||
212 | out_be32(&io->iop_pdirc, tempval); | ||
213 | tempval = in_be32(&io->iop_pparc); | ||
214 | tempval |= (PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); | ||
215 | out_be32(&io->iop_pparc, tempval); | ||
216 | |||
217 | cpm2_unmap(io); | ||
218 | |||
219 | /* Configure Serial Interface clock routing. | ||
220 | * First, clear FCC bits to zero, | ||
221 | * then set the ones we want. | ||
222 | */ | ||
223 | cpm2_clk_setup(target, fpi->clk_rx, CPM_CLK_RX); | ||
224 | cpm2_clk_setup(target, fpi->clk_tx, CPM_CLK_TX); | ||
225 | } | ||
226 | #endif | ||
227 | |||
112 | static void __init mpc85xx_ads_setup_arch(void) | 228 | static void __init mpc85xx_ads_setup_arch(void) |
113 | { | 229 | { |
114 | struct device_node *cpu; | 230 | struct device_node *cpu; |
@@ -131,6 +247,10 @@ static void __init mpc85xx_ads_setup_arch(void) | |||
131 | of_node_put(cpu); | 247 | of_node_put(cpu); |
132 | } | 248 | } |
133 | 249 | ||
250 | #ifdef CONFIG_CPM2 | ||
251 | cpm2_reset(); | ||
252 | #endif | ||
253 | |||
134 | #ifdef CONFIG_PCI | 254 | #ifdef CONFIG_PCI |
135 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | 255 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) |
136 | add_bridge(np); | 256 | add_bridge(np); |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.h b/arch/powerpc/platforms/85xx/mpc85xx_ads.h new file mode 100644 index 000000000000..effcbf78f851 --- /dev/null +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.h | |||
@@ -0,0 +1,61 @@ | |||
1 | /* | ||
2 | * MPC85xx ADS board definitions | ||
3 | * | ||
4 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> | ||
5 | * | ||
6 | * Copyright 2004 Freescale Semiconductor Inc. | ||
7 | * | ||
8 | * 2006 (c) MontaVista Software, Inc. | ||
9 | * Vitaly Bordug <vbordug@ru.mvista.com> | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify it | ||
12 | * under the terms of the GNU General Public License as published by the | ||
13 | * Free Software Foundation; either version 2 of the License, or (at your | ||
14 | * option) any later version. | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | #ifndef __MACH_MPC85XXADS_H | ||
19 | #define __MACH_MPC85XXADS_H | ||
20 | |||
21 | #include <linux/config.h> | ||
22 | #include <linux/initrd.h> | ||
23 | #include <sysdev/fsl_soc.h> | ||
24 | |||
25 | #define BCSR_ADDR ((uint)0xf8000000) | ||
26 | #define BCSR_SIZE ((uint)(32 * 1024)) | ||
27 | |||
28 | #ifdef CONFIG_CPM2 | ||
29 | |||
30 | #define MPC85xx_CPM_OFFSET (0x80000) | ||
31 | |||
32 | #define CPM_MAP_ADDR (get_immrbase() + MPC85xx_CPM_OFFSET) | ||
33 | #define CPM_IRQ_OFFSET 60 | ||
34 | |||
35 | #define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET) | ||
36 | #define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET) | ||
37 | #define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET) | ||
38 | #define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET) | ||
39 | #define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET) | ||
40 | #define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET) | ||
41 | |||
42 | /* FCC1 Clock Source Configuration. These can be | ||
43 | * redefined in the board specific file. | ||
44 | * Can only choose from CLK9-12 */ | ||
45 | #define F1_RXCLK 12 | ||
46 | #define F1_TXCLK 11 | ||
47 | |||
48 | /* FCC2 Clock Source Configuration. These can be | ||
49 | * redefined in the board specific file. | ||
50 | * Can only choose from CLK13-16 */ | ||
51 | #define F2_RXCLK 13 | ||
52 | #define F2_TXCLK 14 | ||
53 | |||
54 | /* FCC3 Clock Source Configuration. These can be | ||
55 | * redefined in the board specific file. | ||
56 | * Can only choose from CLK13-16 */ | ||
57 | #define F3_RXCLK 15 | ||
58 | #define F3_TXCLK 16 | ||
59 | |||
60 | #endif /* CONFIG_CPM2 */ | ||
61 | #endif /* __MACH_MPC85XXADS_H */ | ||
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index e5e999ea891a..f15f4d78aee9 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
@@ -17,3 +17,8 @@ ifeq ($(CONFIG_PPC_MERGE),y) | |||
17 | obj-$(CONFIG_PPC_I8259) += i8259.o | 17 | obj-$(CONFIG_PPC_I8259) += i8259.o |
18 | obj-$(CONFIG_PPC_83xx) += ipic.o | 18 | obj-$(CONFIG_PPC_83xx) += ipic.o |
19 | endif | 19 | endif |
20 | |||
21 | # Temporary hack until we have migrated to asm-powerpc | ||
22 | ifeq ($(ARCH),powerpc) | ||
23 | obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o | ||
24 | endif | ||
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c new file mode 100644 index 000000000000..ec265995d5d8 --- /dev/null +++ b/arch/powerpc/sysdev/cpm2_common.c | |||
@@ -0,0 +1,309 @@ | |||
1 | /* | ||
2 | * General Purpose functions for the global management of the | ||
3 | * 8260 Communication Processor Module. | ||
4 | * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com> | ||
5 | * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com) | ||
6 | * 2.3.99 Updates | ||
7 | * | ||
8 | * 2006 (c) MontaVista Software, Inc. | ||
9 | * Vitaly Bordug <vbordug@ru.mvista.com> | ||
10 | * Merged to arch/powerpc from arch/ppc/syslib/cpm2_common.c | ||
11 | * | ||
12 | * This file is licensed under the terms of the GNU General Public License | ||
13 | * version 2. This program is licensed "as is" without any warranty of any | ||
14 | * kind, whether express or implied. | ||
15 | */ | ||
16 | |||
17 | /* | ||
18 | * | ||
19 | * In addition to the individual control of the communication | ||
20 | * channels, there are a few functions that globally affect the | ||
21 | * communication processor. | ||
22 | * | ||
23 | * Buffer descriptors must be allocated from the dual ported memory | ||
24 | * space. The allocator for that is here. When the communication | ||
25 | * process is reset, we reclaim the memory available. There is | ||
26 | * currently no deallocator for this memory. | ||
27 | */ | ||
28 | #include <linux/errno.h> | ||
29 | #include <linux/sched.h> | ||
30 | #include <linux/kernel.h> | ||
31 | #include <linux/param.h> | ||
32 | #include <linux/string.h> | ||
33 | #include <linux/mm.h> | ||
34 | #include <linux/interrupt.h> | ||
35 | #include <linux/module.h> | ||
36 | #include <asm/io.h> | ||
37 | #include <asm/irq.h> | ||
38 | #include <asm/mpc8260.h> | ||
39 | #include <asm/page.h> | ||
40 | #include <asm/pgtable.h> | ||
41 | #include <asm/cpm2.h> | ||
42 | #include <asm/rheap.h> | ||
43 | #include <asm/fs_pd.h> | ||
44 | |||
45 | #include <sysdev/fsl_soc.h> | ||
46 | |||
47 | static void cpm2_dpinit(void); | ||
48 | cpm_cpm2_t *cpmp; /* Pointer to comm processor space */ | ||
49 | |||
50 | /* We allocate this here because it is used almost exclusively for | ||
51 | * the communication processor devices. | ||
52 | */ | ||
53 | cpm2_map_t *cpm2_immr; | ||
54 | intctl_cpm2_t *cpm2_intctl; | ||
55 | |||
56 | #define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount | ||
57 | of space for CPM as it is larger | ||
58 | than on PQ2 */ | ||
59 | |||
60 | void | ||
61 | cpm2_reset(void) | ||
62 | { | ||
63 | cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); | ||
64 | cpm2_intctl = cpm2_map(im_intctl); | ||
65 | |||
66 | /* Reclaim the DP memory for our use. | ||
67 | */ | ||
68 | cpm2_dpinit(); | ||
69 | |||
70 | /* Tell everyone where the comm processor resides. | ||
71 | */ | ||
72 | cpmp = &cpm2_immr->im_cpm; | ||
73 | } | ||
74 | |||
75 | /* Set a baud rate generator. This needs lots of work. There are | ||
76 | * eight BRGs, which can be connected to the CPM channels or output | ||
77 | * as clocks. The BRGs are in two different block of internal | ||
78 | * memory mapped space. | ||
79 | * The baud rate clock is the system clock divided by something. | ||
80 | * It was set up long ago during the initial boot phase and is | ||
81 | * is given to us. | ||
82 | * Baud rate clocks are zero-based in the driver code (as that maps | ||
83 | * to port numbers). Documentation uses 1-based numbering. | ||
84 | */ | ||
85 | #define BRG_INT_CLK (get_brgfreq()) | ||
86 | #define BRG_UART_CLK (BRG_INT_CLK/16) | ||
87 | |||
88 | /* This function is used by UARTS, or anything else that uses a 16x | ||
89 | * oversampled clock. | ||
90 | */ | ||
91 | void | ||
92 | cpm_setbrg(uint brg, uint rate) | ||
93 | { | ||
94 | volatile uint *bp; | ||
95 | |||
96 | /* This is good enough to get SMCs running..... | ||
97 | */ | ||
98 | if (brg < 4) { | ||
99 | bp = cpm2_map_size(im_brgc1, 16); | ||
100 | } else { | ||
101 | bp = cpm2_map_size(im_brgc5, 16); | ||
102 | brg -= 4; | ||
103 | } | ||
104 | bp += brg; | ||
105 | *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN; | ||
106 | |||
107 | cpm2_unmap(bp); | ||
108 | } | ||
109 | |||
110 | /* This function is used to set high speed synchronous baud rate | ||
111 | * clocks. | ||
112 | */ | ||
113 | void | ||
114 | cpm2_fastbrg(uint brg, uint rate, int div16) | ||
115 | { | ||
116 | volatile uint *bp; | ||
117 | |||
118 | if (brg < 4) { | ||
119 | bp = cpm2_map_size(im_brgc1, 16); | ||
120 | } | ||
121 | else { | ||
122 | bp = cpm2_map_size(im_brgc5, 16); | ||
123 | brg -= 4; | ||
124 | } | ||
125 | bp += brg; | ||
126 | *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN; | ||
127 | if (div16) | ||
128 | *bp |= CPM_BRG_DIV16; | ||
129 | |||
130 | cpm2_unmap(bp); | ||
131 | } | ||
132 | |||
133 | int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode) | ||
134 | { | ||
135 | int ret = 0; | ||
136 | int shift; | ||
137 | int i, bits = 0; | ||
138 | cpmux_t *im_cpmux; | ||
139 | u32 *reg; | ||
140 | u32 mask = 7; | ||
141 | u8 clk_map [24][3] = { | ||
142 | {CPM_CLK_FCC1, CPM_BRG5, 0}, | ||
143 | {CPM_CLK_FCC1, CPM_BRG6, 1}, | ||
144 | {CPM_CLK_FCC1, CPM_BRG7, 2}, | ||
145 | {CPM_CLK_FCC1, CPM_BRG8, 3}, | ||
146 | {CPM_CLK_FCC1, CPM_CLK9, 4}, | ||
147 | {CPM_CLK_FCC1, CPM_CLK10, 5}, | ||
148 | {CPM_CLK_FCC1, CPM_CLK11, 6}, | ||
149 | {CPM_CLK_FCC1, CPM_CLK12, 7}, | ||
150 | {CPM_CLK_FCC2, CPM_BRG5, 0}, | ||
151 | {CPM_CLK_FCC2, CPM_BRG6, 1}, | ||
152 | {CPM_CLK_FCC2, CPM_BRG7, 2}, | ||
153 | {CPM_CLK_FCC2, CPM_BRG8, 3}, | ||
154 | {CPM_CLK_FCC2, CPM_CLK13, 4}, | ||
155 | {CPM_CLK_FCC2, CPM_CLK14, 5}, | ||
156 | {CPM_CLK_FCC2, CPM_CLK15, 6}, | ||
157 | {CPM_CLK_FCC2, CPM_CLK16, 7}, | ||
158 | {CPM_CLK_FCC3, CPM_BRG5, 0}, | ||
159 | {CPM_CLK_FCC3, CPM_BRG6, 1}, | ||
160 | {CPM_CLK_FCC3, CPM_BRG7, 2}, | ||
161 | {CPM_CLK_FCC3, CPM_BRG8, 3}, | ||
162 | {CPM_CLK_FCC3, CPM_CLK13, 4}, | ||
163 | {CPM_CLK_FCC3, CPM_CLK14, 5}, | ||
164 | {CPM_CLK_FCC3, CPM_CLK15, 6}, | ||
165 | {CPM_CLK_FCC3, CPM_CLK16, 7} | ||
166 | }; | ||
167 | |||
168 | im_cpmux = cpm2_map(im_cpmux); | ||
169 | |||
170 | switch (target) { | ||
171 | case CPM_CLK_SCC1: | ||
172 | reg = &im_cpmux->cmx_scr; | ||
173 | shift = 24; | ||
174 | case CPM_CLK_SCC2: | ||
175 | reg = &im_cpmux->cmx_scr; | ||
176 | shift = 16; | ||
177 | break; | ||
178 | case CPM_CLK_SCC3: | ||
179 | reg = &im_cpmux->cmx_scr; | ||
180 | shift = 8; | ||
181 | break; | ||
182 | case CPM_CLK_SCC4: | ||
183 | reg = &im_cpmux->cmx_scr; | ||
184 | shift = 0; | ||
185 | break; | ||
186 | case CPM_CLK_FCC1: | ||
187 | reg = &im_cpmux->cmx_fcr; | ||
188 | shift = 24; | ||
189 | break; | ||
190 | case CPM_CLK_FCC2: | ||
191 | reg = &im_cpmux->cmx_fcr; | ||
192 | shift = 16; | ||
193 | break; | ||
194 | case CPM_CLK_FCC3: | ||
195 | reg = &im_cpmux->cmx_fcr; | ||
196 | shift = 8; | ||
197 | break; | ||
198 | default: | ||
199 | printk(KERN_ERR "cpm2_clock_setup: invalid clock target\n"); | ||
200 | return -EINVAL; | ||
201 | } | ||
202 | |||
203 | if (mode == CPM_CLK_RX) | ||
204 | shift +=3; | ||
205 | |||
206 | for (i=0; i<24; i++) { | ||
207 | if (clk_map[i][0] == target && clk_map[i][1] == clock) { | ||
208 | bits = clk_map[i][2]; | ||
209 | break; | ||
210 | } | ||
211 | } | ||
212 | if (i == sizeof(clk_map)/3) | ||
213 | ret = -EINVAL; | ||
214 | |||
215 | bits <<= shift; | ||
216 | mask <<= shift; | ||
217 | out_be32(reg, (in_be32(reg) & ~mask) | bits); | ||
218 | |||
219 | cpm2_unmap(im_cpmux); | ||
220 | return ret; | ||
221 | } | ||
222 | |||
223 | /* | ||
224 | * dpalloc / dpfree bits. | ||
225 | */ | ||
226 | static spinlock_t cpm_dpmem_lock; | ||
227 | /* 16 blocks should be enough to satisfy all requests | ||
228 | * until the memory subsystem goes up... */ | ||
229 | static rh_block_t cpm_boot_dpmem_rh_block[16]; | ||
230 | static rh_info_t cpm_dpmem_info; | ||
231 | static u8* im_dprambase; | ||
232 | |||
233 | static void cpm2_dpinit(void) | ||
234 | { | ||
235 | spin_lock_init(&cpm_dpmem_lock); | ||
236 | |||
237 | im_dprambase = ioremap(CPM_MAP_ADDR, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE); | ||
238 | |||
239 | /* initialize the info header */ | ||
240 | rh_init(&cpm_dpmem_info, 1, | ||
241 | sizeof(cpm_boot_dpmem_rh_block) / | ||
242 | sizeof(cpm_boot_dpmem_rh_block[0]), | ||
243 | cpm_boot_dpmem_rh_block); | ||
244 | |||
245 | /* Attach the usable dpmem area */ | ||
246 | /* XXX: This is actually crap. CPM_DATAONLY_BASE and | ||
247 | * CPM_DATAONLY_SIZE is only a subset of the available dpram. It | ||
248 | * varies with the processor and the microcode patches activated. | ||
249 | * But the following should be at least safe. | ||
250 | */ | ||
251 | rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE, | ||
252 | CPM_DATAONLY_SIZE); | ||
253 | } | ||
254 | |||
255 | /* This function returns an index into the DPRAM area. | ||
256 | */ | ||
257 | uint cpm_dpalloc(uint size, uint align) | ||
258 | { | ||
259 | void *start; | ||
260 | unsigned long flags; | ||
261 | |||
262 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | ||
263 | cpm_dpmem_info.alignment = align; | ||
264 | start = rh_alloc(&cpm_dpmem_info, size, "commproc"); | ||
265 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | ||
266 | |||
267 | return (uint)start; | ||
268 | } | ||
269 | EXPORT_SYMBOL(cpm_dpalloc); | ||
270 | |||
271 | int cpm_dpfree(uint offset) | ||
272 | { | ||
273 | int ret; | ||
274 | unsigned long flags; | ||
275 | |||
276 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | ||
277 | ret = rh_free(&cpm_dpmem_info, (void *)offset); | ||
278 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | ||
279 | |||
280 | return ret; | ||
281 | } | ||
282 | EXPORT_SYMBOL(cpm_dpfree); | ||
283 | |||
284 | /* not sure if this is ever needed */ | ||
285 | uint cpm_dpalloc_fixed(uint offset, uint size, uint align) | ||
286 | { | ||
287 | void *start; | ||
288 | unsigned long flags; | ||
289 | |||
290 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | ||
291 | cpm_dpmem_info.alignment = align; | ||
292 | start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc"); | ||
293 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | ||
294 | |||
295 | return (uint)start; | ||
296 | } | ||
297 | EXPORT_SYMBOL(cpm_dpalloc_fixed); | ||
298 | |||
299 | void cpm_dpdump(void) | ||
300 | { | ||
301 | rh_dump(&cpm_dpmem_info); | ||
302 | } | ||
303 | EXPORT_SYMBOL(cpm_dpdump); | ||
304 | |||
305 | void *cpm_dpram_addr(uint offset) | ||
306 | { | ||
307 | return (void *)(im_dprambase + offset); | ||
308 | } | ||
309 | EXPORT_SYMBOL(cpm_dpram_addr); | ||
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c new file mode 100644 index 000000000000..51752990f7b9 --- /dev/null +++ b/arch/powerpc/sysdev/cpm2_pic.c | |||
@@ -0,0 +1,256 @@ | |||
1 | /* | ||
2 | * Platform information definitions. | ||
3 | * | ||
4 | * Copied from arch/ppc/syslib/cpm2_pic.c with minor subsequent updates | ||
5 | * to make in work in arch/powerpc/. Original (c) belongs to Dan Malek. | ||
6 | * | ||
7 | * Author: Vitaly Bordug <vbordug@ru.mvista.com> | ||
8 | * | ||
9 | * 1999-2001 (c) Dan Malek <dan@embeddedalley.com> | ||
10 | * 2006 (c) MontaVista Software, Inc. | ||
11 | * | ||
12 | * This file is licensed under the terms of the GNU General Public License | ||
13 | * version 2. This program is licensed "as is" without any warranty of any | ||
14 | * kind, whether express or implied. | ||
15 | */ | ||
16 | |||
17 | /* The CPM2 internal interrupt controller. It is usually | ||
18 | * the only interrupt controller. | ||
19 | * There are two 32-bit registers (high/low) for up to 64 | ||
20 | * possible interrupts. | ||
21 | * | ||
22 | * Now, the fun starts.....Interrupt Numbers DO NOT MAP | ||
23 | * in a simple arithmetic fashion to mask or pending registers. | ||
24 | * That is, interrupt 4 does not map to bit position 4. | ||
25 | * We create two tables, indexed by vector number, to indicate | ||
26 | * which register to use and which bit in the register to use. | ||
27 | */ | ||
28 | |||
29 | #include <linux/stddef.h> | ||
30 | #include <linux/init.h> | ||
31 | #include <linux/sched.h> | ||
32 | #include <linux/signal.h> | ||
33 | #include <linux/irq.h> | ||
34 | |||
35 | #include <asm/immap_cpm2.h> | ||
36 | #include <asm/mpc8260.h> | ||
37 | #include <asm/io.h> | ||
38 | #include <asm/prom.h> | ||
39 | |||
40 | #include "cpm2_pic.h" | ||
41 | |||
42 | static struct device_node *cpm2_pic_node; | ||
43 | static struct irq_host *cpm2_pic_host; | ||
44 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | ||
45 | static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; | ||
46 | |||
47 | static const u_char irq_to_siureg[] = { | ||
48 | 1, 1, 1, 1, 1, 1, 1, 1, | ||
49 | 1, 1, 1, 1, 1, 1, 1, 1, | ||
50 | 0, 0, 0, 0, 0, 0, 0, 0, | ||
51 | 0, 0, 0, 0, 0, 0, 0, 0, | ||
52 | 1, 1, 1, 1, 1, 1, 1, 1, | ||
53 | 1, 1, 1, 1, 1, 1, 1, 1, | ||
54 | 0, 0, 0, 0, 0, 0, 0, 0, | ||
55 | 0, 0, 0, 0, 0, 0, 0, 0 | ||
56 | }; | ||
57 | |||
58 | /* bit numbers do not match the docs, these are precomputed so the bit for | ||
59 | * a given irq is (1 << irq_to_siubit[irq]) */ | ||
60 | static const u_char irq_to_siubit[] = { | ||
61 | 0, 15, 14, 13, 12, 11, 10, 9, | ||
62 | 8, 7, 6, 5, 4, 3, 2, 1, | ||
63 | 2, 1, 0, 14, 13, 12, 11, 10, | ||
64 | 9, 8, 7, 6, 5, 4, 3, 0, | ||
65 | 31, 30, 29, 28, 27, 26, 25, 24, | ||
66 | 23, 22, 21, 20, 19, 18, 17, 16, | ||
67 | 16, 17, 18, 19, 20, 21, 22, 23, | ||
68 | 24, 25, 26, 27, 28, 29, 30, 31, | ||
69 | }; | ||
70 | |||
71 | static void cpm2_mask_irq(unsigned int irq_nr) | ||
72 | { | ||
73 | int bit, word; | ||
74 | volatile uint *simr; | ||
75 | |||
76 | irq_nr -= CPM_IRQ_OFFSET; | ||
77 | |||
78 | bit = irq_to_siubit[irq_nr]; | ||
79 | word = irq_to_siureg[irq_nr]; | ||
80 | |||
81 | simr = &(cpm2_intctl->ic_simrh); | ||
82 | ppc_cached_irq_mask[word] &= ~(1 << bit); | ||
83 | simr[word] = ppc_cached_irq_mask[word]; | ||
84 | } | ||
85 | |||
86 | static void cpm2_unmask_irq(unsigned int irq_nr) | ||
87 | { | ||
88 | int bit, word; | ||
89 | volatile uint *simr; | ||
90 | |||
91 | irq_nr -= CPM_IRQ_OFFSET; | ||
92 | |||
93 | bit = irq_to_siubit[irq_nr]; | ||
94 | word = irq_to_siureg[irq_nr]; | ||
95 | |||
96 | simr = &(cpm2_intctl->ic_simrh); | ||
97 | ppc_cached_irq_mask[word] |= 1 << bit; | ||
98 | simr[word] = ppc_cached_irq_mask[word]; | ||
99 | } | ||
100 | |||
101 | static void cpm2_mask_and_ack(unsigned int irq_nr) | ||
102 | { | ||
103 | int bit, word; | ||
104 | volatile uint *simr, *sipnr; | ||
105 | |||
106 | irq_nr -= CPM_IRQ_OFFSET; | ||
107 | |||
108 | bit = irq_to_siubit[irq_nr]; | ||
109 | word = irq_to_siureg[irq_nr]; | ||
110 | |||
111 | simr = &(cpm2_intctl->ic_simrh); | ||
112 | sipnr = &(cpm2_intctl->ic_sipnrh); | ||
113 | ppc_cached_irq_mask[word] &= ~(1 << bit); | ||
114 | simr[word] = ppc_cached_irq_mask[word]; | ||
115 | sipnr[word] = 1 << bit; | ||
116 | } | ||
117 | |||
118 | static void cpm2_end_irq(unsigned int irq_nr) | ||
119 | { | ||
120 | int bit, word; | ||
121 | volatile uint *simr; | ||
122 | |||
123 | if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) | ||
124 | && irq_desc[irq_nr].action) { | ||
125 | |||
126 | irq_nr -= CPM_IRQ_OFFSET; | ||
127 | bit = irq_to_siubit[irq_nr]; | ||
128 | word = irq_to_siureg[irq_nr]; | ||
129 | |||
130 | simr = &(cpm2_intctl->ic_simrh); | ||
131 | ppc_cached_irq_mask[word] |= 1 << bit; | ||
132 | simr[word] = ppc_cached_irq_mask[word]; | ||
133 | /* | ||
134 | * Work around large numbers of spurious IRQs on PowerPC 82xx | ||
135 | * systems. | ||
136 | */ | ||
137 | mb(); | ||
138 | } | ||
139 | } | ||
140 | |||
141 | static struct irq_chip cpm2_pic = { | ||
142 | .typename = " CPM2 SIU ", | ||
143 | .enable = cpm2_unmask_irq, | ||
144 | .disable = cpm2_mask_irq, | ||
145 | .unmask = cpm2_unmask_irq, | ||
146 | .mask_ack = cpm2_mask_and_ack, | ||
147 | .end = cpm2_end_irq, | ||
148 | }; | ||
149 | |||
150 | int cpm2_get_irq(struct pt_regs *regs) | ||
151 | { | ||
152 | int irq; | ||
153 | unsigned long bits; | ||
154 | |||
155 | /* For CPM2, read the SIVEC register and shift the bits down | ||
156 | * to get the irq number. */ | ||
157 | bits = cpm2_intctl->ic_sivec; | ||
158 | irq = bits >> 26; | ||
159 | |||
160 | if (irq == 0) | ||
161 | return(-1); | ||
162 | return irq+CPM_IRQ_OFFSET; | ||
163 | } | ||
164 | |||
165 | static int cpm2_pic_host_match(struct irq_host *h, struct device_node *node) | ||
166 | { | ||
167 | return cpm2_pic_node == NULL || cpm2_pic_node == node; | ||
168 | } | ||
169 | |||
170 | static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq, | ||
171 | irq_hw_number_t hw) | ||
172 | { | ||
173 | pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw); | ||
174 | |||
175 | get_irq_desc(virq)->status |= IRQ_LEVEL; | ||
176 | set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq); | ||
177 | return 0; | ||
178 | } | ||
179 | |||
180 | static void cpm2_host_unmap(struct irq_host *h, unsigned int virq) | ||
181 | { | ||
182 | /* Make sure irq is masked in hardware */ | ||
183 | cpm2_mask_irq(virq); | ||
184 | |||
185 | /* remove chip and handler */ | ||
186 | set_irq_chip_and_handler(virq, NULL, NULL); | ||
187 | } | ||
188 | |||
189 | static int cpm2_pic_host_xlate(struct irq_host *h, struct device_node *ct, | ||
190 | u32 *intspec, unsigned int intsize, | ||
191 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | ||
192 | { | ||
193 | static const unsigned char map_cpm2_senses[4] = { | ||
194 | IRQ_TYPE_LEVEL_LOW, | ||
195 | IRQ_TYPE_LEVEL_HIGH, | ||
196 | IRQ_TYPE_EDGE_FALLING, | ||
197 | IRQ_TYPE_EDGE_RISING, | ||
198 | }; | ||
199 | |||
200 | *out_hwirq = intspec[0]; | ||
201 | if (intsize > 1 && intspec[1] < 4) | ||
202 | *out_flags = map_cpm2_senses[intspec[1]]; | ||
203 | else | ||
204 | *out_flags = IRQ_TYPE_NONE; | ||
205 | |||
206 | return 0; | ||
207 | } | ||
208 | |||
209 | static struct irq_host_ops cpm2_pic_host_ops = { | ||
210 | .match = cpm2_pic_host_match, | ||
211 | .map = cpm2_pic_host_map, | ||
212 | .unmap = cpm2_host_unmap, | ||
213 | .xlate = cpm2_pic_host_xlate, | ||
214 | }; | ||
215 | |||
216 | void cpm2_pic_init(struct device_node *node) | ||
217 | { | ||
218 | int i; | ||
219 | |||
220 | /* Clear the CPM IRQ controller, in case it has any bits set | ||
221 | * from the bootloader | ||
222 | */ | ||
223 | |||
224 | /* Mask out everything */ | ||
225 | |||
226 | cpm2_intctl->ic_simrh = 0x00000000; | ||
227 | cpm2_intctl->ic_simrl = 0x00000000; | ||
228 | |||
229 | wmb(); | ||
230 | |||
231 | /* Ack everything */ | ||
232 | cpm2_intctl->ic_sipnrh = 0xffffffff; | ||
233 | cpm2_intctl->ic_sipnrl = 0xffffffff; | ||
234 | wmb(); | ||
235 | |||
236 | /* Dummy read of the vector */ | ||
237 | i = cpm2_intctl->ic_sivec; | ||
238 | rmb(); | ||
239 | |||
240 | /* Initialize the default interrupt mapping priorities, | ||
241 | * in case the boot rom changed something on us. | ||
242 | */ | ||
243 | cpm2_intctl->ic_sicr = 0; | ||
244 | cpm2_intctl->ic_scprrh = 0x05309770; | ||
245 | cpm2_intctl->ic_scprrl = 0x05309770; | ||
246 | |||
247 | /* create a legacy host */ | ||
248 | if (node) | ||
249 | cpm2_pic_node = of_node_get(node); | ||
250 | |||
251 | cpm2_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 64, &cpm2_pic_host_ops, 64); | ||
252 | if (cpm2_pic_host == NULL) { | ||
253 | printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); | ||
254 | return; | ||
255 | } | ||
256 | } | ||
diff --git a/arch/powerpc/sysdev/cpm2_pic.h b/arch/powerpc/sysdev/cpm2_pic.h new file mode 100644 index 000000000000..d63e45d4df58 --- /dev/null +++ b/arch/powerpc/sysdev/cpm2_pic.h | |||
@@ -0,0 +1,10 @@ | |||
1 | #ifndef _PPC_KERNEL_CPM2_H | ||
2 | #define _PPC_KERNEL_CPM2_H | ||
3 | |||
4 | extern intctl_cpm2_t *cpm2_intctl; | ||
5 | |||
6 | extern int cpm2_get_irq(struct pt_regs *regs); | ||
7 | |||
8 | extern void cpm2_pic_init(struct device_node*); | ||
9 | |||
10 | #endif /* _PPC_KERNEL_CPM2_H */ | ||
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 92ba378b7990..022ed275ea68 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -3,6 +3,9 @@ | |||
3 | * | 3 | * |
4 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) | 4 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) |
5 | * | 5 | * |
6 | * 2006 (c) MontaVista Software, Inc. | ||
7 | * Vitaly Bordug <vbordug@ru.mvista.com> | ||
8 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | 9 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of the GNU General Public License as published by the | 10 | * under the terms of the GNU General Public License as published by the |
8 | * Free Software Foundation; either version 2 of the License, or (at your | 11 | * Free Software Foundation; either version 2 of the License, or (at your |
@@ -20,15 +23,20 @@ | |||
20 | #include <linux/device.h> | 23 | #include <linux/device.h> |
21 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
22 | #include <linux/fsl_devices.h> | 25 | #include <linux/fsl_devices.h> |
26 | #include <linux/fs_enet_pd.h> | ||
27 | #include <linux/fs_uart_pd.h> | ||
23 | 28 | ||
24 | #include <asm/system.h> | 29 | #include <asm/system.h> |
25 | #include <asm/atomic.h> | 30 | #include <asm/atomic.h> |
26 | #include <asm/io.h> | 31 | #include <asm/io.h> |
27 | #include <asm/irq.h> | 32 | #include <asm/irq.h> |
33 | #include <asm/time.h> | ||
28 | #include <asm/prom.h> | 34 | #include <asm/prom.h> |
29 | #include <sysdev/fsl_soc.h> | 35 | #include <sysdev/fsl_soc.h> |
30 | #include <mm/mmu_decl.h> | 36 | #include <mm/mmu_decl.h> |
37 | #include <asm/cpm2.h> | ||
31 | 38 | ||
39 | extern void init_fcc_ioports(struct fs_platform_info*); | ||
32 | static phys_addr_t immrbase = -1; | 40 | static phys_addr_t immrbase = -1; |
33 | 41 | ||
34 | phys_addr_t get_immrbase(void) | 42 | phys_addr_t get_immrbase(void) |
@@ -42,7 +50,9 @@ phys_addr_t get_immrbase(void) | |||
42 | if (soc) { | 50 | if (soc) { |
43 | unsigned int size; | 51 | unsigned int size; |
44 | const void *prop = get_property(soc, "reg", &size); | 52 | const void *prop = get_property(soc, "reg", &size); |
45 | immrbase = of_translate_address(soc, prop); | 53 | |
54 | if (prop) | ||
55 | immrbase = of_translate_address(soc, prop); | ||
46 | of_node_put(soc); | 56 | of_node_put(soc); |
47 | }; | 57 | }; |
48 | 58 | ||
@@ -51,6 +61,59 @@ phys_addr_t get_immrbase(void) | |||
51 | 61 | ||
52 | EXPORT_SYMBOL(get_immrbase); | 62 | EXPORT_SYMBOL(get_immrbase); |
53 | 63 | ||
64 | #ifdef CONFIG_CPM2 | ||
65 | |||
66 | static u32 brgfreq = -1; | ||
67 | |||
68 | u32 get_brgfreq(void) | ||
69 | { | ||
70 | struct device_node *node; | ||
71 | |||
72 | if (brgfreq != -1) | ||
73 | return brgfreq; | ||
74 | |||
75 | node = of_find_node_by_type(NULL, "cpm"); | ||
76 | if (node) { | ||
77 | unsigned int size; | ||
78 | const unsigned int *prop = get_property(node, "brg-frequency", | ||
79 | &size); | ||
80 | |||
81 | if (prop) | ||
82 | brgfreq = *prop; | ||
83 | of_node_put(node); | ||
84 | }; | ||
85 | |||
86 | return brgfreq; | ||
87 | } | ||
88 | |||
89 | EXPORT_SYMBOL(get_brgfreq); | ||
90 | |||
91 | static u32 fs_baudrate = -1; | ||
92 | |||
93 | u32 get_baudrate(void) | ||
94 | { | ||
95 | struct device_node *node; | ||
96 | |||
97 | if (fs_baudrate != -1) | ||
98 | return fs_baudrate; | ||
99 | |||
100 | node = of_find_node_by_type(NULL, "serial"); | ||
101 | if (node) { | ||
102 | unsigned int size; | ||
103 | const unsigned int *prop = get_property(node, "current-speed", | ||
104 | &size); | ||
105 | |||
106 | if (prop) | ||
107 | fs_baudrate = *prop; | ||
108 | of_node_put(node); | ||
109 | }; | ||
110 | |||
111 | return fs_baudrate; | ||
112 | } | ||
113 | |||
114 | EXPORT_SYMBOL(get_baudrate); | ||
115 | #endif /* CONFIG_CPM2 */ | ||
116 | |||
54 | static int __init gfar_mdio_of_init(void) | 117 | static int __init gfar_mdio_of_init(void) |
55 | { | 118 | { |
56 | struct device_node *np; | 119 | struct device_node *np; |
@@ -85,8 +148,11 @@ static int __init gfar_mdio_of_init(void) | |||
85 | mdio_data.irq[k] = -1; | 148 | mdio_data.irq[k] = -1; |
86 | 149 | ||
87 | while ((child = of_get_next_child(np, child)) != NULL) { | 150 | while ((child = of_get_next_child(np, child)) != NULL) { |
88 | const u32 *id = get_property(child, "reg", NULL); | 151 | int irq = irq_of_parse_and_map(child, 0); |
89 | mdio_data.irq[*id] = irq_of_parse_and_map(child, 0); | 152 | if (irq != NO_IRQ) { |
153 | const u32 *id = get_property(child, "reg", NULL); | ||
154 | mdio_data.irq[*id] = irq; | ||
155 | } | ||
90 | } | 156 | } |
91 | 157 | ||
92 | ret = | 158 | ret = |
@@ -128,7 +194,7 @@ static int __init gfar_of_init(void) | |||
128 | const char *model; | 194 | const char *model; |
129 | const void *mac_addr; | 195 | const void *mac_addr; |
130 | const phandle *ph; | 196 | const phandle *ph; |
131 | int n_res = 1; | 197 | int n_res = 2; |
132 | 198 | ||
133 | memset(r, 0, sizeof(r)); | 199 | memset(r, 0, sizeof(r)); |
134 | memset(&gfar_data, 0, sizeof(gfar_data)); | 200 | memset(&gfar_data, 0, sizeof(gfar_data)); |
@@ -159,7 +225,7 @@ static int __init gfar_of_init(void) | |||
159 | 225 | ||
160 | gfar_dev = | 226 | gfar_dev = |
161 | platform_device_register_simple("fsl-gianfar", i, &r[0], | 227 | platform_device_register_simple("fsl-gianfar", i, &r[0], |
162 | n_res + 1); | 228 | n_res); |
163 | 229 | ||
164 | if (IS_ERR(gfar_dev)) { | 230 | if (IS_ERR(gfar_dev)) { |
165 | ret = PTR_ERR(gfar_dev); | 231 | ret = PTR_ERR(gfar_dev); |
@@ -478,3 +544,208 @@ err: | |||
478 | } | 544 | } |
479 | 545 | ||
480 | arch_initcall(fsl_usb_of_init); | 546 | arch_initcall(fsl_usb_of_init); |
547 | |||
548 | #ifdef CONFIG_CPM2 | ||
549 | |||
550 | static const char fcc_regs[] = "fcc_regs"; | ||
551 | static const char fcc_regs_c[] = "fcc_regs_c"; | ||
552 | static const char fcc_pram[] = "fcc_pram"; | ||
553 | static char bus_id[9][BUS_ID_SIZE]; | ||
554 | |||
555 | static int __init fs_enet_of_init(void) | ||
556 | { | ||
557 | struct device_node *np; | ||
558 | unsigned int i; | ||
559 | struct platform_device *fs_enet_dev; | ||
560 | struct resource res; | ||
561 | int ret; | ||
562 | |||
563 | for (np = NULL, i = 0; | ||
564 | (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL; | ||
565 | i++) { | ||
566 | struct resource r[4]; | ||
567 | struct device_node *phy, *mdio; | ||
568 | struct fs_platform_info fs_enet_data; | ||
569 | const unsigned int *id, *phy_addr; | ||
570 | const void *mac_addr; | ||
571 | const phandle *ph; | ||
572 | const char *model; | ||
573 | |||
574 | memset(r, 0, sizeof(r)); | ||
575 | memset(&fs_enet_data, 0, sizeof(fs_enet_data)); | ||
576 | |||
577 | ret = of_address_to_resource(np, 0, &r[0]); | ||
578 | if (ret) | ||
579 | goto err; | ||
580 | r[0].name = fcc_regs; | ||
581 | |||
582 | ret = of_address_to_resource(np, 1, &r[1]); | ||
583 | if (ret) | ||
584 | goto err; | ||
585 | r[1].name = fcc_pram; | ||
586 | |||
587 | ret = of_address_to_resource(np, 2, &r[2]); | ||
588 | if (ret) | ||
589 | goto err; | ||
590 | r[2].name = fcc_regs_c; | ||
591 | |||
592 | r[3].start = r[3].end = irq_of_parse_and_map(np, 0); | ||
593 | r[3].flags = IORESOURCE_IRQ; | ||
594 | |||
595 | fs_enet_dev = | ||
596 | platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4); | ||
597 | |||
598 | if (IS_ERR(fs_enet_dev)) { | ||
599 | ret = PTR_ERR(fs_enet_dev); | ||
600 | goto err; | ||
601 | } | ||
602 | |||
603 | model = get_property(np, "model", NULL); | ||
604 | if (model == NULL) { | ||
605 | ret = -ENODEV; | ||
606 | goto unreg; | ||
607 | } | ||
608 | |||
609 | mac_addr = get_property(np, "mac-address", NULL); | ||
610 | memcpy(fs_enet_data.macaddr, mac_addr, 6); | ||
611 | |||
612 | ph = get_property(np, "phy-handle", NULL); | ||
613 | phy = of_find_node_by_phandle(*ph); | ||
614 | |||
615 | if (phy == NULL) { | ||
616 | ret = -ENODEV; | ||
617 | goto unreg; | ||
618 | } | ||
619 | |||
620 | phy_addr = get_property(phy, "reg", NULL); | ||
621 | fs_enet_data.phy_addr = *phy_addr; | ||
622 | |||
623 | id = get_property(np, "device-id", NULL); | ||
624 | fs_enet_data.fs_no = *id; | ||
625 | strcpy(fs_enet_data.fs_type, model); | ||
626 | |||
627 | mdio = of_get_parent(phy); | ||
628 | ret = of_address_to_resource(mdio, 0, &res); | ||
629 | if (ret) { | ||
630 | of_node_put(phy); | ||
631 | of_node_put(mdio); | ||
632 | goto unreg; | ||
633 | } | ||
634 | |||
635 | fs_enet_data.clk_rx = *((u32 *) get_property(np, "rx-clock", NULL)); | ||
636 | fs_enet_data.clk_tx = *((u32 *) get_property(np, "tx-clock", NULL)); | ||
637 | |||
638 | if (strstr(model, "FCC")) { | ||
639 | int fcc_index = *id - 1; | ||
640 | |||
641 | fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0); | ||
642 | fs_enet_data.rx_ring = 32; | ||
643 | fs_enet_data.tx_ring = 32; | ||
644 | fs_enet_data.rx_copybreak = 240; | ||
645 | fs_enet_data.use_napi = 0; | ||
646 | fs_enet_data.napi_weight = 17; | ||
647 | fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index); | ||
648 | fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index); | ||
649 | fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index); | ||
650 | |||
651 | snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x", | ||
652 | (u32)res.start, fs_enet_data.phy_addr); | ||
653 | fs_enet_data.bus_id = (char*)&bus_id[(*id)]; | ||
654 | fs_enet_data.init_ioports = init_fcc_ioports; | ||
655 | } | ||
656 | |||
657 | of_node_put(phy); | ||
658 | of_node_put(mdio); | ||
659 | |||
660 | ret = platform_device_add_data(fs_enet_dev, &fs_enet_data, | ||
661 | sizeof(struct | ||
662 | fs_platform_info)); | ||
663 | if (ret) | ||
664 | goto unreg; | ||
665 | } | ||
666 | return 0; | ||
667 | |||
668 | unreg: | ||
669 | platform_device_unregister(fs_enet_dev); | ||
670 | err: | ||
671 | return ret; | ||
672 | } | ||
673 | |||
674 | arch_initcall(fs_enet_of_init); | ||
675 | |||
676 | static const char scc_regs[] = "regs"; | ||
677 | static const char scc_pram[] = "pram"; | ||
678 | |||
679 | static int __init cpm_uart_of_init(void) | ||
680 | { | ||
681 | struct device_node *np; | ||
682 | unsigned int i; | ||
683 | struct platform_device *cpm_uart_dev; | ||
684 | int ret; | ||
685 | |||
686 | for (np = NULL, i = 0; | ||
687 | (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL; | ||
688 | i++) { | ||
689 | struct resource r[3]; | ||
690 | struct fs_uart_platform_info cpm_uart_data; | ||
691 | const int *id; | ||
692 | const char *model; | ||
693 | |||
694 | memset(r, 0, sizeof(r)); | ||
695 | memset(&cpm_uart_data, 0, sizeof(cpm_uart_data)); | ||
696 | |||
697 | ret = of_address_to_resource(np, 0, &r[0]); | ||
698 | if (ret) | ||
699 | goto err; | ||
700 | |||
701 | r[0].name = scc_regs; | ||
702 | |||
703 | ret = of_address_to_resource(np, 1, &r[1]); | ||
704 | if (ret) | ||
705 | goto err; | ||
706 | r[1].name = scc_pram; | ||
707 | |||
708 | r[2].start = r[2].end = irq_of_parse_and_map(np, 0); | ||
709 | r[2].flags = IORESOURCE_IRQ; | ||
710 | |||
711 | cpm_uart_dev = | ||
712 | platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3); | ||
713 | |||
714 | if (IS_ERR(cpm_uart_dev)) { | ||
715 | ret = PTR_ERR(cpm_uart_dev); | ||
716 | goto err; | ||
717 | } | ||
718 | |||
719 | id = get_property(np, "device-id", NULL); | ||
720 | cpm_uart_data.fs_no = *id; | ||
721 | |||
722 | model = (char*)get_property(np, "model", NULL); | ||
723 | strcpy(cpm_uart_data.fs_type, model); | ||
724 | |||
725 | cpm_uart_data.uart_clk = ppc_proc_freq; | ||
726 | |||
727 | cpm_uart_data.tx_num_fifo = 4; | ||
728 | cpm_uart_data.tx_buf_size = 32; | ||
729 | cpm_uart_data.rx_num_fifo = 4; | ||
730 | cpm_uart_data.rx_buf_size = 32; | ||
731 | cpm_uart_data.clk_rx = *((u32 *) get_property(np, "rx-clock", NULL)); | ||
732 | cpm_uart_data.clk_tx = *((u32 *) get_property(np, "tx-clock", NULL)); | ||
733 | |||
734 | ret = | ||
735 | platform_device_add_data(cpm_uart_dev, &cpm_uart_data, | ||
736 | sizeof(struct | ||
737 | fs_uart_platform_info)); | ||
738 | if (ret) | ||
739 | goto unreg; | ||
740 | } | ||
741 | |||
742 | return 0; | ||
743 | |||
744 | unreg: | ||
745 | platform_device_unregister(cpm_uart_dev); | ||
746 | err: | ||
747 | return ret; | ||
748 | } | ||
749 | |||
750 | arch_initcall(cpm_uart_of_init); | ||
751 | #endif /* CONFIG_CPM2 */ | ||
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h index 5a3dd480d2fd..04e145b5fc32 100644 --- a/arch/powerpc/sysdev/fsl_soc.h +++ b/arch/powerpc/sysdev/fsl_soc.h | |||
@@ -5,6 +5,8 @@ | |||
5 | #include <asm/mmu.h> | 5 | #include <asm/mmu.h> |
6 | 6 | ||
7 | extern phys_addr_t get_immrbase(void); | 7 | extern phys_addr_t get_immrbase(void); |
8 | extern u32 get_brgfreq(void); | ||
9 | extern u32 get_baudrate(void); | ||
8 | 10 | ||
9 | #endif | 11 | #endif |
10 | #endif | 12 | #endif |
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c index 2a35fe2b9b96..d5d36c372c8e 100644 --- a/arch/ppc/platforms/mpc8272ads_setup.c +++ b/arch/ppc/platforms/mpc8272ads_setup.c | |||
@@ -103,7 +103,7 @@ static struct fs_platform_info mpc82xx_enet_pdata[] = { | |||
103 | }, | 103 | }, |
104 | }; | 104 | }; |
105 | 105 | ||
106 | static void init_fcc1_ioports(void) | 106 | static void init_fcc1_ioports(struct fs_platform_info*) |
107 | { | 107 | { |
108 | struct io_port *io; | 108 | struct io_port *io; |
109 | u32 tempval; | 109 | u32 tempval; |
@@ -144,7 +144,7 @@ static void init_fcc1_ioports(void) | |||
144 | iounmap(immap); | 144 | iounmap(immap); |
145 | } | 145 | } |
146 | 146 | ||
147 | static void init_fcc2_ioports(void) | 147 | static void init_fcc2_ioports(struct fs_platform_info*) |
148 | { | 148 | { |
149 | cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t)); | 149 | cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t)); |
150 | u32 *bcsr = ioremap(BCSR_ADDR+12, sizeof(u32)); | 150 | u32 *bcsr = ioremap(BCSR_ADDR+12, sizeof(u32)); |
@@ -229,7 +229,7 @@ static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev, | |||
229 | } | 229 | } |
230 | } | 230 | } |
231 | 231 | ||
232 | static void init_scc1_uart_ioports(void) | 232 | static void init_scc1_uart_ioports(struct fs_uart_platform_info*) |
233 | { | 233 | { |
234 | cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t)); | 234 | cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t)); |
235 | 235 | ||
@@ -246,7 +246,7 @@ static void init_scc1_uart_ioports(void) | |||
246 | iounmap(immap); | 246 | iounmap(immap); |
247 | } | 247 | } |
248 | 248 | ||
249 | static void init_scc4_uart_ioports(void) | 249 | static void init_scc4_uart_ioports(struct fs_uart_platform_info*) |
250 | { | 250 | { |
251 | cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t)); | 251 | cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t)); |
252 | 252 | ||
diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c index e12cece4c9fd..5f130dca3770 100644 --- a/arch/ppc/platforms/mpc866ads_setup.c +++ b/arch/ppc/platforms/mpc866ads_setup.c | |||
@@ -137,7 +137,7 @@ void __init board_init(void) | |||
137 | iounmap(bcsr_io); | 137 | iounmap(bcsr_io); |
138 | } | 138 | } |
139 | 139 | ||
140 | static void setup_fec1_ioports(void) | 140 | static void setup_fec1_ioports(struct fs_platform_info*) |
141 | { | 141 | { |
142 | immap_t *immap = (immap_t *) IMAP_ADDR; | 142 | immap_t *immap = (immap_t *) IMAP_ADDR; |
143 | 143 | ||
@@ -145,7 +145,7 @@ static void setup_fec1_ioports(void) | |||
145 | setbits16(&immap->im_ioport.iop_pddir, 0x1fff); | 145 | setbits16(&immap->im_ioport.iop_pddir, 0x1fff); |
146 | } | 146 | } |
147 | 147 | ||
148 | static void setup_scc1_ioports(void) | 148 | static void setup_scc1_ioports(struct fs_platform_info*) |
149 | { | 149 | { |
150 | immap_t *immap = (immap_t *) IMAP_ADDR; | 150 | immap_t *immap = (immap_t *) IMAP_ADDR; |
151 | unsigned *bcsr_io; | 151 | unsigned *bcsr_io; |
@@ -194,7 +194,7 @@ static void setup_scc1_ioports(void) | |||
194 | 194 | ||
195 | } | 195 | } |
196 | 196 | ||
197 | static void setup_smc1_ioports(void) | 197 | static void setup_smc1_ioports(struct fs_uart_platform_info*) |
198 | { | 198 | { |
199 | immap_t *immap = (immap_t *) IMAP_ADDR; | 199 | immap_t *immap = (immap_t *) IMAP_ADDR; |
200 | unsigned *bcsr_io; | 200 | unsigned *bcsr_io; |
@@ -216,7 +216,7 @@ static void setup_smc1_ioports(void) | |||
216 | 216 | ||
217 | } | 217 | } |
218 | 218 | ||
219 | static void setup_smc2_ioports(void) | 219 | static void setup_smc2_ioports(struct fs_uart_platform_info*) |
220 | { | 220 | { |
221 | immap_t *immap = (immap_t *) IMAP_ADDR; | 221 | immap_t *immap = (immap_t *) IMAP_ADDR; |
222 | unsigned *bcsr_io; | 222 | unsigned *bcsr_io; |
diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c index 5dfa4e6c2af0..bf388ed04d46 100644 --- a/arch/ppc/platforms/mpc885ads_setup.c +++ b/arch/ppc/platforms/mpc885ads_setup.c | |||
@@ -161,7 +161,7 @@ void __init board_init(void) | |||
161 | #endif | 161 | #endif |
162 | } | 162 | } |
163 | 163 | ||
164 | static void setup_fec1_ioports(void) | 164 | static void setup_fec1_ioports(struct fs_platform_info*) |
165 | { | 165 | { |
166 | immap_t *immap = (immap_t *) IMAP_ADDR; | 166 | immap_t *immap = (immap_t *) IMAP_ADDR; |
167 | 167 | ||
@@ -181,7 +181,7 @@ static void setup_fec1_ioports(void) | |||
181 | clrbits32(&immap->im_cpm.cp_cptr, 0x00000100); | 181 | clrbits32(&immap->im_cpm.cp_cptr, 0x00000100); |
182 | } | 182 | } |
183 | 183 | ||
184 | static void setup_fec2_ioports(void) | 184 | static void setup_fec2_ioports(struct fs_platform_info*) |
185 | { | 185 | { |
186 | immap_t *immap = (immap_t *) IMAP_ADDR; | 186 | immap_t *immap = (immap_t *) IMAP_ADDR; |
187 | 187 | ||
@@ -193,7 +193,7 @@ static void setup_fec2_ioports(void) | |||
193 | clrbits32(&immap->im_cpm.cp_cptr, 0x00000080); | 193 | clrbits32(&immap->im_cpm.cp_cptr, 0x00000080); |
194 | } | 194 | } |
195 | 195 | ||
196 | static void setup_scc3_ioports(void) | 196 | static void setup_scc3_ioports(struct fs_platform_info*) |
197 | { | 197 | { |
198 | immap_t *immap = (immap_t *) IMAP_ADDR; | 198 | immap_t *immap = (immap_t *) IMAP_ADDR; |
199 | unsigned *bcsr_io; | 199 | unsigned *bcsr_io; |
@@ -315,7 +315,7 @@ static void __init mpc885ads_fixup_scc_enet_pdata(struct platform_device *pdev, | |||
315 | mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); | 315 | mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); |
316 | } | 316 | } |
317 | 317 | ||
318 | static void setup_smc1_ioports(void) | 318 | static void setup_smc1_ioports(struct fs_uart_platform_info*) |
319 | { | 319 | { |
320 | immap_t *immap = (immap_t *) IMAP_ADDR; | 320 | immap_t *immap = (immap_t *) IMAP_ADDR; |
321 | unsigned *bcsr_io; | 321 | unsigned *bcsr_io; |
@@ -335,7 +335,7 @@ static void setup_smc1_ioports(void) | |||
335 | clrbits16(&immap->im_cpm.cp_pbodr, iobits); | 335 | clrbits16(&immap->im_cpm.cp_pbodr, iobits); |
336 | } | 336 | } |
337 | 337 | ||
338 | static void setup_smc2_ioports(void) | 338 | static void setup_smc2_ioports(struct fs_uart_platform_info*) |
339 | { | 339 | { |
340 | immap_t *immap = (immap_t *) IMAP_ADDR; | 340 | immap_t *immap = (immap_t *) IMAP_ADDR; |
341 | unsigned *bcsr_io; | 341 | unsigned *bcsr_io; |
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c index 34412bc7c4b6..d01870619a4a 100644 --- a/drivers/net/fs_enet/fs_enet-main.c +++ b/drivers/net/fs_enet/fs_enet-main.c | |||
@@ -944,12 +944,13 @@ extern int fs_mii_connect(struct net_device *dev); | |||
944 | extern void fs_mii_disconnect(struct net_device *dev); | 944 | extern void fs_mii_disconnect(struct net_device *dev); |
945 | 945 | ||
946 | static struct net_device *fs_init_instance(struct device *dev, | 946 | static struct net_device *fs_init_instance(struct device *dev, |
947 | const struct fs_platform_info *fpi) | 947 | struct fs_platform_info *fpi) |
948 | { | 948 | { |
949 | struct net_device *ndev = NULL; | 949 | struct net_device *ndev = NULL; |
950 | struct fs_enet_private *fep = NULL; | 950 | struct fs_enet_private *fep = NULL; |
951 | int privsize, i, r, err = 0, registered = 0; | 951 | int privsize, i, r, err = 0, registered = 0; |
952 | 952 | ||
953 | fpi->fs_no = fs_get_id(fpi); | ||
953 | /* guard */ | 954 | /* guard */ |
954 | if ((unsigned int)fpi->fs_no >= FS_MAX_INDEX) | 955 | if ((unsigned int)fpi->fs_no >= FS_MAX_INDEX) |
955 | return ERR_PTR(-EINVAL); | 956 | return ERR_PTR(-EINVAL); |
@@ -971,7 +972,7 @@ static struct net_device *fs_init_instance(struct device *dev, | |||
971 | dev_set_drvdata(dev, ndev); | 972 | dev_set_drvdata(dev, ndev); |
972 | fep->fpi = fpi; | 973 | fep->fpi = fpi; |
973 | if (fpi->init_ioports) | 974 | if (fpi->init_ioports) |
974 | fpi->init_ioports(); | 975 | fpi->init_ioports((struct fs_platform_info *)fpi); |
975 | 976 | ||
976 | #ifdef CONFIG_FS_ENET_HAS_FEC | 977 | #ifdef CONFIG_FS_ENET_HAS_FEC |
977 | if (fs_get_fec_index(fpi->fs_no) >= 0) | 978 | if (fs_get_fec_index(fpi->fs_no) >= 0) |
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c index 90ff96e3339b..a0d6136deb9b 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/serial/cpm_uart/cpm_uart_core.c | |||
@@ -46,6 +46,7 @@ | |||
46 | #include <asm/io.h> | 46 | #include <asm/io.h> |
47 | #include <asm/irq.h> | 47 | #include <asm/irq.h> |
48 | #include <asm/delay.h> | 48 | #include <asm/delay.h> |
49 | #include <asm/fs_pd.h> | ||
49 | 50 | ||
50 | #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | 51 | #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
51 | #define SUPPORT_SYSRQ | 52 | #define SUPPORT_SYSRQ |
@@ -1022,15 +1023,17 @@ int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con) | |||
1022 | { | 1023 | { |
1023 | struct resource *r; | 1024 | struct resource *r; |
1024 | struct fs_uart_platform_info *pdata = pdev->dev.platform_data; | 1025 | struct fs_uart_platform_info *pdata = pdev->dev.platform_data; |
1025 | int idx = pdata->fs_no; /* It is UART_SMCx or UART_SCCx index */ | 1026 | int idx; /* It is UART_SMCx or UART_SCCx index */ |
1026 | struct uart_cpm_port *pinfo; | 1027 | struct uart_cpm_port *pinfo; |
1027 | int line; | 1028 | int line; |
1028 | u32 mem, pram; | 1029 | u32 mem, pram; |
1029 | 1030 | ||
1031 | idx = pdata->fs_no = fs_uart_get_id(pdata); | ||
1032 | |||
1030 | line = cpm_uart_id2nr(idx); | 1033 | line = cpm_uart_id2nr(idx); |
1031 | if(line < 0) { | 1034 | if(line < 0) { |
1032 | printk(KERN_ERR"%s(): port %d is not registered", __FUNCTION__, idx); | 1035 | printk(KERN_ERR"%s(): port %d is not registered", __FUNCTION__, idx); |
1033 | return -1; | 1036 | return -EINVAL; |
1034 | } | 1037 | } |
1035 | 1038 | ||
1036 | pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx]; | 1039 | pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx]; |
@@ -1044,11 +1047,11 @@ int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con) | |||
1044 | 1047 | ||
1045 | if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"))) | 1048 | if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"))) |
1046 | return -EINVAL; | 1049 | return -EINVAL; |
1047 | mem = r->start; | 1050 | mem = (u32)ioremap(r->start, r->end - r->start + 1); |
1048 | 1051 | ||
1049 | if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram"))) | 1052 | if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram"))) |
1050 | return -EINVAL; | 1053 | return -EINVAL; |
1051 | pram = r->start; | 1054 | pram = (u32)ioremap(r->start, r->end - r->start + 1); |
1052 | 1055 | ||
1053 | if(idx > fsid_smc2_uart) { | 1056 | if(idx > fsid_smc2_uart) { |
1054 | pinfo->sccp = (scc_t *)mem; | 1057 | pinfo->sccp = (scc_t *)mem; |
@@ -1179,7 +1182,7 @@ static int __init cpm_uart_console_setup(struct console *co, char *options) | |||
1179 | pdata = pdev->dev.platform_data; | 1182 | pdata = pdev->dev.platform_data; |
1180 | if (pdata) | 1183 | if (pdata) |
1181 | if (pdata->init_ioports) | 1184 | if (pdata->init_ioports) |
1182 | pdata->init_ioports(); | 1185 | pdata->init_ioports(pdata); |
1183 | 1186 | ||
1184 | cpm_uart_drv_get_platform_data(pdev, 1); | 1187 | cpm_uart_drv_get_platform_data(pdev, 1); |
1185 | } | 1188 | } |
@@ -1189,11 +1192,7 @@ static int __init cpm_uart_console_setup(struct console *co, char *options) | |||
1189 | if (options) { | 1192 | if (options) { |
1190 | uart_parse_options(options, &baud, &parity, &bits, &flow); | 1193 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
1191 | } else { | 1194 | } else { |
1192 | bd_t *bd = (bd_t *) __res; | 1195 | if ((baud = uart_baudrate()) == -1) |
1193 | |||
1194 | if (bd->bi_baudrate) | ||
1195 | baud = bd->bi_baudrate; | ||
1196 | else | ||
1197 | baud = 9600; | 1196 | baud = 9600; |
1198 | } | 1197 | } |
1199 | 1198 | ||
@@ -1266,13 +1265,14 @@ static int cpm_uart_drv_probe(struct device *dev) | |||
1266 | } | 1265 | } |
1267 | 1266 | ||
1268 | pdata = pdev->dev.platform_data; | 1267 | pdata = pdev->dev.platform_data; |
1269 | pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n", cpm_uart_id2nr(pdata->fs_no)); | ||
1270 | 1268 | ||
1271 | if ((ret = cpm_uart_drv_get_platform_data(pdev, 0))) | 1269 | if ((ret = cpm_uart_drv_get_platform_data(pdev, 0))) |
1272 | return ret; | 1270 | return ret; |
1273 | 1271 | ||
1272 | pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n", cpm_uart_id2nr(pdata->fs_no)); | ||
1273 | |||
1274 | if (pdata->init_ioports) | 1274 | if (pdata->init_ioports) |
1275 | pdata->init_ioports(); | 1275 | pdata->init_ioports(pdata); |
1276 | 1276 | ||
1277 | ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port); | 1277 | ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port); |
1278 | 1278 | ||
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c index ef3bb476c432..b691d3e14754 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c +++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c | |||
@@ -40,6 +40,7 @@ | |||
40 | 40 | ||
41 | #include <asm/io.h> | 41 | #include <asm/io.h> |
42 | #include <asm/irq.h> | 42 | #include <asm/irq.h> |
43 | #include <asm/fs_pd.h> | ||
43 | 44 | ||
44 | #include <linux/serial_core.h> | 45 | #include <linux/serial_core.h> |
45 | #include <linux/kernel.h> | 46 | #include <linux/kernel.h> |
@@ -50,8 +51,9 @@ | |||
50 | 51 | ||
51 | void cpm_line_cr_cmd(int line, int cmd) | 52 | void cpm_line_cr_cmd(int line, int cmd) |
52 | { | 53 | { |
53 | volatile cpm_cpm2_t *cp = cpmp; | ||
54 | ulong val; | 54 | ulong val; |
55 | volatile cpm_cpm2_t *cp = cpm2_map(im_cpm); | ||
56 | |||
55 | 57 | ||
56 | switch (line) { | 58 | switch (line) { |
57 | case UART_SMC1: | 59 | case UART_SMC1: |
@@ -84,11 +86,14 @@ void cpm_line_cr_cmd(int line, int cmd) | |||
84 | } | 86 | } |
85 | cp->cp_cpcr = val; | 87 | cp->cp_cpcr = val; |
86 | while (cp->cp_cpcr & CPM_CR_FLG) ; | 88 | while (cp->cp_cpcr & CPM_CR_FLG) ; |
89 | |||
90 | cpm2_unmap(cp); | ||
87 | } | 91 | } |
88 | 92 | ||
89 | void smc1_lineif(struct uart_cpm_port *pinfo) | 93 | void smc1_lineif(struct uart_cpm_port *pinfo) |
90 | { | 94 | { |
91 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 95 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
96 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
92 | 97 | ||
93 | /* SMC1 is only on port D */ | 98 | /* SMC1 is only on port D */ |
94 | io->iop_ppard |= 0x00c00000; | 99 | io->iop_ppard |= 0x00c00000; |
@@ -97,13 +102,17 @@ void smc1_lineif(struct uart_cpm_port *pinfo) | |||
97 | io->iop_psord &= ~0x00c00000; | 102 | io->iop_psord &= ~0x00c00000; |
98 | 103 | ||
99 | /* Wire BRG1 to SMC1 */ | 104 | /* Wire BRG1 to SMC1 */ |
100 | cpm2_immr->im_cpmux.cmx_smr &= 0x0f; | 105 | cpmux->cmx_smr &= 0x0f; |
101 | pinfo->brg = 1; | 106 | pinfo->brg = 1; |
107 | |||
108 | cpm2_unmap(cpmux); | ||
109 | cpm2_unmap(io); | ||
102 | } | 110 | } |
103 | 111 | ||
104 | void smc2_lineif(struct uart_cpm_port *pinfo) | 112 | void smc2_lineif(struct uart_cpm_port *pinfo) |
105 | { | 113 | { |
106 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 114 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
115 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
107 | 116 | ||
108 | /* SMC2 is only on port A */ | 117 | /* SMC2 is only on port A */ |
109 | io->iop_ppara |= 0x00c00000; | 118 | io->iop_ppara |= 0x00c00000; |
@@ -112,13 +121,17 @@ void smc2_lineif(struct uart_cpm_port *pinfo) | |||
112 | io->iop_psora &= ~0x00c00000; | 121 | io->iop_psora &= ~0x00c00000; |
113 | 122 | ||
114 | /* Wire BRG2 to SMC2 */ | 123 | /* Wire BRG2 to SMC2 */ |
115 | cpm2_immr->im_cpmux.cmx_smr &= 0xf0; | 124 | cpmux->cmx_smr &= 0xf0; |
116 | pinfo->brg = 2; | 125 | pinfo->brg = 2; |
126 | |||
127 | cpm2_unmap(cpmux); | ||
128 | cpm2_unmap(io); | ||
117 | } | 129 | } |
118 | 130 | ||
119 | void scc1_lineif(struct uart_cpm_port *pinfo) | 131 | void scc1_lineif(struct uart_cpm_port *pinfo) |
120 | { | 132 | { |
121 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 133 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
134 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
122 | 135 | ||
123 | /* Use Port D for SCC1 instead of other functions. */ | 136 | /* Use Port D for SCC1 instead of other functions. */ |
124 | io->iop_ppard |= 0x00000003; | 137 | io->iop_ppard |= 0x00000003; |
@@ -128,9 +141,12 @@ void scc1_lineif(struct uart_cpm_port *pinfo) | |||
128 | io->iop_pdird |= 0x00000002; /* Tx */ | 141 | io->iop_pdird |= 0x00000002; /* Tx */ |
129 | 142 | ||
130 | /* Wire BRG1 to SCC1 */ | 143 | /* Wire BRG1 to SCC1 */ |
131 | cpm2_immr->im_cpmux.cmx_scr &= 0x00ffffff; | 144 | cpmux->cmx_scr &= 0x00ffffff; |
132 | cpm2_immr->im_cpmux.cmx_scr |= 0x00000000; | 145 | cpmux->cmx_scr |= 0x00000000; |
133 | pinfo->brg = 1; | 146 | pinfo->brg = 1; |
147 | |||
148 | cpm2_unmap(cpmux); | ||
149 | cpm2_unmap(io); | ||
134 | } | 150 | } |
135 | 151 | ||
136 | void scc2_lineif(struct uart_cpm_port *pinfo) | 152 | void scc2_lineif(struct uart_cpm_port *pinfo) |
@@ -143,43 +159,57 @@ void scc2_lineif(struct uart_cpm_port *pinfo) | |||
143 | * be supported in a sane fashion. | 159 | * be supported in a sane fashion. |
144 | */ | 160 | */ |
145 | #ifndef CONFIG_STX_GP3 | 161 | #ifndef CONFIG_STX_GP3 |
146 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 162 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
163 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
164 | |||
147 | io->iop_pparb |= 0x008b0000; | 165 | io->iop_pparb |= 0x008b0000; |
148 | io->iop_pdirb |= 0x00880000; | 166 | io->iop_pdirb |= 0x00880000; |
149 | io->iop_psorb |= 0x00880000; | 167 | io->iop_psorb |= 0x00880000; |
150 | io->iop_pdirb &= ~0x00030000; | 168 | io->iop_pdirb &= ~0x00030000; |
151 | io->iop_psorb &= ~0x00030000; | 169 | io->iop_psorb &= ~0x00030000; |
152 | #endif | 170 | #endif |
153 | cpm2_immr->im_cpmux.cmx_scr &= 0xff00ffff; | 171 | cpmux->cmx_scr &= 0xff00ffff; |
154 | cpm2_immr->im_cpmux.cmx_scr |= 0x00090000; | 172 | cpmux->cmx_scr |= 0x00090000; |
155 | pinfo->brg = 2; | 173 | pinfo->brg = 2; |
174 | |||
175 | cpm2_unmap(cpmux); | ||
176 | cpm2_unmap(io); | ||
156 | } | 177 | } |
157 | 178 | ||
158 | void scc3_lineif(struct uart_cpm_port *pinfo) | 179 | void scc3_lineif(struct uart_cpm_port *pinfo) |
159 | { | 180 | { |
160 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 181 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
182 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
183 | |||
161 | io->iop_pparb |= 0x008b0000; | 184 | io->iop_pparb |= 0x008b0000; |
162 | io->iop_pdirb |= 0x00880000; | 185 | io->iop_pdirb |= 0x00880000; |
163 | io->iop_psorb |= 0x00880000; | 186 | io->iop_psorb |= 0x00880000; |
164 | io->iop_pdirb &= ~0x00030000; | 187 | io->iop_pdirb &= ~0x00030000; |
165 | io->iop_psorb &= ~0x00030000; | 188 | io->iop_psorb &= ~0x00030000; |
166 | cpm2_immr->im_cpmux.cmx_scr &= 0xffff00ff; | 189 | cpmux->cmx_scr &= 0xffff00ff; |
167 | cpm2_immr->im_cpmux.cmx_scr |= 0x00001200; | 190 | cpmux->cmx_scr |= 0x00001200; |
168 | pinfo->brg = 3; | 191 | pinfo->brg = 3; |
192 | |||
193 | cpm2_unmap(cpmux); | ||
194 | cpm2_unmap(io); | ||
169 | } | 195 | } |
170 | 196 | ||
171 | void scc4_lineif(struct uart_cpm_port *pinfo) | 197 | void scc4_lineif(struct uart_cpm_port *pinfo) |
172 | { | 198 | { |
173 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 199 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
200 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
174 | 201 | ||
175 | io->iop_ppard |= 0x00000600; | 202 | io->iop_ppard |= 0x00000600; |
176 | io->iop_psord &= ~0x00000600; /* Tx/Rx */ | 203 | io->iop_psord &= ~0x00000600; /* Tx/Rx */ |
177 | io->iop_pdird &= ~0x00000200; /* Rx */ | 204 | io->iop_pdird &= ~0x00000200; /* Rx */ |
178 | io->iop_pdird |= 0x00000400; /* Tx */ | 205 | io->iop_pdird |= 0x00000400; /* Tx */ |
179 | 206 | ||
180 | cpm2_immr->im_cpmux.cmx_scr &= 0xffffff00; | 207 | cpmux->cmx_scr &= 0xffffff00; |
181 | cpm2_immr->im_cpmux.cmx_scr |= 0x0000001b; | 208 | cpmux->cmx_scr |= 0x0000001b; |
182 | pinfo->brg = 4; | 209 | pinfo->brg = 4; |
210 | |||
211 | cpm2_unmap(cpmux); | ||
212 | cpm2_unmap(io); | ||
183 | } | 213 | } |
184 | 214 | ||
185 | /* | 215 | /* |
@@ -254,88 +284,103 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo) | |||
254 | /* Setup any dynamic params in the uart desc */ | 284 | /* Setup any dynamic params in the uart desc */ |
255 | int cpm_uart_init_portdesc(void) | 285 | int cpm_uart_init_portdesc(void) |
256 | { | 286 | { |
287 | #if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2) | ||
288 | u32 addr; | ||
289 | #endif | ||
257 | pr_debug("CPM uart[-]:init portdesc\n"); | 290 | pr_debug("CPM uart[-]:init portdesc\n"); |
258 | 291 | ||
259 | cpm_uart_nr = 0; | 292 | cpm_uart_nr = 0; |
260 | #ifdef CONFIG_SERIAL_CPM_SMC1 | 293 | #ifdef CONFIG_SERIAL_CPM_SMC1 |
261 | cpm_uart_ports[UART_SMC1].smcp = (smc_t *) & cpm2_immr->im_smc[0]; | 294 | cpm_uart_ports[UART_SMC1].smcp = (smc_t *) cpm2_map(im_smc[0]); |
262 | cpm_uart_ports[UART_SMC1].smcup = | ||
263 | (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC1]; | ||
264 | *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1; | ||
265 | cpm_uart_ports[UART_SMC1].port.mapbase = | 295 | cpm_uart_ports[UART_SMC1].port.mapbase = |
266 | (unsigned long)&cpm2_immr->im_smc[0]; | 296 | (unsigned long)cpm_uart_ports[UART_SMC1].smcp; |
297 | |||
298 | cpm_uart_ports[UART_SMC1].smcup = | ||
299 | (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC1], PROFF_SMC_SIZE); | ||
300 | addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC1_BASE], 2); | ||
301 | *addr = PROFF_SMC1; | ||
302 | cpm2_unmap(addr); | ||
303 | |||
267 | cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | 304 | cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); |
268 | cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | 305 | cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); |
269 | cpm_uart_ports[UART_SMC1].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 306 | cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock(); |
270 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1; | 307 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1; |
271 | #endif | 308 | #endif |
272 | 309 | ||
273 | #ifdef CONFIG_SERIAL_CPM_SMC2 | 310 | #ifdef CONFIG_SERIAL_CPM_SMC2 |
274 | cpm_uart_ports[UART_SMC2].smcp = (smc_t *) & cpm2_immr->im_smc[1]; | 311 | cpm_uart_ports[UART_SMC2].smcp = (smc_t *) cpm2_map(im_smc[1]); |
275 | cpm_uart_ports[UART_SMC2].smcup = | ||
276 | (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC2]; | ||
277 | *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC2_BASE]) = PROFF_SMC2; | ||
278 | cpm_uart_ports[UART_SMC2].port.mapbase = | 312 | cpm_uart_ports[UART_SMC2].port.mapbase = |
279 | (unsigned long)&cpm2_immr->im_smc[1]; | 313 | (unsigned long)cpm_uart_ports[UART_SMC2].smcp; |
314 | |||
315 | cpm_uart_ports[UART_SMC2].smcup = | ||
316 | (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC2], PROFF_SMC_SIZE); | ||
317 | addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC2_BASE], 2); | ||
318 | *addr = PROFF_SMC2; | ||
319 | cpm2_unmap(addr); | ||
320 | |||
280 | cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | 321 | cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); |
281 | cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | 322 | cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); |
282 | cpm_uart_ports[UART_SMC2].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 323 | cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock(); |
283 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2; | 324 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2; |
284 | #endif | 325 | #endif |
285 | 326 | ||
286 | #ifdef CONFIG_SERIAL_CPM_SCC1 | 327 | #ifdef CONFIG_SERIAL_CPM_SCC1 |
287 | cpm_uart_ports[UART_SCC1].sccp = (scc_t *) & cpm2_immr->im_scc[0]; | 328 | cpm_uart_ports[UART_SCC1].sccp = (scc_t *) cpm2_map(im_scc[0]); |
288 | cpm_uart_ports[UART_SCC1].sccup = | ||
289 | (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC1]; | ||
290 | cpm_uart_ports[UART_SCC1].port.mapbase = | 329 | cpm_uart_ports[UART_SCC1].port.mapbase = |
291 | (unsigned long)&cpm2_immr->im_scc[0]; | 330 | (unsigned long)cpm_uart_ports[UART_SCC1].sccp; |
331 | cpm_uart_ports[UART_SCC1].sccup = | ||
332 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC1], PROFF_SCC_SIZE); | ||
333 | |||
292 | cpm_uart_ports[UART_SCC1].sccp->scc_sccm &= | 334 | cpm_uart_ports[UART_SCC1].sccp->scc_sccm &= |
293 | ~(UART_SCCM_TX | UART_SCCM_RX); | 335 | ~(UART_SCCM_TX | UART_SCCM_RX); |
294 | cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &= | 336 | cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &= |
295 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 337 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
296 | cpm_uart_ports[UART_SCC1].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 338 | cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock(); |
297 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1; | 339 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1; |
298 | #endif | 340 | #endif |
299 | 341 | ||
300 | #ifdef CONFIG_SERIAL_CPM_SCC2 | 342 | #ifdef CONFIG_SERIAL_CPM_SCC2 |
301 | cpm_uart_ports[UART_SCC2].sccp = (scc_t *) & cpm2_immr->im_scc[1]; | 343 | cpm_uart_ports[UART_SCC2].sccp = (scc_t *) cpm2_map(im_scc[1]); |
302 | cpm_uart_ports[UART_SCC2].sccup = | ||
303 | (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC2]; | ||
304 | cpm_uart_ports[UART_SCC2].port.mapbase = | 344 | cpm_uart_ports[UART_SCC2].port.mapbase = |
305 | (unsigned long)&cpm2_immr->im_scc[1]; | 345 | (unsigned long)cpm_uart_ports[UART_SCC2].sccp; |
346 | cpm_uart_ports[UART_SCC2].sccup = | ||
347 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC2], PROFF_SCC_SIZE); | ||
348 | |||
306 | cpm_uart_ports[UART_SCC2].sccp->scc_sccm &= | 349 | cpm_uart_ports[UART_SCC2].sccp->scc_sccm &= |
307 | ~(UART_SCCM_TX | UART_SCCM_RX); | 350 | ~(UART_SCCM_TX | UART_SCCM_RX); |
308 | cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &= | 351 | cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &= |
309 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 352 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
310 | cpm_uart_ports[UART_SCC2].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 353 | cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock(); |
311 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2; | 354 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2; |
312 | #endif | 355 | #endif |
313 | 356 | ||
314 | #ifdef CONFIG_SERIAL_CPM_SCC3 | 357 | #ifdef CONFIG_SERIAL_CPM_SCC3 |
315 | cpm_uart_ports[UART_SCC3].sccp = (scc_t *) & cpm2_immr->im_scc[2]; | 358 | cpm_uart_ports[UART_SCC3].sccp = (scc_t *) cpm2_map(im_scc[2]); |
316 | cpm_uart_ports[UART_SCC3].sccup = | ||
317 | (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC3]; | ||
318 | cpm_uart_ports[UART_SCC3].port.mapbase = | 359 | cpm_uart_ports[UART_SCC3].port.mapbase = |
319 | (unsigned long)&cpm2_immr->im_scc[2]; | 360 | (unsigned long)cpm_uart_ports[UART_SCC3].sccp; |
361 | cpm_uart_ports[UART_SCC3].sccup = | ||
362 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC3], PROFF_SCC_SIZE); | ||
363 | |||
320 | cpm_uart_ports[UART_SCC3].sccp->scc_sccm &= | 364 | cpm_uart_ports[UART_SCC3].sccp->scc_sccm &= |
321 | ~(UART_SCCM_TX | UART_SCCM_RX); | 365 | ~(UART_SCCM_TX | UART_SCCM_RX); |
322 | cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &= | 366 | cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &= |
323 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 367 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
324 | cpm_uart_ports[UART_SCC3].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 368 | cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock(); |
325 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3; | 369 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3; |
326 | #endif | 370 | #endif |
327 | 371 | ||
328 | #ifdef CONFIG_SERIAL_CPM_SCC4 | 372 | #ifdef CONFIG_SERIAL_CPM_SCC4 |
329 | cpm_uart_ports[UART_SCC4].sccp = (scc_t *) & cpm2_immr->im_scc[3]; | 373 | cpm_uart_ports[UART_SCC4].sccp = (scc_t *) cpm2_map(im_scc[3]); |
330 | cpm_uart_ports[UART_SCC4].sccup = | ||
331 | (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC4]; | ||
332 | cpm_uart_ports[UART_SCC4].port.mapbase = | 374 | cpm_uart_ports[UART_SCC4].port.mapbase = |
333 | (unsigned long)&cpm2_immr->im_scc[3]; | 375 | (unsigned long)cpm_uart_ports[UART_SCC4].sccp; |
376 | cpm_uart_ports[UART_SCC4].sccup = | ||
377 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC4], PROFF_SCC_SIZE); | ||
378 | |||
334 | cpm_uart_ports[UART_SCC4].sccp->scc_sccm &= | 379 | cpm_uart_ports[UART_SCC4].sccp->scc_sccm &= |
335 | ~(UART_SCCM_TX | UART_SCCM_RX); | 380 | ~(UART_SCCM_TX | UART_SCCM_RX); |
336 | cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &= | 381 | cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &= |
337 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 382 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
338 | cpm_uart_ports[UART_SCC4].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 383 | cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock(); |
339 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4; | 384 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4; |
340 | #endif | 385 | #endif |
341 | 386 | ||
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.h b/drivers/serial/cpm_uart/cpm_uart_cpm2.h index 4793fecf8ece..a663300d3476 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm2.h +++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.h | |||
@@ -40,6 +40,6 @@ static inline void cpm_set_smc_fcr(volatile smc_uart_t * up) | |||
40 | up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB; | 40 | up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB; |
41 | } | 41 | } |
42 | 42 | ||
43 | #define DPRAM_BASE ((unsigned char *)&cpm2_immr->im_dprambase[0]) | 43 | #define DPRAM_BASE ((unsigned char *)cpm_dpram_addr(0)) |
44 | 44 | ||
45 | #endif | 45 | #endif |
diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h new file mode 100644 index 000000000000..3d0e819d37f1 --- /dev/null +++ b/include/asm-powerpc/fs_pd.h | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | * Platform information definitions. | ||
3 | * | ||
4 | * 2006 (c) MontaVista Software, Inc. | ||
5 | * Vitaly Bordug <vbordug@ru.mvista.com> | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public License | ||
8 | * version 2. This program is licensed "as is" without any warranty of any | ||
9 | * kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | #ifndef FS_PD_H | ||
13 | #define FS_PD_H | ||
14 | #include <asm/cpm2.h> | ||
15 | #include <sysdev/fsl_soc.h> | ||
16 | #include <asm/time.h> | ||
17 | |||
18 | static inline int uart_baudrate(void) | ||
19 | { | ||
20 | return get_baudrate(); | ||
21 | } | ||
22 | |||
23 | static inline int uart_clock(void) | ||
24 | { | ||
25 | return ppc_proc_freq; | ||
26 | } | ||
27 | |||
28 | #define cpm2_map(member) \ | ||
29 | ({ \ | ||
30 | u32 offset = offsetof(cpm2_map_t, member); \ | ||
31 | void *addr = ioremap (CPM_MAP_ADDR + offset, \ | ||
32 | sizeof( ((cpm2_map_t*)0)->member)); \ | ||
33 | addr; \ | ||
34 | }) | ||
35 | |||
36 | #define cpm2_map_size(member, size) \ | ||
37 | ({ \ | ||
38 | u32 offset = offsetof(cpm2_map_t, member); \ | ||
39 | void *addr = ioremap (CPM_MAP_ADDR + offset, size); \ | ||
40 | addr; \ | ||
41 | }) | ||
42 | |||
43 | #define cpm2_unmap(addr) iounmap(addr) | ||
44 | |||
45 | #endif | ||
diff --git a/include/asm-powerpc/mpc85xx.h b/include/asm-powerpc/mpc85xx.h new file mode 100644 index 000000000000..ccdb8a21138f --- /dev/null +++ b/include/asm-powerpc/mpc85xx.h | |||
@@ -0,0 +1,53 @@ | |||
1 | /* | ||
2 | * include/asm-powerpc/mpc85xx.h | ||
3 | * | ||
4 | * MPC85xx definitions | ||
5 | * | ||
6 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> | ||
7 | * | ||
8 | * Copyright 2004 Freescale Semiconductor, Inc | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #ifdef __KERNEL__ | ||
17 | #ifndef __ASM_MPC85xx_H__ | ||
18 | #define __ASM_MPC85xx_H__ | ||
19 | |||
20 | #include <asm/mmu.h> | ||
21 | |||
22 | #ifdef CONFIG_85xx | ||
23 | |||
24 | #if defined(CONFIG_MPC8540_ADS) || defined(CONFIG_MPC8560_ADS) | ||
25 | #include <platforms/85xx/mpc85xx_ads.h> | ||
26 | #endif | ||
27 | #if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS) | ||
28 | #include <platforms/85xx/mpc8555_cds.h> | ||
29 | #endif | ||
30 | #ifdef CONFIG_MPC85xx_CDS | ||
31 | #include <platforms/85xx/mpc85xx_cds.h> | ||
32 | #endif | ||
33 | |||
34 | #define _IO_BASE isa_io_base | ||
35 | #define _ISA_MEM_BASE isa_mem_base | ||
36 | #ifdef CONFIG_PCI | ||
37 | #define PCI_DRAM_OFFSET pci_dram_offset | ||
38 | #else | ||
39 | #define PCI_DRAM_OFFSET 0 | ||
40 | #endif | ||
41 | |||
42 | /* Let modules/drivers get at CCSRBAR */ | ||
43 | extern phys_addr_t get_ccsrbar(void); | ||
44 | |||
45 | #ifdef MODULE | ||
46 | #define CCSRBAR get_ccsrbar() | ||
47 | #else | ||
48 | #define CCSRBAR BOARD_CCSRBAR | ||
49 | #endif | ||
50 | |||
51 | #endif /* CONFIG_85xx */ | ||
52 | #endif /* __ASM_MPC85xx_H__ */ | ||
53 | #endif /* __KERNEL__ */ | ||
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h index f6a7ff04ffe5..220cc2debe08 100644 --- a/include/asm-ppc/cpm2.h +++ b/include/asm-ppc/cpm2.h | |||
@@ -42,6 +42,8 @@ | |||
42 | #define CPM_CR_IDMA4_SBLOCK (0x17) | 42 | #define CPM_CR_IDMA4_SBLOCK (0x17) |
43 | #define CPM_CR_MCC1_SBLOCK (0x1c) | 43 | #define CPM_CR_MCC1_SBLOCK (0x1c) |
44 | 44 | ||
45 | #define CPM_CR_FCC_SBLOCK(x) (x + 0x10) | ||
46 | |||
45 | #define CPM_CR_SCC1_PAGE (0x00) | 47 | #define CPM_CR_SCC1_PAGE (0x00) |
46 | #define CPM_CR_SCC2_PAGE (0x01) | 48 | #define CPM_CR_SCC2_PAGE (0x01) |
47 | #define CPM_CR_SCC3_PAGE (0x02) | 49 | #define CPM_CR_SCC3_PAGE (0x02) |
@@ -62,6 +64,8 @@ | |||
62 | #define CPM_CR_MCC1_PAGE (0x07) | 64 | #define CPM_CR_MCC1_PAGE (0x07) |
63 | #define CPM_CR_MCC2_PAGE (0x08) | 65 | #define CPM_CR_MCC2_PAGE (0x08) |
64 | 66 | ||
67 | #define CPM_CR_FCC_PAGE(x) (x + 0x04) | ||
68 | |||
65 | /* Some opcodes (there are more...later) | 69 | /* Some opcodes (there are more...later) |
66 | */ | 70 | */ |
67 | #define CPM_CR_INIT_TRX ((ushort)0x0000) | 71 | #define CPM_CR_INIT_TRX ((ushort)0x0000) |
@@ -173,6 +177,10 @@ typedef struct cpm_buf_desc { | |||
173 | #define PROFF_I2C_BASE ((uint)0x8afc) | 177 | #define PROFF_I2C_BASE ((uint)0x8afc) |
174 | #define PROFF_IDMA4_BASE ((uint)0x8afe) | 178 | #define PROFF_IDMA4_BASE ((uint)0x8afe) |
175 | 179 | ||
180 | #define PROFF_SCC_SIZE ((uint)0x100) | ||
181 | #define PROFF_FCC_SIZE ((uint)0x100) | ||
182 | #define PROFF_SMC_SIZE ((uint)64) | ||
183 | |||
176 | /* The SMCs are relocated to any of the first eight DPRAM pages. | 184 | /* The SMCs are relocated to any of the first eight DPRAM pages. |
177 | * We will fix these at the first locations of DPRAM, until we | 185 | * We will fix these at the first locations of DPRAM, until we |
178 | * get some microcode patches :-). | 186 | * get some microcode patches :-). |
@@ -1186,7 +1194,60 @@ typedef struct im_idma { | |||
1186 | #define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128)) | 1194 | #define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128)) |
1187 | #define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0) | 1195 | #define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0) |
1188 | #define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1) | 1196 | #define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1) |
1189 | #define FCC2_MEM_OFFSET FCC_MEM_OFFSET(2) | 1197 | #define FCC3_MEM_OFFSET FCC_MEM_OFFSET(2) |
1198 | |||
1199 | /* Clocks and GRG's */ | ||
1200 | |||
1201 | enum cpm_clk_dir { | ||
1202 | CPM_CLK_RX, | ||
1203 | CPM_CLK_TX, | ||
1204 | CPM_CLK_RTX | ||
1205 | }; | ||
1206 | |||
1207 | enum cpm_clk_target { | ||
1208 | CPM_CLK_SCC1, | ||
1209 | CPM_CLK_SCC2, | ||
1210 | CPM_CLK_SCC3, | ||
1211 | CPM_CLK_SCC4, | ||
1212 | CPM_CLK_FCC1, | ||
1213 | CPM_CLK_FCC2, | ||
1214 | CPM_CLK_FCC3 | ||
1215 | }; | ||
1216 | |||
1217 | enum cpm_clk { | ||
1218 | CPM_CLK_NONE = 0, | ||
1219 | CPM_BRG1, /* Baud Rate Generator 1 */ | ||
1220 | CPM_BRG2, /* Baud Rate Generator 2 */ | ||
1221 | CPM_BRG3, /* Baud Rate Generator 3 */ | ||
1222 | CPM_BRG4, /* Baud Rate Generator 4 */ | ||
1223 | CPM_BRG5, /* Baud Rate Generator 5 */ | ||
1224 | CPM_BRG6, /* Baud Rate Generator 6 */ | ||
1225 | CPM_BRG7, /* Baud Rate Generator 7 */ | ||
1226 | CPM_BRG8, /* Baud Rate Generator 8 */ | ||
1227 | CPM_CLK1, /* Clock 1 */ | ||
1228 | CPM_CLK2, /* Clock 2 */ | ||
1229 | CPM_CLK3, /* Clock 3 */ | ||
1230 | CPM_CLK4, /* Clock 4 */ | ||
1231 | CPM_CLK5, /* Clock 5 */ | ||
1232 | CPM_CLK6, /* Clock 6 */ | ||
1233 | CPM_CLK7, /* Clock 7 */ | ||
1234 | CPM_CLK8, /* Clock 8 */ | ||
1235 | CPM_CLK9, /* Clock 9 */ | ||
1236 | CPM_CLK10, /* Clock 10 */ | ||
1237 | CPM_CLK11, /* Clock 11 */ | ||
1238 | CPM_CLK12, /* Clock 12 */ | ||
1239 | CPM_CLK13, /* Clock 13 */ | ||
1240 | CPM_CLK14, /* Clock 14 */ | ||
1241 | CPM_CLK15, /* Clock 15 */ | ||
1242 | CPM_CLK16, /* Clock 16 */ | ||
1243 | CPM_CLK17, /* Clock 17 */ | ||
1244 | CPM_CLK18, /* Clock 18 */ | ||
1245 | CPM_CLK19, /* Clock 19 */ | ||
1246 | CPM_CLK20, /* Clock 20 */ | ||
1247 | CPM_CLK_DUMMY | ||
1248 | }; | ||
1249 | |||
1250 | extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode); | ||
1190 | 1251 | ||
1191 | #endif /* __CPM2__ */ | 1252 | #endif /* __CPM2__ */ |
1192 | #endif /* __KERNEL__ */ | 1253 | #endif /* __KERNEL__ */ |
diff --git a/include/asm-ppc/fs_pd.h b/include/asm-ppc/fs_pd.h new file mode 100644 index 000000000000..8691327653af --- /dev/null +++ b/include/asm-ppc/fs_pd.h | |||
@@ -0,0 +1,36 @@ | |||
1 | /* | ||
2 | * Platform information definitions. | ||
3 | * | ||
4 | * 2006 (c) MontaVista Software, Inc. | ||
5 | * Vitaly Bordug <vbordug@ru.mvista.com> | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public License | ||
8 | * version 2. This program is licensed "as is" without any warranty of any | ||
9 | * kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | #ifndef FS_PD_H | ||
13 | #define FS_PD_H | ||
14 | |||
15 | static inline int uart_baudrate(void) | ||
16 | { | ||
17 | int baud; | ||
18 | bd_t *bd = (bd_t *) __res; | ||
19 | |||
20 | if (bd->bi_baudrate) | ||
21 | baud = bd->bi_baudrate; | ||
22 | else | ||
23 | baud = -1; | ||
24 | return baud; | ||
25 | } | ||
26 | |||
27 | static inline int uart_clock(void) | ||
28 | { | ||
29 | return (((bd_t *) __res)->bi_intfreq); | ||
30 | } | ||
31 | |||
32 | #define cpm2_map(member) (&cpm2_immr->member) | ||
33 | #define cpm2_map_size(member, size) (&cpm2_immr->member) | ||
34 | #define cpm2_unmap(addr) do {} while(0) | ||
35 | |||
36 | #endif | ||
diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h index 74ed35a00a94..543cd3cd9e77 100644 --- a/include/linux/fs_enet_pd.h +++ b/include/linux/fs_enet_pd.h | |||
@@ -55,6 +55,30 @@ static inline int fs_get_scc_index(enum fs_id id) | |||
55 | return -1; | 55 | return -1; |
56 | } | 56 | } |
57 | 57 | ||
58 | static inline int fs_fec_index2id(int index) | ||
59 | { | ||
60 | int id = fsid_fec1 + index - 1; | ||
61 | if (id >= fsid_fec1 && id <= fsid_fec2) | ||
62 | return id; | ||
63 | return FS_MAX_INDEX; | ||
64 | } | ||
65 | |||
66 | static inline int fs_fcc_index2id(int index) | ||
67 | { | ||
68 | int id = fsid_fcc1 + index - 1; | ||
69 | if (id >= fsid_fcc1 && id <= fsid_fcc3) | ||
70 | return id; | ||
71 | return FS_MAX_INDEX; | ||
72 | } | ||
73 | |||
74 | static inline int fs_scc_index2id(int index) | ||
75 | { | ||
76 | int id = fsid_scc1 + index - 1; | ||
77 | if (id >= fsid_scc1 && id <= fsid_scc4) | ||
78 | return id; | ||
79 | return FS_MAX_INDEX; | ||
80 | } | ||
81 | |||
58 | enum fs_mii_method { | 82 | enum fs_mii_method { |
59 | fsmii_fixed, | 83 | fsmii_fixed, |
60 | fsmii_fec, | 84 | fsmii_fec, |
@@ -87,18 +111,21 @@ struct fs_mii_bb_platform_info { | |||
87 | }; | 111 | }; |
88 | 112 | ||
89 | struct fs_platform_info { | 113 | struct fs_platform_info { |
90 | 114 | ||
91 | void(*init_ioports)(void); | 115 | void(*init_ioports)(struct fs_platform_info *); |
92 | /* device specific information */ | 116 | /* device specific information */ |
93 | int fs_no; /* controller index */ | 117 | int fs_no; /* controller index */ |
118 | char fs_type[4]; /* controller type */ | ||
94 | 119 | ||
95 | u32 cp_page; /* CPM page */ | 120 | u32 cp_page; /* CPM page */ |
96 | u32 cp_block; /* CPM sblock */ | 121 | u32 cp_block; /* CPM sblock */ |
97 | 122 | ||
98 | u32 clk_trx; /* some stuff for pins & mux configuration*/ | 123 | u32 clk_trx; /* some stuff for pins & mux configuration*/ |
124 | u32 clk_rx; | ||
125 | u32 clk_tx; | ||
99 | u32 clk_route; | 126 | u32 clk_route; |
100 | u32 clk_mask; | 127 | u32 clk_mask; |
101 | 128 | ||
102 | u32 mem_offset; | 129 | u32 mem_offset; |
103 | u32 dpram_offset; | 130 | u32 dpram_offset; |
104 | u32 fcc_regs_c; | 131 | u32 fcc_regs_c; |
@@ -124,4 +151,16 @@ struct fs_mii_fec_platform_info { | |||
124 | u32 irq[32]; | 151 | u32 irq[32]; |
125 | u32 mii_speed; | 152 | u32 mii_speed; |
126 | }; | 153 | }; |
154 | |||
155 | static inline int fs_get_id(struct fs_platform_info *fpi) | ||
156 | { | ||
157 | if(strstr(fpi->fs_type, "SCC")) | ||
158 | return fs_scc_index2id(fpi->fs_no); | ||
159 | if(strstr(fpi->fs_type, "FCC")) | ||
160 | return fs_fcc_index2id(fpi->fs_no); | ||
161 | if(strstr(fpi->fs_type, "FEC")) | ||
162 | return fs_fec_index2id(fpi->fs_no); | ||
163 | return fpi->fs_no; | ||
164 | } | ||
165 | |||
127 | #endif | 166 | #endif |
diff --git a/include/linux/fs_uart_pd.h b/include/linux/fs_uart_pd.h index f5975126b712..809bb9ffc788 100644 --- a/include/linux/fs_uart_pd.h +++ b/include/linux/fs_uart_pd.h | |||
@@ -46,15 +46,27 @@ static inline int fs_uart_id_fsid2smc(int id) | |||
46 | } | 46 | } |
47 | 47 | ||
48 | struct fs_uart_platform_info { | 48 | struct fs_uart_platform_info { |
49 | void(*init_ioports)(void); | 49 | void(*init_ioports)(struct fs_uart_platform_info *); |
50 | /* device specific information */ | 50 | /* device specific information */ |
51 | int fs_no; /* controller index */ | 51 | int fs_no; /* controller index */ |
52 | char fs_type[4]; /* controller type */ | ||
52 | u32 uart_clk; | 53 | u32 uart_clk; |
53 | u8 tx_num_fifo; | 54 | u8 tx_num_fifo; |
54 | u8 tx_buf_size; | 55 | u8 tx_buf_size; |
55 | u8 rx_num_fifo; | 56 | u8 rx_num_fifo; |
56 | u8 rx_buf_size; | 57 | u8 rx_buf_size; |
57 | u8 brg; | 58 | u8 brg; |
59 | u8 clk_rx; | ||
60 | u8 clk_tx; | ||
58 | }; | 61 | }; |
59 | 62 | ||
63 | static inline int fs_uart_get_id(struct fs_uart_platform_info *fpi) | ||
64 | { | ||
65 | if(strstr(fpi->fs_type, "SMC")) | ||
66 | return fs_uart_id_smc2fsid(fpi->fs_no); | ||
67 | if(strstr(fpi->fs_type, "SCC")) | ||
68 | return fs_uart_id_scc2fsid(fpi->fs_no); | ||
69 | return fpi->fs_no; | ||
70 | } | ||
71 | |||
60 | #endif | 72 | #endif |