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authorDurgadoss R <durgadoss.r@intel.com>2011-05-19 15:59:35 -0400
committerGuenter Roeck <guenter.roeck@ericsson.com>2011-05-20 10:04:49 -0400
commit199e0de7f5df31a4fc485d4aaaf8a07718252ace (patch)
treed06b8b4d5758dc2e2a4caa45f7045bea34969987
parent83f7649c52871d4b0799c209c364374b682fa4a8 (diff)
hwmon: (coretemp) Merge pkgtemp with coretemp
This patch merges the pkgtemp with coretemp driver. The sysfs interfaces for all cores in the same pkg are shown under one directory, in hwmon. It also supports CONFIG_HOTPLUG_CPU. So, the sysfs interfaces are created when each core comes online and are removed when it goes offline. Signed-off-by: Durgadoss R <durgadoss.r@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> [guenter.roeck@ericsson.com: Fixed section reference errors] Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
-rw-r--r--Documentation/hwmon/coretemp21
-rw-r--r--drivers/hwmon/coretemp.c665
2 files changed, 469 insertions, 217 deletions
diff --git a/Documentation/hwmon/coretemp b/Documentation/hwmon/coretemp
index 25568f844804..f85e913a3401 100644
--- a/Documentation/hwmon/coretemp
+++ b/Documentation/hwmon/coretemp
@@ -15,8 +15,13 @@ Author: Rudolf Marek
15 15
16Description 16Description
17----------- 17-----------
18This driver permits reading the DTS (Digital Temperature Sensor) embedded
19inside Intel CPUs. This driver can read both the per-core and per-package
20temperature using the appropriate sensors. The per-package sensor is new;
21as of now, it is present only in the SandyBridge platform. The driver will
22show the temperature of all cores inside a package under a single device
23directory inside hwmon.
18 24
19This driver permits reading temperature sensor embedded inside Intel Core CPU.
20Temperature is measured in degrees Celsius and measurement resolution is 25Temperature is measured in degrees Celsius and measurement resolution is
211 degree C. Valid temperatures are from 0 to TjMax degrees C, because 261 degree C. Valid temperatures are from 0 to TjMax degrees C, because
22the actual value of temperature register is in fact a delta from TjMax. 27the actual value of temperature register is in fact a delta from TjMax.
@@ -27,13 +32,15 @@ mechanism will perform actions to forcibly cool down the processor. Alarm
27may be raised, if the temperature grows enough (more than TjMax) to trigger 32may be raised, if the temperature grows enough (more than TjMax) to trigger
28the Out-Of-Spec bit. Following table summarizes the exported sysfs files: 33the Out-Of-Spec bit. Following table summarizes the exported sysfs files:
29 34
30temp1_input - Core temperature (in millidegrees Celsius). 35All Sysfs entries are named with their core_id (represented here by 'X').
31temp1_max - All cooling devices should be turned on (on Core2). 36tempX_input - Core temperature (in millidegrees Celsius).
32temp1_crit - Maximum junction temperature (in millidegrees Celsius). 37tempX_max - All cooling devices should be turned on (on Core2).
33temp1_crit_alarm - Set when Out-of-spec bit is set, never clears. 38tempX_crit - Maximum junction temperature (in millidegrees Celsius).
39tempX_crit_alarm - Set when Out-of-spec bit is set, never clears.
34 Correct CPU operation is no longer guaranteed. 40 Correct CPU operation is no longer guaranteed.
35temp1_label - Contains string "Core X", where X is processor 41tempX_label - Contains string "Core X", where X is processor
36 number. 42 number. For Package temp, this will be "Physical id Y",
43 where Y is the package number.
37 44
38The TjMax temperature is set to 85 degrees C if undocumented model specific 45The TjMax temperature is set to 85 degrees C if undocumented model specific
39register (UMSR) 0xee has bit 30 set. If not the TjMax is 100 degrees C as 46register (UMSR) 0xee has bit 30 set. If not the TjMax is 100 degrees C as
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 194ca0aa8b0c..ece3b7da6538 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -41,122 +41,146 @@
41 41
42#define DRVNAME "coretemp" 42#define DRVNAME "coretemp"
43 43
44typedef enum { SHOW_TEMP, SHOW_TJMAX, SHOW_TTARGET, SHOW_LABEL, 44#define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
45 SHOW_NAME } SHOW; 45#define NUM_REAL_CORES 16 /* Number of Real cores per cpu */
46#define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
47#define MAX_ATTRS 5 /* Maximum no of per-core attrs */
48#define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
49
50#ifdef CONFIG_SMP
51#define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id
52#define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id
53#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
54#else
55#define TO_PHYS_ID(cpu) (cpu)
56#define TO_CORE_ID(cpu) (cpu)
57#define TO_ATTR_NO(cpu) (cpu)
58#endif
46 59
47/* 60/*
48 * Functions declaration 61 * Per-Core Temperature Data
62 * @last_updated: The time when the current temperature value was updated
63 * earlier (in jiffies).
64 * @cpu_core_id: The CPU Core from which temperature values should be read
65 * This value is passed as "id" field to rdmsr/wrmsr functions.
66 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
67 * from where the temperature values should be read.
68 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
69 * Otherwise, temp_data holds coretemp data.
70 * @valid: If this is 1, the current temperature is valid.
49 */ 71 */
50 72struct temp_data {
51static struct coretemp_data *coretemp_update_device(struct device *dev);
52
53struct coretemp_data {
54 struct device *hwmon_dev;
55 struct mutex update_lock;
56 const char *name;
57 u32 id;
58 u16 core_id;
59 char valid; /* zero until following fields are valid */
60 unsigned long last_updated; /* in jiffies */
61 int temp; 73 int temp;
62 int tjmax;
63 int ttarget; 74 int ttarget;
64 u8 alarm; 75 int tjmax;
76 unsigned long last_updated;
77 unsigned int cpu;
78 u32 cpu_core_id;
79 u32 status_reg;
80 bool is_pkg_data;
81 bool valid;
82 struct sensor_device_attribute sd_attrs[MAX_ATTRS];
83 char attr_name[MAX_ATTRS][CORETEMP_NAME_LENGTH];
84 struct mutex update_lock;
65}; 85};
66 86
67/* 87/* Platform Data per Physical CPU */
68 * Sysfs stuff 88struct platform_data {
69 */ 89 struct device *hwmon_dev;
90 u16 phys_proc_id;
91 struct temp_data *core_data[MAX_CORE_DATA];
92 struct device_attribute name_attr;
93};
70 94
71static ssize_t show_name(struct device *dev, struct device_attribute 95struct pdev_entry {
72 *devattr, char *buf) 96 struct list_head list;
97 struct platform_device *pdev;
98 unsigned int cpu;
99 u16 phys_proc_id;
100 u16 cpu_core_id;
101};
102
103static LIST_HEAD(pdev_list);
104static DEFINE_MUTEX(pdev_list_mutex);
105
106static ssize_t show_name(struct device *dev,
107 struct device_attribute *devattr, char *buf)
108{
109 return sprintf(buf, "%s\n", DRVNAME);
110}
111
112static ssize_t show_label(struct device *dev,
113 struct device_attribute *devattr, char *buf)
73{ 114{
74 int ret;
75 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 115 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
76 struct coretemp_data *data = dev_get_drvdata(dev); 116 struct platform_data *pdata = dev_get_drvdata(dev);
117 struct temp_data *tdata = pdata->core_data[attr->index];
118
119 if (tdata->is_pkg_data)
120 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
77 121
78 if (attr->index == SHOW_NAME) 122 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
79 ret = sprintf(buf, "%s\n", data->name);
80 else /* show label */
81 ret = sprintf(buf, "Core %d\n", data->core_id);
82 return ret;
83} 123}
84 124
85static ssize_t show_alarm(struct device *dev, struct device_attribute 125static ssize_t show_crit_alarm(struct device *dev,
86 *devattr, char *buf) 126 struct device_attribute *devattr, char *buf)
87{ 127{
88 struct coretemp_data *data = coretemp_update_device(dev); 128 u32 eax, edx;
89 /* read the Out-of-spec log, never clear */ 129 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
90 return sprintf(buf, "%d\n", data->alarm); 130 struct platform_data *pdata = dev_get_drvdata(dev);
131 struct temp_data *tdata = pdata->core_data[attr->index];
132
133 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
134
135 return sprintf(buf, "%d\n", (eax >> 5) & 1);
91} 136}
92 137
93static ssize_t show_temp(struct device *dev, 138static ssize_t show_tjmax(struct device *dev,
94 struct device_attribute *devattr, char *buf) 139 struct device_attribute *devattr, char *buf)
95{ 140{
96 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 141 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
97 struct coretemp_data *data = coretemp_update_device(dev); 142 struct platform_data *pdata = dev_get_drvdata(dev);
98 int err;
99 143
100 if (attr->index == SHOW_TEMP) 144 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
101 err = data->valid ? sprintf(buf, "%d\n", data->temp) : -EAGAIN;
102 else if (attr->index == SHOW_TJMAX)
103 err = sprintf(buf, "%d\n", data->tjmax);
104 else
105 err = sprintf(buf, "%d\n", data->ttarget);
106 return err;
107} 145}
108 146
109static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 147static ssize_t show_ttarget(struct device *dev,
110 SHOW_TEMP); 148 struct device_attribute *devattr, char *buf)
111static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp, NULL, 149{
112 SHOW_TJMAX); 150 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
113static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp, NULL, 151 struct platform_data *pdata = dev_get_drvdata(dev);
114 SHOW_TTARGET);
115static DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL);
116static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_name, NULL, SHOW_LABEL);
117static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, SHOW_NAME);
118
119static struct attribute *coretemp_attributes[] = {
120 &sensor_dev_attr_name.dev_attr.attr,
121 &sensor_dev_attr_temp1_label.dev_attr.attr,
122 &dev_attr_temp1_crit_alarm.attr,
123 &sensor_dev_attr_temp1_input.dev_attr.attr,
124 &sensor_dev_attr_temp1_crit.dev_attr.attr,
125 NULL
126};
127 152
128static const struct attribute_group coretemp_group = { 153 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
129 .attrs = coretemp_attributes, 154}
130};
131 155
132static struct coretemp_data *coretemp_update_device(struct device *dev) 156static ssize_t show_temp(struct device *dev,
157 struct device_attribute *devattr, char *buf)
133{ 158{
134 struct coretemp_data *data = dev_get_drvdata(dev); 159 u32 eax, edx;
135 160 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
136 mutex_lock(&data->update_lock); 161 struct platform_data *pdata = dev_get_drvdata(dev);
162 struct temp_data *tdata = pdata->core_data[attr->index];
137 163
138 if (!data->valid || time_after(jiffies, data->last_updated + HZ)) { 164 mutex_lock(&tdata->update_lock);
139 u32 eax, edx;
140 165
141 data->valid = 0; 166 /* Check whether the time interval has elapsed */
142 rdmsr_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx); 167 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
143 data->alarm = (eax >> 5) & 1; 168 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
144 /* update only if data has been valid */ 169 tdata->valid = 0;
170 /* Check whether the data is valid */
145 if (eax & 0x80000000) { 171 if (eax & 0x80000000) {
146 data->temp = data->tjmax - (((eax >> 16) 172 tdata->temp = tdata->tjmax -
147 & 0x7f) * 1000); 173 (((eax >> 16) & 0x7f) * 1000);
148 data->valid = 1; 174 tdata->valid = 1;
149 } else {
150 dev_dbg(dev, "Temperature data invalid (0x%x)\n", eax);
151 } 175 }
152 data->last_updated = jiffies; 176 tdata->last_updated = jiffies;
153 } 177 }
154 178
155 mutex_unlock(&data->update_lock); 179 mutex_unlock(&tdata->update_lock);
156 return data; 180 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
157} 181}
158 182
159static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) 183static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
160{ 184{
161 /* The 100C is default for both mobile and non mobile CPUs */ 185 /* The 100C is default for both mobile and non mobile CPUs */
162 186
@@ -244,8 +268,7 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
244 return tjmax; 268 return tjmax;
245} 269}
246 270
247static int __devinit get_tjmax(struct cpuinfo_x86 *c, u32 id, 271static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
248 struct device *dev)
249{ 272{
250 /* The 100C is default for both mobile and non mobile CPUs */ 273 /* The 100C is default for both mobile and non mobile CPUs */
251 int err; 274 int err;
@@ -300,115 +323,293 @@ static void __devinit get_ucode_rev_on_cpu(void *edx)
300 rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx); 323 rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx);
301} 324}
302 325
303static int __devinit coretemp_probe(struct platform_device *pdev) 326static int get_pkg_tjmax(unsigned int cpu, struct device *dev)
304{ 327{
305 struct coretemp_data *data;
306 struct cpuinfo_x86 *c = &cpu_data(pdev->id);
307 int err; 328 int err;
308 u32 eax, edx; 329 u32 eax, edx, val;
309 330
310 if (!(data = kzalloc(sizeof(struct coretemp_data), GFP_KERNEL))) { 331 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
311 err = -ENOMEM; 332 if (!err) {
312 dev_err(&pdev->dev, "Out of memory\n"); 333 val = (eax >> 16) & 0xff;
313 goto exit; 334 if ((val > 80) && (val < 120))
335 return val * 1000;
314 } 336 }
337 dev_warn(dev, "Unable to read Pkg-TjMax from CPU:%u\n", cpu);
338 return 100000; /* Default TjMax: 100 degree celsius */
339}
315 340
316 data->id = pdev->id; 341static int create_name_attr(struct platform_data *pdata, struct device *dev)
317#ifdef CONFIG_SMP 342{
318 data->core_id = c->cpu_core_id; 343 pdata->name_attr.attr.name = "name";
319#endif 344 pdata->name_attr.attr.mode = S_IRUGO;
320 data->name = "coretemp"; 345 pdata->name_attr.show = show_name;
321 mutex_init(&data->update_lock); 346 return device_create_file(dev, &pdata->name_attr);
347}
322 348
323 /* test if we can access the THERM_STATUS MSR */ 349static int create_core_attrs(struct temp_data *tdata, struct device *dev,
324 err = rdmsr_safe_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx); 350 int attr_no)
325 if (err) { 351{
326 dev_err(&pdev->dev, 352 int err, i;
327 "Unable to access THERM_STATUS MSR, giving up\n"); 353 static ssize_t (*rd_ptr[MAX_ATTRS]) (struct device *dev,
328 goto exit_free; 354 struct device_attribute *devattr, char *buf) = {
355 show_label, show_crit_alarm, show_ttarget,
356 show_temp, show_tjmax };
357 static const char *names[MAX_ATTRS] = {
358 "temp%d_label", "temp%d_crit_alarm",
359 "temp%d_max", "temp%d_input",
360 "temp%d_crit" };
361
362 for (i = 0; i < MAX_ATTRS; i++) {
363 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
364 attr_no);
365 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
366 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
367 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
368 tdata->sd_attrs[i].dev_attr.store = NULL;
369 tdata->sd_attrs[i].index = attr_no;
370 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
371 if (err)
372 goto exit_free;
329 } 373 }
374 return 0;
375
376exit_free:
377 while (--i >= 0)
378 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
379 return err;
380}
381
382static void update_ttarget(__u8 cpu_model, struct temp_data *tdata,
383 struct device *dev)
384{
385 int err;
386 u32 eax, edx;
387
388 /*
389 * Initialize ttarget value. Eventually this will be
390 * initialized with the value from MSR_IA32_THERM_INTERRUPT
391 * register. If IA32_TEMPERATURE_TARGET is supported, this
392 * value will be over written below.
393 * To Do: Patch to initialize ttarget from MSR_IA32_THERM_INTERRUPT
394 */
395 tdata->ttarget = tdata->tjmax - 20000;
330 396
331 /* Check if we have problem with errata AE18 of Core processors: 397 /*
332 Readings might stop update when processor visited too deep sleep, 398 * Read the still undocumented IA32_TEMPERATURE_TARGET. It exists
333 fixed for stepping D0 (6EC). 399 * on older CPUs but not in this register,
334 */ 400 * Atoms don't have it either.
401 */
402 if ((cpu_model > 0xe) && (cpu_model != 0x1c)) {
403 err = rdmsr_safe_on_cpu(tdata->cpu,
404 MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
405 if (err) {
406 dev_warn(dev,
407 "Unable to read IA32_TEMPERATURE_TARGET MSR\n");
408 } else {
409 tdata->ttarget = tdata->tjmax -
410 (((eax >> 8) & 0xff) * 1000);
411 }
412 }
413}
414
415static int chk_ucode_version(struct platform_device *pdev)
416{
417 struct cpuinfo_x86 *c = &cpu_data(pdev->id);
418 int err;
419 u32 edx;
335 420
421 /*
422 * Check if we have problem with errata AE18 of Core processors:
423 * Readings might stop update when processor visited too deep sleep,
424 * fixed for stepping D0 (6EC).
425 */
336 if ((c->x86_model == 0xe) && (c->x86_mask < 0xc)) { 426 if ((c->x86_model == 0xe) && (c->x86_mask < 0xc)) {
337 /* check for microcode update */ 427 /* check for microcode update */
338 err = smp_call_function_single(data->id, get_ucode_rev_on_cpu, 428 err = smp_call_function_single(pdev->id, get_ucode_rev_on_cpu,
339 &edx, 1); 429 &edx, 1);
340 if (err) { 430 if (err) {
341 dev_err(&pdev->dev, 431 dev_err(&pdev->dev,
342 "Cannot determine microcode revision of " 432 "Cannot determine microcode revision of "
343 "CPU#%u (%d)!\n", data->id, err); 433 "CPU#%u (%d)!\n", pdev->id, err);
344 err = -ENODEV; 434 return -ENODEV;
345 goto exit_free;
346 } else if (edx < 0x39) { 435 } else if (edx < 0x39) {
347 err = -ENODEV;
348 dev_err(&pdev->dev, 436 dev_err(&pdev->dev,
349 "Errata AE18 not fixed, update BIOS or " 437 "Errata AE18 not fixed, update BIOS or "
350 "microcode of the CPU!\n"); 438 "microcode of the CPU!\n");
351 goto exit_free; 439 return -ENODEV;
352 } 440 }
353 } 441 }
442 return 0;
443}
444
445static struct platform_device *coretemp_get_pdev(unsigned int cpu)
446{
447 u16 phys_proc_id = TO_PHYS_ID(cpu);
448 struct pdev_entry *p;
449
450 mutex_lock(&pdev_list_mutex);
451
452 list_for_each_entry(p, &pdev_list, list)
453 if (p->phys_proc_id == phys_proc_id) {
454 mutex_unlock(&pdev_list_mutex);
455 return p->pdev;
456 }
457
458 mutex_unlock(&pdev_list_mutex);
459 return NULL;
460}
461
462static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
463{
464 struct temp_data *tdata;
465
466 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
467 if (!tdata)
468 return NULL;
469
470 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
471 MSR_IA32_THERM_STATUS;
472 tdata->is_pkg_data = pkg_flag;
473 tdata->cpu = cpu;
474 tdata->cpu_core_id = TO_CORE_ID(cpu);
475 mutex_init(&tdata->update_lock);
476 return tdata;
477}
354 478
355 data->tjmax = get_tjmax(c, data->id, &pdev->dev); 479static int create_core_data(struct platform_data *pdata,
356 platform_set_drvdata(pdev, data); 480 struct platform_device *pdev,
481 unsigned int cpu, int pkg_flag)
482{
483 struct temp_data *tdata;
484 struct cpuinfo_x86 *c = &cpu_data(cpu);
485 u32 eax, edx;
486 int err, attr_no;
357 487
358 /* 488 /*
359 * read the still undocumented IA32_TEMPERATURE_TARGET. It exists 489 * Find attr number for sysfs:
360 * on older CPUs but not in this register, 490 * We map the attr number to core id of the CPU
361 * Atoms don't have it either. 491 * The attr number is always core id + 2
492 * The Pkgtemp will always show up as temp1_*, if available
362 */ 493 */
494 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
363 495
364 if ((c->x86_model > 0xe) && (c->x86_model != 0x1c)) { 496 if (attr_no > MAX_CORE_DATA - 1)
365 err = rdmsr_safe_on_cpu(data->id, MSR_IA32_TEMPERATURE_TARGET, 497 return -ERANGE;
366 &eax, &edx); 498
367 if (err) { 499 /* Skip if it is a HT core, Not an error */
368 dev_warn(&pdev->dev, "Unable to read" 500 if (pdata->core_data[attr_no] != NULL)
369 " IA32_TEMPERATURE_TARGET MSR\n"); 501 return 0;
370 } else {
371 data->ttarget = data->tjmax -
372 (((eax >> 8) & 0xff) * 1000);
373 err = device_create_file(&pdev->dev,
374 &sensor_dev_attr_temp1_max.dev_attr);
375 if (err)
376 goto exit_free;
377 }
378 }
379 502
380 if ((err = sysfs_create_group(&pdev->dev.kobj, &coretemp_group))) 503 tdata = init_temp_data(cpu, pkg_flag);
381 goto exit_dev; 504 if (!tdata)
505 return -ENOMEM;
382 506
383 data->hwmon_dev = hwmon_device_register(&pdev->dev); 507 /* Test if we can access the status register */
384 if (IS_ERR(data->hwmon_dev)) { 508 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
385 err = PTR_ERR(data->hwmon_dev); 509 if (err)
386 dev_err(&pdev->dev, "Class registration failed (%d)\n", 510 goto exit_free;
387 err); 511
388 goto exit_class; 512 /* We can access status register. Get Critical Temperature */
389 } 513 if (pkg_flag)
514 tdata->tjmax = get_pkg_tjmax(pdev->id, &pdev->dev);
515 else
516 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
517
518 update_ttarget(c->x86_model, tdata, &pdev->dev);
519 pdata->core_data[attr_no] = tdata;
520
521 /* Create sysfs interfaces */
522 err = create_core_attrs(tdata, &pdev->dev, attr_no);
523 if (err)
524 goto exit_free;
390 525
391 return 0; 526 return 0;
527exit_free:
528 kfree(tdata);
529 return err;
530}
531
532static void coretemp_add_core(unsigned int cpu, int pkg_flag)
533{
534 struct platform_data *pdata;
535 struct platform_device *pdev = coretemp_get_pdev(cpu);
536 int err;
537
538 if (!pdev)
539 return;
540
541 pdata = platform_get_drvdata(pdev);
542
543 err = create_core_data(pdata, pdev, cpu, pkg_flag);
544 if (err)
545 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
546}
547
548static void coretemp_remove_core(struct platform_data *pdata,
549 struct device *dev, int indx)
550{
551 int i;
552 struct temp_data *tdata = pdata->core_data[indx];
553
554 /* Remove the sysfs attributes */
555 for (i = 0; i < MAX_ATTRS; i++)
556 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
557
558 kfree(pdata->core_data[indx]);
559 pdata->core_data[indx] = NULL;
560}
561
562static int __devinit coretemp_probe(struct platform_device *pdev)
563{
564 struct platform_data *pdata;
565 int err;
392 566
393exit_class: 567 /* Check the microcode version of the CPU */
394 sysfs_remove_group(&pdev->dev.kobj, &coretemp_group); 568 err = chk_ucode_version(pdev);
395exit_dev: 569 if (err)
396 device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr); 570 return err;
571
572 /* Initialize the per-package data structures */
573 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
574 if (!pdata)
575 return -ENOMEM;
576
577 err = create_name_attr(pdata, &pdev->dev);
578 if (err)
579 goto exit_free;
580
581 pdata->phys_proc_id = TO_PHYS_ID(pdev->id);
582 platform_set_drvdata(pdev, pdata);
583
584 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
585 if (IS_ERR(pdata->hwmon_dev)) {
586 err = PTR_ERR(pdata->hwmon_dev);
587 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
588 goto exit_name;
589 }
590 return 0;
591
592exit_name:
593 device_remove_file(&pdev->dev, &pdata->name_attr);
594 platform_set_drvdata(pdev, NULL);
397exit_free: 595exit_free:
398 kfree(data); 596 kfree(pdata);
399exit:
400 return err; 597 return err;
401} 598}
402 599
403static int __devexit coretemp_remove(struct platform_device *pdev) 600static int __devexit coretemp_remove(struct platform_device *pdev)
404{ 601{
405 struct coretemp_data *data = platform_get_drvdata(pdev); 602 struct platform_data *pdata = platform_get_drvdata(pdev);
603 int i;
406 604
407 hwmon_device_unregister(data->hwmon_dev); 605 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
408 sysfs_remove_group(&pdev->dev.kobj, &coretemp_group); 606 if (pdata->core_data[i])
409 device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr); 607 coretemp_remove_core(pdata, &pdev->dev, i);
608
609 device_remove_file(&pdev->dev, &pdata->name_attr);
610 hwmon_device_unregister(pdata->hwmon_dev);
410 platform_set_drvdata(pdev, NULL); 611 platform_set_drvdata(pdev, NULL);
411 kfree(data); 612 kfree(pdata);
412 return 0; 613 return 0;
413} 614}
414 615
@@ -421,50 +622,14 @@ static struct platform_driver coretemp_driver = {
421 .remove = __devexit_p(coretemp_remove), 622 .remove = __devexit_p(coretemp_remove),
422}; 623};
423 624
424struct pdev_entry {
425 struct list_head list;
426 struct platform_device *pdev;
427 unsigned int cpu;
428#ifdef CONFIG_SMP
429 u16 phys_proc_id;
430 u16 cpu_core_id;
431#endif
432};
433
434static LIST_HEAD(pdev_list);
435static DEFINE_MUTEX(pdev_list_mutex);
436
437static int __cpuinit coretemp_device_add(unsigned int cpu) 625static int __cpuinit coretemp_device_add(unsigned int cpu)
438{ 626{
439 int err; 627 int err;
440 struct platform_device *pdev; 628 struct platform_device *pdev;
441 struct pdev_entry *pdev_entry; 629 struct pdev_entry *pdev_entry;
442 struct cpuinfo_x86 *c = &cpu_data(cpu);
443
444 /*
445 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
446 * sensors. We check this bit only, all the early CPUs
447 * without thermal sensors will be filtered out.
448 */
449 if (!cpu_has(c, X86_FEATURE_DTS)) {
450 pr_info("CPU (model=0x%x) has no thermal sensor\n",
451 c->x86_model);
452 return 0;
453 }
454 630
455 mutex_lock(&pdev_list_mutex); 631 mutex_lock(&pdev_list_mutex);
456 632
457#ifdef CONFIG_SMP
458 /* Skip second HT entry of each core */
459 list_for_each_entry(pdev_entry, &pdev_list, list) {
460 if (c->phys_proc_id == pdev_entry->phys_proc_id &&
461 c->cpu_core_id == pdev_entry->cpu_core_id) {
462 err = 0; /* Not an error */
463 goto exit;
464 }
465 }
466#endif
467
468 pdev = platform_device_alloc(DRVNAME, cpu); 633 pdev = platform_device_alloc(DRVNAME, cpu);
469 if (!pdev) { 634 if (!pdev) {
470 err = -ENOMEM; 635 err = -ENOMEM;
@@ -486,10 +651,9 @@ static int __cpuinit coretemp_device_add(unsigned int cpu)
486 651
487 pdev_entry->pdev = pdev; 652 pdev_entry->pdev = pdev;
488 pdev_entry->cpu = cpu; 653 pdev_entry->cpu = cpu;
489#ifdef CONFIG_SMP 654 pdev_entry->phys_proc_id = TO_PHYS_ID(cpu);
490 pdev_entry->phys_proc_id = c->phys_proc_id; 655 pdev_entry->cpu_core_id = TO_CORE_ID(cpu);
491 pdev_entry->cpu_core_id = c->cpu_core_id; 656
492#endif
493 list_add_tail(&pdev_entry->list, &pdev_list); 657 list_add_tail(&pdev_entry->list, &pdev_list);
494 mutex_unlock(&pdev_list_mutex); 658 mutex_unlock(&pdev_list_mutex);
495 659
@@ -504,28 +668,108 @@ exit:
504 return err; 668 return err;
505} 669}
506 670
507static void __cpuinit coretemp_device_remove(unsigned int cpu) 671static void coretemp_device_remove(unsigned int cpu)
508{ 672{
509 struct pdev_entry *p; 673 struct pdev_entry *p, *n;
510 unsigned int i; 674 u16 phys_proc_id = TO_PHYS_ID(cpu);
511 675
512 mutex_lock(&pdev_list_mutex); 676 mutex_lock(&pdev_list_mutex);
513 list_for_each_entry(p, &pdev_list, list) { 677 list_for_each_entry_safe(p, n, &pdev_list, list) {
514 if (p->cpu != cpu) 678 if (p->phys_proc_id != phys_proc_id)
515 continue; 679 continue;
516
517 platform_device_unregister(p->pdev); 680 platform_device_unregister(p->pdev);
518 list_del(&p->list); 681 list_del(&p->list);
519 mutex_unlock(&pdev_list_mutex);
520 kfree(p); 682 kfree(p);
521 for_each_cpu(i, cpu_sibling_mask(cpu))
522 if (i != cpu && !coretemp_device_add(i))
523 break;
524 return;
525 } 683 }
526 mutex_unlock(&pdev_list_mutex); 684 mutex_unlock(&pdev_list_mutex);
527} 685}
528 686
687static bool is_any_core_online(struct platform_data *pdata)
688{
689 int i;
690
691 /* Find online cores, except pkgtemp data */
692 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
693 if (pdata->core_data[i] &&
694 !pdata->core_data[i]->is_pkg_data) {
695 return true;
696 }
697 }
698 return false;
699}
700
701static void __cpuinit get_core_online(unsigned int cpu)
702{
703 struct cpuinfo_x86 *c = &cpu_data(cpu);
704 struct platform_device *pdev = coretemp_get_pdev(cpu);
705 int err;
706
707 /*
708 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
709 * sensors. We check this bit only, all the early CPUs
710 * without thermal sensors will be filtered out.
711 */
712 if (!cpu_has(c, X86_FEATURE_DTS))
713 return;
714
715 if (!pdev) {
716 /*
717 * Alright, we have DTS support.
718 * We are bringing the _first_ core in this pkg
719 * online. So, initialize per-pkg data structures and
720 * then bring this core online.
721 */
722 err = coretemp_device_add(cpu);
723 if (err)
724 return;
725 /*
726 * Check whether pkgtemp support is available.
727 * If so, add interfaces for pkgtemp.
728 */
729 if (cpu_has(c, X86_FEATURE_PTS))
730 coretemp_add_core(cpu, 1);
731 }
732 /*
733 * Physical CPU device already exists.
734 * So, just add interfaces for this core.
735 */
736 coretemp_add_core(cpu, 0);
737}
738
739static void __cpuinit put_core_offline(unsigned int cpu)
740{
741 int i, indx;
742 struct platform_data *pdata;
743 struct platform_device *pdev = coretemp_get_pdev(cpu);
744
745 /* If the physical CPU device does not exist, just return */
746 if (!pdev)
747 return;
748
749 pdata = platform_get_drvdata(pdev);
750
751 indx = TO_ATTR_NO(cpu);
752
753 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
754 coretemp_remove_core(pdata, &pdev->dev, indx);
755
756 /* Online the HT version of this core, if any */
757 for_each_cpu(i, cpu_sibling_mask(cpu)) {
758 if (i != cpu) {
759 get_core_online(i);
760 break;
761 }
762 }
763 /*
764 * If all cores in this pkg are offline, remove the device.
765 * coretemp_device_remove calls unregister_platform_device,
766 * which in turn calls coretemp_remove. This removes the
767 * pkgtemp entry and does other clean ups.
768 */
769 if (!is_any_core_online(pdata))
770 coretemp_device_remove(cpu);
771}
772
529static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb, 773static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
530 unsigned long action, void *hcpu) 774 unsigned long action, void *hcpu)
531{ 775{
@@ -534,10 +778,10 @@ static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
534 switch (action) { 778 switch (action) {
535 case CPU_ONLINE: 779 case CPU_ONLINE:
536 case CPU_DOWN_FAILED: 780 case CPU_DOWN_FAILED:
537 coretemp_device_add(cpu); 781 get_core_online(cpu);
538 break; 782 break;
539 case CPU_DOWN_PREPARE: 783 case CPU_DOWN_PREPARE:
540 coretemp_device_remove(cpu); 784 put_core_offline(cpu);
541 break; 785 break;
542 } 786 }
543 return NOTIFY_OK; 787 return NOTIFY_OK;
@@ -547,6 +791,7 @@ static struct notifier_block coretemp_cpu_notifier __refdata = {
547 .notifier_call = coretemp_cpu_callback, 791 .notifier_call = coretemp_cpu_callback,
548}; 792};
549 793
794
550static int __init coretemp_init(void) 795static int __init coretemp_init(void)
551{ 796{
552 int i, err = -ENODEV; 797 int i, err = -ENODEV;
@@ -560,7 +805,7 @@ static int __init coretemp_init(void)
560 goto exit; 805 goto exit;
561 806
562 for_each_online_cpu(i) 807 for_each_online_cpu(i)
563 coretemp_device_add(i); 808 get_core_online(i);
564 809
565#ifndef CONFIG_HOTPLUG_CPU 810#ifndef CONFIG_HOTPLUG_CPU
566 if (list_empty(&pdev_list)) { 811 if (list_empty(&pdev_list)) {