[AVR32] Add nwait and tdf parameters to SMC configuration

Complete the SMC configuration code by adding nwait and tdf
parameter. After this change, we support the same parameters as the
hardware.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>

2 files changed, 45 insertions, 0 deletions

diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
index 7691721928a7..5e22a750632b 100644
--- a/arch/avr32/mach-at32ap/hsmc.c
+++ b/arch/avr32/mach-at32ap/hsmc.c
@@ -75,12 +75,35 @@ int smc_set_configuration(int cs, const struct smc_config *config)
                 return -EINVAL;
         }
 
+        switch (config->nwait_mode) {
+        case 0:
+                mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED);
+                break;
+        case 1:
+                mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED);
+                break;
+        case 2:
+                mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN);
+                break;
+        case 3:
+                mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY);
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        if (config->tdf_cycles) {
+                mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles);
+        }
+
         if (config->nrd_controlled)
                 mode |= HSMC_BIT(READ_MODE);
         if (config->nwe_controlled)
                 mode |= HSMC_BIT(WRITE_MODE);
         if (config->byte_write)
                 mode |= HSMC_BIT(BAT);
+        if (config->tdf_mode)
+                mode |= HSMC_BIT(TDF_MODE);
 
         pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n",
                  cs, setup, pulse, cycle, mode);
diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h
index 3732b328303d..07152b7fd9c9 100644
--- a/include/asm-avr32/arch-at32ap/smc.h
+++ b/include/asm-avr32/arch-at32ap/smc.h
@@ -48,10 +48,32 @@ struct smc_config {
         unsigned int    nwe_controlled:1;
 
         /*
+         * 0: NWAIT is disabled
+         * 1: Reserved
+         * 2: NWAIT is frozen mode
+         * 3: NWAIT in ready mode
+         */
+        unsigned int    nwait_mode:2;
+
+        /*
          * 0: Byte select access type
          * 1: Byte write access type
          */
         unsigned int    byte_write:1;
+
+        /*
+         * Number of clock cycles before data is released after
+         * the rising edge of the read controlling signal
+         *
+         * Total cycles from SMC is tdf_cycles + 1
+         */
+        unsigned int    tdf_cycles:4;
+
+        /*
+         * 0: TDF optimization disabled
+         * 1: TDF optimization enabled
+         */
+        unsigned int    tdf_mode:1;
 };
 
 extern int smc_set_configuration(int cs, const struct smc_config *config);