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authorPaul Mackerras <paulus@samba.org>2005-10-10 08:54:57 -0400
committerPaul Mackerras <paulus@samba.org>2005-10-10 08:54:57 -0400
commit1b92313d5ba993bb6e38a6205ccc64a7595cd0a6 (patch)
treee863dc92dc4959f5b4d9aaf3d2b490f16c1c9920
parent76f9f87fa51c9fb62c17986e2066ed467ac2da05 (diff)
powerpc: Merge asm/irq.h
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r--include/asm-powerpc/irq.h (renamed from include/asm-ppc/irq.h)158
-rw-r--r--include/asm-ppc64/irq.h120
2 files changed, 117 insertions, 161 deletions
diff --git a/include/asm-ppc/irq.h b/include/asm-powerpc/irq.h
index 137ea0cf34d3..980393a16be2 100644
--- a/include/asm-ppc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -1,11 +1,23 @@
1#ifdef __KERNEL__ 1#ifdef __KERNEL__
2#ifndef _ASM_IRQ_H 2#ifndef _ASM_POWERPC_IRQ_H
3#define _ASM_IRQ_H 3#define _ASM_POWERPC_IRQ_H
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
4 11
5#include <linux/config.h> 12#include <linux/config.h>
6#include <asm/machdep.h> /* ppc_md */ 13#include <linux/threads.h>
14
15#include <asm/types.h>
7#include <asm/atomic.h> 16#include <asm/atomic.h>
8 17
18/* this number is used when no interrupt has been assigned */
19#define NO_IRQ (-1)
20
9/* 21/*
10 * These constants are used for passing information about interrupt 22 * These constants are used for passing information about interrupt
11 * signal polarity and level/edge sensing to the low-level PIC chip 23 * signal polarity and level/edge sensing to the low-level PIC chip
@@ -30,6 +42,44 @@
30#define for_each_irq(i) \ 42#define for_each_irq(i) \
31 for ((i) = 0; (i) < NR_IRQS; ++(i)) 43 for ((i) = 0; (i) < NR_IRQS; ++(i))
32 44
45#ifdef CONFIG_PPC64
46
47/*
48 * Maximum number of interrupt sources that we can handle.
49 */
50#define NR_IRQS 512
51
52/* Interrupt numbers are virtual in case they are sparsely
53 * distributed by the hardware.
54 */
55extern unsigned int virt_irq_to_real_map[NR_IRQS];
56
57/* Create a mapping for a real_irq if it doesn't already exist.
58 * Return the virtual irq as a convenience.
59 */
60int virt_irq_create_mapping(unsigned int real_irq);
61void virt_irq_init(void);
62
63static inline unsigned int virt_irq_to_real(unsigned int virt_irq)
64{
65 return virt_irq_to_real_map[virt_irq];
66}
67
68extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq);
69
70/*
71 * List of interrupt controllers.
72 */
73#define IC_INVALID 0
74#define IC_OPEN_PIC 1
75#define IC_PPC_XIC 2
76#define IC_BPA_IIC 3
77#define IC_ISERIES 4
78
79extern u64 ppc64_interrupt_controller;
80
81#else /* 32-bit */
82
33#if defined(CONFIG_40x) 83#if defined(CONFIG_40x)
34#include <asm/ibm4xx.h> 84#include <asm/ibm4xx.h>
35 85
@@ -72,11 +122,6 @@
72#define NR_UIC_IRQS UIC_WIDTH 122#define NR_UIC_IRQS UIC_WIDTH
73#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) 123#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS)
74#endif 124#endif
75static __inline__ int
76irq_canonicalize(int irq)
77{
78 return (irq);
79}
80 125
81#elif defined(CONFIG_44x) 126#elif defined(CONFIG_44x)
82#include <asm/ibm44x.h> 127#include <asm/ibm44x.h>
@@ -84,12 +129,6 @@ irq_canonicalize(int irq)
84#define NR_UIC_IRQS 32 129#define NR_UIC_IRQS 32
85#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) 130#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS)
86 131
87static __inline__ int
88irq_canonicalize(int irq)
89{
90 return (irq);
91}
92
93#elif defined(CONFIG_8xx) 132#elif defined(CONFIG_8xx)
94 133
95/* Now include the board configuration specific associations. 134/* Now include the board configuration specific associations.
@@ -176,20 +215,9 @@ irq_canonicalize(int irq)
176 */ 215 */
177#define mk_int_int_mask(IL) (1 << (7 - (IL/2))) 216#define mk_int_int_mask(IL) (1 << (7 - (IL/2)))
178 217
179/* always the same on 8xx -- Cort */
180static __inline__ int irq_canonicalize(int irq)
181{
182 return irq;
183}
184
185#elif defined(CONFIG_83xx) 218#elif defined(CONFIG_83xx)
186#include <asm/mpc83xx.h> 219#include <asm/mpc83xx.h>
187 220
188static __inline__ int irq_canonicalize(int irq)
189{
190 return irq;
191}
192
193#define NR_IRQS (NR_IPIC_INTS) 221#define NR_IRQS (NR_IPIC_INTS)
194 222
195#elif defined(CONFIG_85xx) 223#elif defined(CONFIG_85xx)
@@ -313,17 +341,13 @@ static __inline__ int irq_canonicalize(int irq)
313#define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET) 341#define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET)
314#define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET) 342#define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET)
315 343
316static __inline__ int irq_canonicalize(int irq)
317{
318 return irq;
319}
320
321#else /* CONFIG_40x + CONFIG_8xx */ 344#else /* CONFIG_40x + CONFIG_8xx */
322/* 345/*
323 * this is the # irq's for all ppc arch's (pmac/chrp/prep) 346 * this is the # irq's for all ppc arch's (pmac/chrp/prep)
324 * so it is the max of them all 347 * so it is the max of them all
325 */ 348 */
326#define NR_IRQS 256 349#define NR_IRQS 256
350#define __DO_IRQ_CANON 1
327 351
328#ifndef CONFIG_8260 352#ifndef CONFIG_8260
329 353
@@ -400,25 +424,77 @@ static __inline__ int irq_canonicalize(int irq)
400 424
401#endif /* CONFIG_8260 */ 425#endif /* CONFIG_8260 */
402 426
427#endif
428
429#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
430/* pedantic: these are long because they are used with set_bit --RR */
431extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
432extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
433extern atomic_t ppc_n_lost_interrupts;
434
435#endif
436
403/* 437/*
404 * This gets called from serial.c, which is now used on 438 * Because many systems have two overlapping names spaces for
405 * powermacs as well as prep/chrp boxes. 439 * interrupts (ISA and XICS for example), and the ISA interrupts
406 * Prep and chrp both have cascaded 8259 PICs. 440 * have historically not been easy to renumber, we allow ISA
441 * interrupts to take values 0 - 15, and shift up the remaining
442 * interrupts by 0x10.
407 */ 443 */
444#define NUM_ISA_INTERRUPTS 0x10
445extern int __irq_offset_value;
446
447static inline int irq_offset_up(int irq)
448{
449 return(irq + __irq_offset_value);
450}
451
452static inline int irq_offset_down(int irq)
453{
454 return(irq - __irq_offset_value);
455}
456
457static inline int irq_offset_value(void)
458{
459 return __irq_offset_value;
460}
461
462#ifdef __DO_IRQ_CANON
463extern int ppc_do_canonicalize_irqs;
464#else
465#define ppc_do_canonicalize_irqs 0
466#endif
467
408static __inline__ int irq_canonicalize(int irq) 468static __inline__ int irq_canonicalize(int irq)
409{ 469{
410 if (ppc_md.irq_canonicalize) 470 if (ppc_do_canonicalize_irqs && irq == 2)
411 return ppc_md.irq_canonicalize(irq); 471 irq = 9;
412 return irq; 472 return irq;
413} 473}
414 474
415#endif 475extern int distribute_irqs;
416 476
417#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 477struct irqaction;
418/* pedantic: these are long because they are used with set_bit --RR */ 478struct pt_regs;
419extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; 479
420extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; 480#ifdef CONFIG_IRQSTACKS
421extern atomic_t ppc_n_lost_interrupts; 481/*
482 * Per-cpu stacks for handling hard and soft interrupts.
483 */
484extern struct thread_info *hardirq_ctx[NR_CPUS];
485extern struct thread_info *softirq_ctx[NR_CPUS];
486
487extern void irq_ctx_init(void);
488extern void call_do_softirq(struct thread_info *tp);
489extern int call_handle_IRQ_event(int irq, struct pt_regs *regs,
490 struct irqaction *action, struct thread_info *tp);
491
492#define __ARCH_HAS_DO_SOFTIRQ
493
494#else
495#define irq_ctx_init()
496
497#endif /* CONFIG_IRQSTACKS */
422 498
423#endif /* _ASM_IRQ_H */ 499#endif /* _ASM_IRQ_H */
424#endif /* __KERNEL__ */ 500#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/irq.h b/include/asm-ppc64/irq.h
deleted file mode 100644
index 99782afb4cde..000000000000
--- a/include/asm-ppc64/irq.h
+++ /dev/null
@@ -1,120 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _ASM_IRQ_H
3#define _ASM_IRQ_H
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/config.h>
13#include <linux/threads.h>
14
15/*
16 * Maximum number of interrupt sources that we can handle.
17 */
18#define NR_IRQS 512
19
20/* this number is used when no interrupt has been assigned */
21#define NO_IRQ (-1)
22
23/*
24 * These constants are used for passing information about interrupt
25 * signal polarity and level/edge sensing to the low-level PIC chip
26 * drivers.
27 */
28#define IRQ_SENSE_MASK 0x1
29#define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */
30#define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */
31
32#define IRQ_POLARITY_MASK 0x2
33#define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */
34#define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */
35
36/*
37 * IRQ line status macro IRQ_PER_CPU is used
38 */
39#define ARCH_HAS_IRQ_PER_CPU
40
41#define get_irq_desc(irq) (&irq_desc[(irq)])
42
43/* Define a way to iterate across irqs. */
44#define for_each_irq(i) \
45 for ((i) = 0; (i) < NR_IRQS; ++(i))
46
47/* Interrupt numbers are virtual in case they are sparsely
48 * distributed by the hardware.
49 */
50extern unsigned int virt_irq_to_real_map[NR_IRQS];
51
52/* Create a mapping for a real_irq if it doesn't already exist.
53 * Return the virtual irq as a convenience.
54 */
55int virt_irq_create_mapping(unsigned int real_irq);
56void virt_irq_init(void);
57
58static inline unsigned int virt_irq_to_real(unsigned int virt_irq)
59{
60 return virt_irq_to_real_map[virt_irq];
61}
62
63extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq);
64
65/*
66 * Because many systems have two overlapping names spaces for
67 * interrupts (ISA and XICS for example), and the ISA interrupts
68 * have historically not been easy to renumber, we allow ISA
69 * interrupts to take values 0 - 15, and shift up the remaining
70 * interrupts by 0x10.
71 */
72#define NUM_ISA_INTERRUPTS 0x10
73extern int __irq_offset_value;
74
75static inline int irq_offset_up(int irq)
76{
77 return(irq + __irq_offset_value);
78}
79
80static inline int irq_offset_down(int irq)
81{
82 return(irq - __irq_offset_value);
83}
84
85static inline int irq_offset_value(void)
86{
87 return __irq_offset_value;
88}
89
90static __inline__ int irq_canonicalize(int irq)
91{
92 return irq;
93}
94
95extern int distribute_irqs;
96
97struct irqaction;
98struct pt_regs;
99
100#ifdef CONFIG_IRQSTACKS
101/*
102 * Per-cpu stacks for handling hard and soft interrupts.
103 */
104extern struct thread_info *hardirq_ctx[NR_CPUS];
105extern struct thread_info *softirq_ctx[NR_CPUS];
106
107extern void irq_ctx_init(void);
108extern void call_do_softirq(struct thread_info *tp);
109extern int call_handle_IRQ_event(int irq, struct pt_regs *regs,
110 struct irqaction *action, struct thread_info *tp);
111
112#define __ARCH_HAS_DO_SOFTIRQ
113
114#else
115#define irq_ctx_init()
116
117#endif /* CONFIG_IRQSTACKS */
118
119#endif /* _ASM_IRQ_H */
120#endif /* __KERNEL__ */