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authorAndi Kleen <ak@suse.de>2006-04-07 13:49:45 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-04-09 14:53:51 -0400
commit95d769aaf47abfc77b600631403ff5af6c990cff (patch)
tree738fff854613a086e7c1ad04074fa596b8554760
parentd1530d82e02fd96d4634a6d6f6538c8b778c43af (diff)
[PATCH] i386: Consolidate modern APIC handling
AMD systems have a modern APIC that supports 8 bit IDs, but don't have a XAPIC version number. Add a new "modern_apic" subfunction that handles this correctly and use it (nearly) everywhere where XAPIC is tested for. I removed one wart: the code specified that external APICs would use an 8bit APIC ID. But I checked a real 82093 data sheet and it says clearly that they only use 4bit. So I removed this special case since it would a bit awkward to implement now. I removed the valid APIC tests in mptable parsing completely. On any modern system they only check against the full field width (8bit) anyways and are no-ops. This also fixes them doing the wrong thing on >8 core Opterons. This makes i386 boot again on 16 core Opterons. Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--arch/i386/kernel/apic.c23
-rw-r--r--arch/i386/kernel/mpparse.c21
-rw-r--r--include/asm-i386/apic.h2
3 files changed, 18 insertions, 28 deletions
diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c
index 6273bf74c203..254cee9f0b7b 100644
--- a/arch/i386/kernel/apic.c
+++ b/arch/i386/kernel/apic.c
@@ -62,6 +62,18 @@ int apic_verbosity;
62 62
63static void apic_pm_activate(void); 63static void apic_pm_activate(void);
64 64
65int modern_apic(void)
66{
67 unsigned int lvr, version;
68 /* AMD systems use old APIC versions, so check the CPU */
69 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
70 boot_cpu_data.x86 >= 0xf)
71 return 1;
72 lvr = apic_read(APIC_LVR);
73 version = GET_APIC_VERSION(lvr);
74 return version >= 0x14;
75}
76
65/* 77/*
66 * 'what should we do if we get a hw irq event on an illegal vector'. 78 * 'what should we do if we get a hw irq event on an illegal vector'.
67 * each architecture has to answer this themselves. 79 * each architecture has to answer this themselves.
@@ -119,10 +131,7 @@ void enable_NMI_through_LVT0 (void * dummy)
119 131
120int get_physical_broadcast(void) 132int get_physical_broadcast(void)
121{ 133{
122 unsigned int lvr, version; 134 if (modern_apic())
123 lvr = apic_read(APIC_LVR);
124 version = GET_APIC_VERSION(lvr);
125 if (!APIC_INTEGRATED(version) || version >= 0x14)
126 return 0xff; 135 return 0xff;
127 else 136 else
128 return 0xf; 137 return 0xf;
@@ -349,9 +358,9 @@ int __init verify_local_APIC(void)
349 358
350void __init sync_Arb_IDs(void) 359void __init sync_Arb_IDs(void)
351{ 360{
352 /* Unsupported on P4 - see Intel Dev. Manual Vol. 3, Ch. 8.6.1 */ 361 /* Unsupported on P4 - see Intel Dev. Manual Vol. 3, Ch. 8.6.1
353 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 362 And not needed on AMD */
354 if (ver >= 0x14) /* P4 or higher */ 363 if (modern_apic())
355 return; 364 return;
356 /* 365 /*
357 * Wait for idle. 366 * Wait for idle.
diff --git a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c
index 8d8aa9d1796d..db120174aa7e 100644
--- a/arch/i386/kernel/mpparse.c
+++ b/arch/i386/kernel/mpparse.c
@@ -110,21 +110,6 @@ static int __init mpf_checksum(unsigned char *mp, int len)
110static int mpc_record; 110static int mpc_record;
111static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY] __initdata; 111static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY] __initdata;
112 112
113#ifdef CONFIG_X86_NUMAQ
114static int MP_valid_apicid(int apicid, int version)
115{
116 return hweight_long(apicid & 0xf) == 1 && (apicid >> 4) != 0xf;
117}
118#else
119static int MP_valid_apicid(int apicid, int version)
120{
121 if (version >= 0x14)
122 return apicid < 0xff;
123 else
124 return apicid < 0xf;
125}
126#endif
127
128static void __devinit MP_processor_info (struct mpc_config_processor *m) 113static void __devinit MP_processor_info (struct mpc_config_processor *m)
129{ 114{
130 int ver, apicid; 115 int ver, apicid;
@@ -190,12 +175,6 @@ static void __devinit MP_processor_info (struct mpc_config_processor *m)
190 175
191 ver = m->mpc_apicver; 176 ver = m->mpc_apicver;
192 177
193 if (!MP_valid_apicid(apicid, ver)) {
194 printk(KERN_WARNING "Processor #%d INVALID. (Max ID: %d).\n",
195 m->mpc_apicid, MAX_APICS);
196 return;
197 }
198
199 /* 178 /*
200 * Validate version 179 * Validate version
201 */ 180 */
diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h
index ff9ac8d19eb2..288233fd77d7 100644
--- a/include/asm-i386/apic.h
+++ b/include/asm-i386/apic.h
@@ -139,6 +139,8 @@ void switch_ipi_to_APIC_timer(void *cpumask);
139 139
140extern int timer_over_8254; 140extern int timer_over_8254;
141 141
142extern int modern_apic(void);
143
142#else /* !CONFIG_X86_LOCAL_APIC */ 144#else /* !CONFIG_X86_LOCAL_APIC */
143static inline void lapic_shutdown(void) { } 145static inline void lapic_shutdown(void) { }
144 146