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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-19 17:15:16 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-19 17:15:16 -0400
commit3b641bf453497d76ea28c5fc1c666f424ead6dcf (patch)
tree84dcc02681b3327afcec98481819935606ec5da3
parent4a1f2b0fba89cdb3b2b1be99a7411bfd24d61be5 (diff)
parent4533d86270d7986e00594495dde9a109d6be27ae (diff)
Merge branch 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull miscellaneous x86 fixes from Peter Anvin: "The biggest ones are fixing suspend/resume breakage on 32 bits, and an interrim fix for mapping over holes that allows AMD kit with more than 1 TB. A final solution for the latter is in the works, but involves some fairly invasive changes that will probably mean it will only be appropriate for 3.8." * 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, MCE: Remove bios_cmci_threshold sysfs attribute x86, amd, mce: Avoid NULL pointer reference on CPU northbridge lookup x86: Exclude E820_RESERVED regions and memory holes above 4 GB from direct mapping. x86/cache_info: Use ARRAY_SIZE() in amd_l3_attrs() x86/reboot: Remove quirk entry for SBC FITPC x86, suspend: Correct the restore of CR4, EFER; skip computing EFLAGS.ID
-rw-r--r--arch/x86/kernel/cpu/intel_cacheinfo.c2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c6
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_amd.c10
-rw-r--r--arch/x86/kernel/reboot.c8
-rw-r--r--arch/x86/kernel/setup.c17
-rw-r--r--arch/x86/realmode/rm/wakeup_asm.S15
6 files changed, 24 insertions, 34 deletions
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 9a7c90d80bc4..93c5451bdd52 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -991,7 +991,7 @@ static struct attribute ** __cpuinit amd_l3_attrs(void)
991 if (attrs) 991 if (attrs)
992 return attrs; 992 return attrs;
993 993
994 n = sizeof (default_attrs) / sizeof (struct attribute *); 994 n = ARRAY_SIZE(default_attrs);
995 995
996 if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE)) 996 if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))
997 n += 2; 997 n += 2;
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 29e87d3b2843..46cbf8689692 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -2209,11 +2209,6 @@ static struct dev_ext_attribute dev_attr_cmci_disabled = {
2209 &mce_cmci_disabled 2209 &mce_cmci_disabled
2210}; 2210};
2211 2211
2212static struct dev_ext_attribute dev_attr_bios_cmci_threshold = {
2213 __ATTR(bios_cmci_threshold, 0444, device_show_int, NULL),
2214 &mce_bios_cmci_threshold
2215};
2216
2217static struct device_attribute *mce_device_attrs[] = { 2212static struct device_attribute *mce_device_attrs[] = {
2218 &dev_attr_tolerant.attr, 2213 &dev_attr_tolerant.attr,
2219 &dev_attr_check_interval.attr, 2214 &dev_attr_check_interval.attr,
@@ -2222,7 +2217,6 @@ static struct device_attribute *mce_device_attrs[] = {
2222 &dev_attr_dont_log_ce.attr, 2217 &dev_attr_dont_log_ce.attr,
2223 &dev_attr_ignore_ce.attr, 2218 &dev_attr_ignore_ce.attr,
2224 &dev_attr_cmci_disabled.attr, 2219 &dev_attr_cmci_disabled.attr,
2225 &dev_attr_bios_cmci_threshold.attr,
2226 NULL 2220 NULL
2227}; 2221};
2228 2222
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index c4e916d77378..698b6ec12e0f 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -576,12 +576,10 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
576 int err = 0; 576 int err = 0;
577 577
578 if (shared_bank[bank]) { 578 if (shared_bank[bank]) {
579
580 nb = node_to_amd_nb(amd_get_nb_id(cpu)); 579 nb = node_to_amd_nb(amd_get_nb_id(cpu));
581 WARN_ON(!nb);
582 580
583 /* threshold descriptor already initialized on this node? */ 581 /* threshold descriptor already initialized on this node? */
584 if (nb->bank4) { 582 if (nb && nb->bank4) {
585 /* yes, use it */ 583 /* yes, use it */
586 b = nb->bank4; 584 b = nb->bank4;
587 err = kobject_add(b->kobj, &dev->kobj, name); 585 err = kobject_add(b->kobj, &dev->kobj, name);
@@ -615,8 +613,10 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
615 atomic_set(&b->cpus, 1); 613 atomic_set(&b->cpus, 1);
616 614
617 /* nb is already initialized, see above */ 615 /* nb is already initialized, see above */
618 WARN_ON(nb->bank4); 616 if (nb) {
619 nb->bank4 = b; 617 WARN_ON(nb->bank4);
618 nb->bank4 = b;
619 }
620 } 620 }
621 621
622 err = allocate_threshold_blocks(cpu, bank, 0, 622 err = allocate_threshold_blocks(cpu, bank, 0,
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 52190a938b4a..4e8ba39eaf0f 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -358,14 +358,6 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
358 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), 358 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"),
359 }, 359 },
360 }, 360 },
361 { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */
362 .callback = set_bios_reboot,
363 .ident = "CompuLab SBC-FITPC2",
364 .matches = {
365 DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"),
366 DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"),
367 },
368 },
369 { /* Handle problems with rebooting on ASUS P4S800 */ 361 { /* Handle problems with rebooting on ASUS P4S800 */
370 .callback = set_bios_reboot, 362 .callback = set_bios_reboot,
371 .ident = "ASUS P4S800", 363 .ident = "ASUS P4S800",
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index a2bb18e02839..468e98dfd44e 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -920,8 +920,21 @@ void __init setup_arch(char **cmdline_p)
920 920
921#ifdef CONFIG_X86_64 921#ifdef CONFIG_X86_64
922 if (max_pfn > max_low_pfn) { 922 if (max_pfn > max_low_pfn) {
923 max_pfn_mapped = init_memory_mapping(1UL<<32, 923 int i;
924 max_pfn<<PAGE_SHIFT); 924 for (i = 0; i < e820.nr_map; i++) {
925 struct e820entry *ei = &e820.map[i];
926
927 if (ei->addr + ei->size <= 1UL << 32)
928 continue;
929
930 if (ei->type == E820_RESERVED)
931 continue;
932
933 max_pfn_mapped = init_memory_mapping(
934 ei->addr < 1UL << 32 ? 1UL << 32 : ei->addr,
935 ei->addr + ei->size);
936 }
937
925 /* can we preseve max_low_pfn ?*/ 938 /* can we preseve max_low_pfn ?*/
926 max_low_pfn = max_pfn; 939 max_low_pfn = max_pfn;
927 } 940 }
diff --git a/arch/x86/realmode/rm/wakeup_asm.S b/arch/x86/realmode/rm/wakeup_asm.S
index e56479e58053..9e7e14797a72 100644
--- a/arch/x86/realmode/rm/wakeup_asm.S
+++ b/arch/x86/realmode/rm/wakeup_asm.S
@@ -74,18 +74,9 @@ ENTRY(wakeup_start)
74 74
75 lidtl wakeup_idt 75 lidtl wakeup_idt
76 76
77 /* Clear the EFLAGS but remember if we have EFLAGS.ID */ 77 /* Clear the EFLAGS */
78 movl $X86_EFLAGS_ID, %ecx
79 pushl %ecx
80 popfl
81 pushfl
82 popl %edi
83 pushl $0 78 pushl $0
84 popfl 79 popfl
85 pushfl
86 popl %edx
87 xorl %edx, %edi
88 andl %ecx, %edi /* %edi is zero iff CPUID & %cr4 are missing */
89 80
90 /* Check header signature... */ 81 /* Check header signature... */
91 movl signature, %eax 82 movl signature, %eax
@@ -120,12 +111,12 @@ ENTRY(wakeup_start)
120 movl %eax, %cr3 111 movl %eax, %cr3
121 112
122 btl $WAKEUP_BEHAVIOR_RESTORE_CR4, %edi 113 btl $WAKEUP_BEHAVIOR_RESTORE_CR4, %edi
123 jz 1f 114 jnc 1f
124 movl pmode_cr4, %eax 115 movl pmode_cr4, %eax
125 movl %eax, %cr4 116 movl %eax, %cr4
1261: 1171:
127 btl $WAKEUP_BEHAVIOR_RESTORE_EFER, %edi 118 btl $WAKEUP_BEHAVIOR_RESTORE_EFER, %edi
128 jz 1f 119 jnc 1f
129 movl pmode_efer, %eax 120 movl pmode_efer, %eax
130 movl pmode_efer + 4, %edx 121 movl pmode_efer + 4, %edx
131 movl $MSR_EFER, %ecx 122 movl $MSR_EFER, %ecx