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authorRob Herring <rob.herring@calxeda.com>2013-01-28 11:13:14 -0500
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-02-01 18:01:15 -0500
commit300586778d405f0a4d1f6dc51fcfb4fed567d020 (patch)
treef54593ff6668e89df990f2b4cbd2d55176ada437
parentb5964708532f4713e9cfb1b8b1a6ac8544fc66af (diff)
ARM / highbank: add support for pl320 IPC
The pl320 IPC allows for interprocessor communication between the highbank A9 and the EnergyCore Management Engine. The pl320 implements a straightforward mailbox protocol. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-rw-r--r--arch/arm/mach-highbank/Kconfig2
-rw-r--r--drivers/Kconfig2
-rw-r--r--drivers/Makefile1
-rw-r--r--drivers/mailbox/Kconfig19
-rw-r--r--drivers/mailbox/Makefile1
-rw-r--r--drivers/mailbox/pl320-ipc.c199
-rw-r--r--include/linux/mailbox.h17
7 files changed, 241 insertions, 0 deletions
diff --git a/arch/arm/mach-highbank/Kconfig b/arch/arm/mach-highbank/Kconfig
index 551c97e87a78..2388085beaa2 100644
--- a/arch/arm/mach-highbank/Kconfig
+++ b/arch/arm/mach-highbank/Kconfig
@@ -11,5 +11,7 @@ config ARCH_HIGHBANK
11 select GENERIC_CLOCKEVENTS 11 select GENERIC_CLOCKEVENTS
12 select HAVE_ARM_SCU 12 select HAVE_ARM_SCU
13 select HAVE_SMP 13 select HAVE_SMP
14 select MAILBOX
15 select PL320_MBOX
14 select SPARSE_IRQ 16 select SPARSE_IRQ
15 select USE_OF 17 select USE_OF
diff --git a/drivers/Kconfig b/drivers/Kconfig
index f5fb0722a63a..2b4e89ba15ad 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -134,6 +134,8 @@ source "drivers/hwspinlock/Kconfig"
134 134
135source "drivers/clocksource/Kconfig" 135source "drivers/clocksource/Kconfig"
136 136
137source "drivers/mailbox/Kconfig"
138
137source "drivers/iommu/Kconfig" 139source "drivers/iommu/Kconfig"
138 140
139source "drivers/remoteproc/Kconfig" 141source "drivers/remoteproc/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 7863b9fee50b..a8d32f1094b4 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -130,6 +130,7 @@ obj-y += platform/
130#common clk code 130#common clk code
131obj-y += clk/ 131obj-y += clk/
132 132
133obj-$(CONFIG_MAILBOX) += mailbox/
133obj-$(CONFIG_HWSPINLOCK) += hwspinlock/ 134obj-$(CONFIG_HWSPINLOCK) += hwspinlock/
134obj-$(CONFIG_NFC) += nfc/ 135obj-$(CONFIG_NFC) += nfc/
135obj-$(CONFIG_IOMMU_SUPPORT) += iommu/ 136obj-$(CONFIG_IOMMU_SUPPORT) += iommu/
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
new file mode 100644
index 000000000000..9545c9f03809
--- /dev/null
+++ b/drivers/mailbox/Kconfig
@@ -0,0 +1,19 @@
1menuconfig MAILBOX
2 bool "Mailbox Hardware Support"
3 help
4 Mailbox is a framework to control hardware communication between
5 on-chip processors through queued messages and interrupt driven
6 signals. Say Y if your platform supports hardware mailboxes.
7
8if MAILBOX
9config PL320_MBOX
10 bool "ARM PL320 Mailbox"
11 depends on ARM_AMBA
12 help
13 An implementation of the ARM PL320 Interprocessor Communication
14 Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
15 send short messages between Highbank's A9 cores and the EnergyCore
16 Management Engine, primarily for cpufreq. Say Y here if you want
17 to use the PL320 IPCM support.
18
19endif
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
new file mode 100644
index 000000000000..543ad6a79505
--- /dev/null
+++ b/drivers/mailbox/Makefile
@@ -0,0 +1 @@
obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
diff --git a/drivers/mailbox/pl320-ipc.c b/drivers/mailbox/pl320-ipc.c
new file mode 100644
index 000000000000..c45b3aedafba
--- /dev/null
+++ b/drivers/mailbox/pl320-ipc.c
@@ -0,0 +1,199 @@
1/*
2 * Copyright 2012 Calxeda, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#include <linux/types.h>
17#include <linux/err.h>
18#include <linux/delay.h>
19#include <linux/export.h>
20#include <linux/io.h>
21#include <linux/interrupt.h>
22#include <linux/completion.h>
23#include <linux/mutex.h>
24#include <linux/notifier.h>
25#include <linux/spinlock.h>
26#include <linux/device.h>
27#include <linux/amba/bus.h>
28
29#include <linux/mailbox.h>
30
31#define IPCMxSOURCE(m) ((m) * 0x40)
32#define IPCMxDSET(m) (((m) * 0x40) + 0x004)
33#define IPCMxDCLEAR(m) (((m) * 0x40) + 0x008)
34#define IPCMxDSTATUS(m) (((m) * 0x40) + 0x00C)
35#define IPCMxMODE(m) (((m) * 0x40) + 0x010)
36#define IPCMxMSET(m) (((m) * 0x40) + 0x014)
37#define IPCMxMCLEAR(m) (((m) * 0x40) + 0x018)
38#define IPCMxMSTATUS(m) (((m) * 0x40) + 0x01C)
39#define IPCMxSEND(m) (((m) * 0x40) + 0x020)
40#define IPCMxDR(m, dr) (((m) * 0x40) + ((dr) * 4) + 0x024)
41
42#define IPCMMIS(irq) (((irq) * 8) + 0x800)
43#define IPCMRIS(irq) (((irq) * 8) + 0x804)
44
45#define MBOX_MASK(n) (1 << (n))
46#define IPC_TX_MBOX 1
47#define IPC_RX_MBOX 2
48
49#define CHAN_MASK(n) (1 << (n))
50#define A9_SOURCE 1
51#define M3_SOURCE 0
52
53static void __iomem *ipc_base;
54static int ipc_irq;
55static DEFINE_MUTEX(ipc_m1_lock);
56static DECLARE_COMPLETION(ipc_completion);
57static ATOMIC_NOTIFIER_HEAD(ipc_notifier);
58
59static inline void set_destination(int source, int mbox)
60{
61 __raw_writel(CHAN_MASK(source), ipc_base + IPCMxDSET(mbox));
62 __raw_writel(CHAN_MASK(source), ipc_base + IPCMxMSET(mbox));
63}
64
65static inline void clear_destination(int source, int mbox)
66{
67 __raw_writel(CHAN_MASK(source), ipc_base + IPCMxDCLEAR(mbox));
68 __raw_writel(CHAN_MASK(source), ipc_base + IPCMxMCLEAR(mbox));
69}
70
71static void __ipc_send(int mbox, u32 *data)
72{
73 int i;
74 for (i = 0; i < 7; i++)
75 __raw_writel(data[i], ipc_base + IPCMxDR(mbox, i));
76 __raw_writel(0x1, ipc_base + IPCMxSEND(mbox));
77}
78
79static u32 __ipc_rcv(int mbox, u32 *data)
80{
81 int i;
82 for (i = 0; i < 7; i++)
83 data[i] = __raw_readl(ipc_base + IPCMxDR(mbox, i));
84 return data[1];
85}
86
87/* blocking implmentation from the A9 side, not usuable in interrupts! */
88int pl320_ipc_transmit(u32 *data)
89{
90 int ret;
91
92 mutex_lock(&ipc_m1_lock);
93
94 init_completion(&ipc_completion);
95 __ipc_send(IPC_TX_MBOX, data);
96 ret = wait_for_completion_timeout(&ipc_completion,
97 msecs_to_jiffies(1000));
98 if (ret == 0) {
99 ret = -ETIMEDOUT;
100 goto out;
101 }
102
103 ret = __ipc_rcv(IPC_TX_MBOX, data);
104out:
105 mutex_unlock(&ipc_m1_lock);
106 return ret;
107}
108EXPORT_SYMBOL_GPL(pl320_ipc_transmit);
109
110static irqreturn_t ipc_handler(int irq, void *dev)
111{
112 u32 irq_stat;
113 u32 data[7];
114
115 irq_stat = __raw_readl(ipc_base + IPCMMIS(1));
116 if (irq_stat & MBOX_MASK(IPC_TX_MBOX)) {
117 __raw_writel(0, ipc_base + IPCMxSEND(IPC_TX_MBOX));
118 complete(&ipc_completion);
119 }
120 if (irq_stat & MBOX_MASK(IPC_RX_MBOX)) {
121 __ipc_rcv(IPC_RX_MBOX, data);
122 atomic_notifier_call_chain(&ipc_notifier, data[0], data + 1);
123 __raw_writel(2, ipc_base + IPCMxSEND(IPC_RX_MBOX));
124 }
125
126 return IRQ_HANDLED;
127}
128
129int pl320_ipc_register_notifier(struct notifier_block *nb)
130{
131 return atomic_notifier_chain_register(&ipc_notifier, nb);
132}
133EXPORT_SYMBOL_GPL(pl320_ipc_register_notifier);
134
135int pl320_ipc_unregister_notifier(struct notifier_block *nb)
136{
137 return atomic_notifier_chain_unregister(&ipc_notifier, nb);
138}
139EXPORT_SYMBOL_GPL(pl320_ipc_unregister_notifier);
140
141static int __init pl320_probe(struct amba_device *adev,
142 const struct amba_id *id)
143{
144 int ret;
145
146 ipc_base = ioremap(adev->res.start, resource_size(&adev->res));
147 if (ipc_base == NULL)
148 return -ENOMEM;
149
150 __raw_writel(0, ipc_base + IPCMxSEND(IPC_TX_MBOX));
151
152 ipc_irq = adev->irq[0];
153 ret = request_irq(ipc_irq, ipc_handler, 0, dev_name(&adev->dev), NULL);
154 if (ret < 0)
155 goto err;
156
157 /* Init slow mailbox */
158 __raw_writel(CHAN_MASK(A9_SOURCE),
159 ipc_base + IPCMxSOURCE(IPC_TX_MBOX));
160 __raw_writel(CHAN_MASK(M3_SOURCE),
161 ipc_base + IPCMxDSET(IPC_TX_MBOX));
162 __raw_writel(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE),
163 ipc_base + IPCMxMSET(IPC_TX_MBOX));
164
165 /* Init receive mailbox */
166 __raw_writel(CHAN_MASK(M3_SOURCE),
167 ipc_base + IPCMxSOURCE(IPC_RX_MBOX));
168 __raw_writel(CHAN_MASK(A9_SOURCE),
169 ipc_base + IPCMxDSET(IPC_RX_MBOX));
170 __raw_writel(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE),
171 ipc_base + IPCMxMSET(IPC_RX_MBOX));
172
173 return 0;
174err:
175 iounmap(ipc_base);
176 return ret;
177}
178
179static struct amba_id pl320_ids[] = {
180 {
181 .id = 0x00041320,
182 .mask = 0x000fffff,
183 },
184 { 0, 0 },
185};
186
187static struct amba_driver pl320_driver = {
188 .drv = {
189 .name = "pl320",
190 },
191 .id_table = pl320_ids,
192 .probe = pl320_probe,
193};
194
195static int __init ipc_init(void)
196{
197 return amba_driver_register(&pl320_driver);
198}
199module_init(ipc_init);
diff --git a/include/linux/mailbox.h b/include/linux/mailbox.h
new file mode 100644
index 000000000000..5161f63ec1c8
--- /dev/null
+++ b/include/linux/mailbox.h
@@ -0,0 +1,17 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms and conditions of the GNU General Public License,
4 * version 2, as published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope it will be useful, but WITHOUT
7 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
9 * more details.
10 *
11 * You should have received a copy of the GNU General Public License along with
12 * this program. If not, see <http://www.gnu.org/licenses/>.
13 */
14
15int pl320_ipc_transmit(u32 *data);
16int pl320_ipc_register_notifier(struct notifier_block *nb);
17int pl320_ipc_unregister_notifier(struct notifier_block *nb);