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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-12-18 06:40:46 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-25 06:04:01 -0500
commit0dada61a29ddaaca5985c76aafec341b4ad3e989 (patch)
treed34e8b34f9f9ed0dd01004c3dec91e41cc8eaff4
parent8a47ae8b96640bc9f049dce0d8ba6980176da0ea (diff)
ARM: amba: integrator/realview/versatile/vexpress: get rid of NO_IRQ initializers
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-integrator/core.c10
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c4
-rw-r--r--arch/arm/mach-realview/realview_eb.c40
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c40
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c40
-rw-r--r--arch/arm/mach-realview/realview_pba8.c40
-rw-r--r--arch/arm/mach-realview/realview_pbx.c40
-rw-r--r--arch/arm/mach-versatile/core.c34
-rw-r--r--arch/arm/mach-versatile/versatile_pb.c8
-rw-r--r--arch/arm/mach-vexpress/include/mach/ct-ca9x4.h2
10 files changed, 129 insertions, 129 deletions
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 019f0ab08f66..29baef9d8f76 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -44,7 +44,7 @@ static struct amba_device rtc_device = {
44 .end = INTEGRATOR_RTC_BASE + SZ_4K - 1, 44 .end = INTEGRATOR_RTC_BASE + SZ_4K - 1,
45 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
46 }, 46 },
47 .irq = { IRQ_RTCINT, NO_IRQ }, 47 .irq = { IRQ_RTCINT },
48}; 48};
49 49
50static struct amba_device uart0_device = { 50static struct amba_device uart0_device = {
@@ -57,7 +57,7 @@ static struct amba_device uart0_device = {
57 .end = INTEGRATOR_UART0_BASE + SZ_4K - 1, 57 .end = INTEGRATOR_UART0_BASE + SZ_4K - 1,
58 .flags = IORESOURCE_MEM, 58 .flags = IORESOURCE_MEM,
59 }, 59 },
60 .irq = { IRQ_UARTINT0, NO_IRQ }, 60 .irq = { IRQ_UARTINT0 },
61}; 61};
62 62
63static struct amba_device uart1_device = { 63static struct amba_device uart1_device = {
@@ -70,7 +70,7 @@ static struct amba_device uart1_device = {
70 .end = INTEGRATOR_UART1_BASE + SZ_4K - 1, 70 .end = INTEGRATOR_UART1_BASE + SZ_4K - 1,
71 .flags = IORESOURCE_MEM, 71 .flags = IORESOURCE_MEM,
72 }, 72 },
73 .irq = { IRQ_UARTINT1, NO_IRQ }, 73 .irq = { IRQ_UARTINT1 },
74}; 74};
75 75
76static struct amba_device kmi0_device = { 76static struct amba_device kmi0_device = {
@@ -82,7 +82,7 @@ static struct amba_device kmi0_device = {
82 .end = KMI0_BASE + SZ_4K - 1, 82 .end = KMI0_BASE + SZ_4K - 1,
83 .flags = IORESOURCE_MEM, 83 .flags = IORESOURCE_MEM,
84 }, 84 },
85 .irq = { IRQ_KMIINT0, NO_IRQ }, 85 .irq = { IRQ_KMIINT0 },
86}; 86};
87 87
88static struct amba_device kmi1_device = { 88static struct amba_device kmi1_device = {
@@ -94,7 +94,7 @@ static struct amba_device kmi1_device = {
94 .end = KMI1_BASE + SZ_4K - 1, 94 .end = KMI1_BASE + SZ_4K - 1,
95 .flags = IORESOURCE_MEM, 95 .flags = IORESOURCE_MEM,
96 }, 96 },
97 .irq = { IRQ_KMIINT1, NO_IRQ }, 97 .irq = { IRQ_KMIINT1 },
98}; 98};
99 99
100static struct amba_device *amba_devs[] __initdata = { 100static struct amba_device *amba_devs[] __initdata = {
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index a8b6aa6003f3..ecc08ed4f3c4 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -370,7 +370,7 @@ static struct amba_device aaci_device = {
370 .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1, 370 .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1,
371 .flags = IORESOURCE_MEM, 371 .flags = IORESOURCE_MEM,
372 }, 372 },
373 .irq = { IRQ_CP_AACIINT, NO_IRQ }, 373 .irq = { IRQ_CP_AACIINT },
374 .periphid = 0, 374 .periphid = 0,
375}; 375};
376 376
@@ -437,7 +437,7 @@ static struct amba_device clcd_device = {
437 .flags = IORESOURCE_MEM, 437 .flags = IORESOURCE_MEM,
438 }, 438 },
439 .dma_mask = ~0, 439 .dma_mask = ~0,
440 .irq = { IRQ_CP_CLCDCINT, NO_IRQ }, 440 .irq = { IRQ_CP_CLCDCINT },
441 .periphid = 0, 441 .periphid = 0,
442}; 442};
443 443
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index e62962117763..5c810e5886a1 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -140,40 +140,40 @@ static struct pl022_ssp_controller ssp0_plat_data = {
140/* 140/*
141 * These devices are connected via the core APB bridge 141 * These devices are connected via the core APB bridge
142 */ 142 */
143#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } 143#define GPIO2_IRQ { IRQ_EB_GPIO2 }
144#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } 144#define GPIO3_IRQ { IRQ_EB_GPIO3 }
145 145
146#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } 146#define AACI_IRQ { IRQ_EB_AACI }
147#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } 147#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
148#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } 148#define KMI0_IRQ { IRQ_EB_KMI0 }
149#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } 149#define KMI1_IRQ { IRQ_EB_KMI1 }
150 150
151/* 151/*
152 * These devices are connected directly to the multi-layer AHB switch 152 * These devices are connected directly to the multi-layer AHB switch
153 */ 153 */
154#define EB_SMC_IRQ { NO_IRQ, NO_IRQ } 154#define EB_SMC_IRQ { }
155#define MPMC_IRQ { NO_IRQ, NO_IRQ } 155#define MPMC_IRQ { }
156#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } 156#define EB_CLCD_IRQ { IRQ_EB_CLCD }
157#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } 157#define DMAC_IRQ { IRQ_EB_DMA }
158 158
159/* 159/*
160 * These devices are connected via the core APB bridge 160 * These devices are connected via the core APB bridge
161 */ 161 */
162#define SCTL_IRQ { NO_IRQ, NO_IRQ } 162#define SCTL_IRQ { }
163#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } 163#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
164#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } 164#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 }
165#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } 165#define GPIO1_IRQ { IRQ_EB_GPIO1 }
166#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } 166#define EB_RTC_IRQ { IRQ_EB_RTC }
167 167
168/* 168/*
169 * These devices are connected via the DMA APB bridge 169 * These devices are connected via the DMA APB bridge
170 */ 170 */
171#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } 171#define SCI_IRQ { IRQ_EB_SCI }
172#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } 172#define EB_UART0_IRQ { IRQ_EB_UART0 }
173#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } 173#define EB_UART1_IRQ { IRQ_EB_UART1 }
174#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } 174#define EB_UART2_IRQ { IRQ_EB_UART2 }
175#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } 175#define EB_UART3_IRQ { IRQ_EB_UART3 }
176#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } 176#define EB_SSP_IRQ { IRQ_EB_SSP }
177 177
178/* FPGA Primecells */ 178/* FPGA Primecells */
179AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 179AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 913d105caab6..485cc07204b4 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -132,27 +132,27 @@ static struct pl022_ssp_controller ssp0_plat_data = {
132/* 132/*
133 * RealView PB1176 AMBA devices 133 * RealView PB1176 AMBA devices
134 */ 134 */
135#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } 135#define GPIO2_IRQ { IRQ_PB1176_GPIO2 }
136#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } 136#define GPIO3_IRQ { IRQ_PB1176_GPIO3 }
137#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } 137#define AACI_IRQ { IRQ_PB1176_AACI }
138#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } 138#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
139#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } 139#define KMI0_IRQ { IRQ_PB1176_KMI0 }
140#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } 140#define KMI1_IRQ { IRQ_PB1176_KMI1 }
141#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } 141#define PB1176_SMC_IRQ { }
142#define MPMC_IRQ { NO_IRQ, NO_IRQ } 142#define MPMC_IRQ { }
143#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } 143#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
144#define SCTL_IRQ { NO_IRQ, NO_IRQ } 144#define SCTL_IRQ { }
145#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } 145#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG }
146#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0, NO_IRQ } 146#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 }
147#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } 147#define GPIO1_IRQ { IRQ_PB1176_GPIO1 }
148#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } 148#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
149#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } 149#define SCI_IRQ { IRQ_PB1176_SCI }
150#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } 150#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 }
151#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } 151#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 }
152#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } 152#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 }
153#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } 153#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 }
154#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } 154#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 }
155#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } 155#define PB1176_SSP_IRQ { IRQ_DC1176_SSP }
156 156
157/* FPGA Primecells */ 157/* FPGA Primecells */
158AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 158AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 127a3fd42ab1..cb4f2daf58ea 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -132,27 +132,27 @@ static struct pl022_ssp_controller ssp0_plat_data = {
132 * RealView PB11MPCore AMBA devices 132 * RealView PB11MPCore AMBA devices
133 */ 133 */
134 134
135#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } 135#define GPIO2_IRQ { IRQ_PB11MP_GPIO2 }
136#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } 136#define GPIO3_IRQ { IRQ_PB11MP_GPIO3 }
137#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } 137#define AACI_IRQ { IRQ_TC11MP_AACI }
138#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } 138#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
139#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } 139#define KMI0_IRQ { IRQ_TC11MP_KMI0 }
140#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } 140#define KMI1_IRQ { IRQ_TC11MP_KMI1 }
141#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } 141#define PB11MP_SMC_IRQ { }
142#define MPMC_IRQ { NO_IRQ, NO_IRQ } 142#define MPMC_IRQ { }
143#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } 143#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD }
144#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } 144#define DMAC_IRQ { IRQ_PB11MP_DMAC }
145#define SCTL_IRQ { NO_IRQ, NO_IRQ } 145#define SCTL_IRQ { }
146#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } 146#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG }
147#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } 147#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 }
148#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } 148#define GPIO1_IRQ { IRQ_PB11MP_GPIO1 }
149#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } 149#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC }
150#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } 150#define SCI_IRQ { IRQ_PB11MP_SCI }
151#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } 151#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 }
152#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } 152#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 }
153#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } 153#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 }
154#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } 154#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 }
155#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } 155#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP }
156 156
157/* FPGA Primecells */ 157/* FPGA Primecells */
158AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 158AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 25b2e59296f8..293de2155ca7 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -122,27 +122,27 @@ static struct pl022_ssp_controller ssp0_plat_data = {
122 * RealView PBA8Core AMBA devices 122 * RealView PBA8Core AMBA devices
123 */ 123 */
124 124
125#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } 125#define GPIO2_IRQ { IRQ_PBA8_GPIO2 }
126#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } 126#define GPIO3_IRQ { IRQ_PBA8_GPIO3 }
127#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } 127#define AACI_IRQ { IRQ_PBA8_AACI }
128#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } 128#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
129#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } 129#define KMI0_IRQ { IRQ_PBA8_KMI0 }
130#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } 130#define KMI1_IRQ { IRQ_PBA8_KMI1 }
131#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } 131#define PBA8_SMC_IRQ { }
132#define MPMC_IRQ { NO_IRQ, NO_IRQ } 132#define MPMC_IRQ { }
133#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } 133#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD }
134#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } 134#define DMAC_IRQ { IRQ_PBA8_DMAC }
135#define SCTL_IRQ { NO_IRQ, NO_IRQ } 135#define SCTL_IRQ { }
136#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } 136#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG }
137#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } 137#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 }
138#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } 138#define GPIO1_IRQ { IRQ_PBA8_GPIO1 }
139#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } 139#define PBA8_RTC_IRQ { IRQ_PBA8_RTC }
140#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } 140#define SCI_IRQ { IRQ_PBA8_SCI }
141#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } 141#define PBA8_UART0_IRQ { IRQ_PBA8_UART0 }
142#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } 142#define PBA8_UART1_IRQ { IRQ_PBA8_UART1 }
143#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } 143#define PBA8_UART2_IRQ { IRQ_PBA8_UART2 }
144#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } 144#define PBA8_UART3_IRQ { IRQ_PBA8_UART3 }
145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } 145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP }
146 146
147/* FPGA Primecells */ 147/* FPGA Primecells */
148AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 148AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index ac715645b860..8e2a30630856 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -144,27 +144,27 @@ static struct pl022_ssp_controller ssp0_plat_data = {
144 * RealView PBXCore AMBA devices 144 * RealView PBXCore AMBA devices
145 */ 145 */
146 146
147#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } 147#define GPIO2_IRQ { IRQ_PBX_GPIO2 }
148#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } 148#define GPIO3_IRQ { IRQ_PBX_GPIO3 }
149#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } 149#define AACI_IRQ { IRQ_PBX_AACI }
150#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } 150#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
151#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } 151#define KMI0_IRQ { IRQ_PBX_KMI0 }
152#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } 152#define KMI1_IRQ { IRQ_PBX_KMI1 }
153#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } 153#define PBX_SMC_IRQ { }
154#define MPMC_IRQ { NO_IRQ, NO_IRQ } 154#define MPMC_IRQ { }
155#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } 155#define PBX_CLCD_IRQ { IRQ_PBX_CLCD }
156#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } 156#define DMAC_IRQ { IRQ_PBX_DMAC }
157#define SCTL_IRQ { NO_IRQ, NO_IRQ } 157#define SCTL_IRQ { }
158#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } 158#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG }
159#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } 159#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 }
160#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } 160#define GPIO1_IRQ { IRQ_PBX_GPIO1 }
161#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } 161#define PBX_RTC_IRQ { IRQ_PBX_RTC }
162#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } 162#define SCI_IRQ { IRQ_PBX_SCI }
163#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } 163#define PBX_UART0_IRQ { IRQ_PBX_UART0 }
164#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } 164#define PBX_UART1_IRQ { IRQ_PBX_UART1 }
165#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } 165#define PBX_UART2_IRQ { IRQ_PBX_UART2 }
166#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } 166#define PBX_UART3_IRQ { IRQ_PBX_UART3 }
167#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } 167#define PBX_SSP_IRQ { IRQ_PBX_SSP }
168 168
169/* FPGA Primecells */ 169/* FPGA Primecells */
170AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 170AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 02b7b9303f3b..358cc0bc069b 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -582,36 +582,36 @@ static struct pl022_ssp_controller ssp0_plat_data = {
582 .num_chipselect = 1, 582 .num_chipselect = 1,
583}; 583};
584 584
585#define AACI_IRQ { IRQ_AACI, NO_IRQ } 585#define AACI_IRQ { IRQ_AACI }
586#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } 586#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
587#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } 587#define KMI0_IRQ { IRQ_SIC_KMI0 }
588#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } 588#define KMI1_IRQ { IRQ_SIC_KMI1 }
589 589
590/* 590/*
591 * These devices are connected directly to the multi-layer AHB switch 591 * These devices are connected directly to the multi-layer AHB switch
592 */ 592 */
593#define SMC_IRQ { NO_IRQ, NO_IRQ } 593#define SMC_IRQ { }
594#define MPMC_IRQ { NO_IRQ, NO_IRQ } 594#define MPMC_IRQ { }
595#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } 595#define CLCD_IRQ { IRQ_CLCDINT }
596#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } 596#define DMAC_IRQ { IRQ_DMAINT }
597 597
598/* 598/*
599 * These devices are connected via the core APB bridge 599 * These devices are connected via the core APB bridge
600 */ 600 */
601#define SCTL_IRQ { NO_IRQ, NO_IRQ } 601#define SCTL_IRQ { }
602#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } 602#define WATCHDOG_IRQ { IRQ_WDOGINT }
603#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } 603#define GPIO0_IRQ { IRQ_GPIOINT0 }
604#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } 604#define GPIO1_IRQ { IRQ_GPIOINT1 }
605#define RTC_IRQ { IRQ_RTCINT, NO_IRQ } 605#define RTC_IRQ { IRQ_RTCINT }
606 606
607/* 607/*
608 * These devices are connected via the DMA APB bridge 608 * These devices are connected via the DMA APB bridge
609 */ 609 */
610#define SCI_IRQ { IRQ_SCIINT, NO_IRQ } 610#define SCI_IRQ { IRQ_SCIINT }
611#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } 611#define UART0_IRQ { IRQ_UARTINT0 }
612#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } 612#define UART1_IRQ { IRQ_UARTINT1 }
613#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } 613#define UART2_IRQ { IRQ_UARTINT2 }
614#define SSP_IRQ { IRQ_SSPINT, NO_IRQ } 614#define SSP_IRQ { IRQ_SSPINT }
615 615
616/* FPGA Primecells */ 616/* FPGA Primecells */
617AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); 617AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 9581c197500c..1a5fe6eec337 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -58,15 +58,15 @@ static struct pl061_platform_data gpio3_plat_data = {
58 .irq_base = IRQ_GPIO3_START, 58 .irq_base = IRQ_GPIO3_START,
59}; 59};
60 60
61#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } 61#define UART3_IRQ { IRQ_SIC_UART3 }
62#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } 62#define SCI1_IRQ { IRQ_SIC_SCI3 }
63#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } 63#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
64 64
65/* 65/*
66 * These devices are connected via the core APB bridge 66 * These devices are connected via the core APB bridge
67 */ 67 */
68#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } 68#define GPIO2_IRQ { IRQ_GPIOINT2 }
69#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } 69#define GPIO3_IRQ { IRQ_GPIOINT3 }
70 70
71/* 71/*
72 * These devices are connected via the DMA APB bridge 72 * These devices are connected via the DMA APB bridge
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
index a34d3d4faae1..a40468f3b938 100644
--- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
+++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
@@ -35,7 +35,7 @@
35 * Interrupts. Those in {} are for AMBA devices 35 * Interrupts. Those in {} are for AMBA devices
36 */ 36 */
37#define IRQ_CT_CA9X4_CLCDC { 76 } 37#define IRQ_CT_CA9X4_CLCDC { 76 }
38#define IRQ_CT_CA9X4_DMC { -1 } 38#define IRQ_CT_CA9X4_DMC { 0 }
39#define IRQ_CT_CA9X4_SMC { 77, 78 } 39#define IRQ_CT_CA9X4_SMC { 77, 78 }
40#define IRQ_CT_CA9X4_TIMER0 80 40#define IRQ_CT_CA9X4_TIMER0 80
41#define IRQ_CT_CA9X4_TIMER1 81 41#define IRQ_CT_CA9X4_TIMER1 81