diff options
author | Seth Heasley <seth.heasley@intel.com> | 2011-04-19 19:35:15 -0400 |
---|---|---|
committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-05-10 18:43:36 -0400 |
commit | c0a86a9bea55d505574120f3e9775e3844276505 (patch) | |
tree | db811f3106e03f35886fd82f084a7531014c0e32 | |
parent | 34e3207205ef492451cc5c53694d4772a9728b9f (diff) |
x86/PCI: irq and pci_ids patch for Intel Panther Point DeviceIDs
This patch adds the LPC Controller DeviceIDs for the Intel Panther Point PCH.
Acked-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Seth Heasley <seth.heasley@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-rw-r--r-- | arch/x86/pci/irq.c | 4 | ||||
-rw-r--r-- | include/linux/pci_ids.h | 3 |
2 files changed, 6 insertions, 1 deletions
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c index 8201165bae28..372e9b8989b3 100644 --- a/arch/x86/pci/irq.c +++ b/arch/x86/pci/irq.c | |||
@@ -602,7 +602,9 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route | |||
602 | || (device >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN && | 602 | || (device >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN && |
603 | device <= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX) | 603 | device <= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX) |
604 | || (device >= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN && | 604 | || (device >= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN && |
605 | device <= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX)) { | 605 | device <= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX) |
606 | || (device >= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN && | ||
607 | device <= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX)) { | ||
606 | r->name = "PIIX/ICH"; | 608 | r->name = "PIIX/ICH"; |
607 | r->get = pirq_piix_get; | 609 | r->get = pirq_piix_get; |
608 | r->set = pirq_piix_set; | 610 | r->set = pirq_piix_set; |
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 4e2c9150a785..52f4ed4de490 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -2480,6 +2480,9 @@ | |||
2480 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 | 2480 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 |
2481 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41 | 2481 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41 |
2482 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f | 2482 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f |
2483 | #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22 | ||
2484 | #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e40 | ||
2485 | #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f | ||
2483 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 | 2486 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 |
2484 | #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40 | 2487 | #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40 |
2485 | #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1 0x1d41 | 2488 | #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1 0x1d41 |