diff options
author | Russell King - ARM Linux <linux@arm.linux.org.uk> | 2011-01-16 15:18:05 -0500 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2011-01-16 19:55:43 -0500 |
commit | 94ae85220a07d357d4937086c490854f63344de4 (patch) | |
tree | 8dda364dc7cbae73a30bbe5ef47ac8d674d998c6 | |
parent | 0261f7416362f6affc2d4fe7fea9320a6bdaaee6 (diff) |
ARM: PL08x: cleanup comments
Cleanup the formatting of comments, remove some which don't make sense
anymore.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[fix conflict with 96a608a4]
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
-rw-r--r-- | drivers/dma/amba-pl08x.c | 146 | ||||
-rw-r--r-- | include/linux/amba/pl08x.h | 43 |
2 files changed, 72 insertions, 117 deletions
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index bebc678ed4fc..297f48b0cba9 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c | |||
@@ -19,14 +19,14 @@ | |||
19 | * this program; if not, write to the Free Software Foundation, Inc., 59 | 19 | * this program; if not, write to the Free Software Foundation, Inc., 59 |
20 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 20 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
21 | * | 21 | * |
22 | * The full GNU General Public License is in this distribution in the | 22 | * The full GNU General Public License is in this distribution in the file |
23 | * file called COPYING. | 23 | * called COPYING. |
24 | * | 24 | * |
25 | * Documentation: ARM DDI 0196G == PL080 | 25 | * Documentation: ARM DDI 0196G == PL080 |
26 | * Documentation: ARM DDI 0218E == PL081 | 26 | * Documentation: ARM DDI 0218E == PL081 |
27 | * | 27 | * |
28 | * PL080 & PL081 both have 16 sets of DMA signals that can be routed to | 28 | * PL080 & PL081 both have 16 sets of DMA signals that can be routed to any |
29 | * any channel. | 29 | * channel. |
30 | * | 30 | * |
31 | * The PL080 has 8 channels available for simultaneous use, and the PL081 | 31 | * The PL080 has 8 channels available for simultaneous use, and the PL081 |
32 | * has only two channels. So on these DMA controllers the number of channels | 32 | * has only two channels. So on these DMA controllers the number of channels |
@@ -91,11 +91,9 @@ | |||
91 | #define DRIVER_NAME "pl08xdmac" | 91 | #define DRIVER_NAME "pl08xdmac" |
92 | 92 | ||
93 | /** | 93 | /** |
94 | * struct vendor_data - vendor-specific config parameters | 94 | * struct vendor_data - vendor-specific config parameters for PL08x derivatives |
95 | * for PL08x derivatives | ||
96 | * @channels: the number of channels available in this variant | 95 | * @channels: the number of channels available in this variant |
97 | * @dualmaster: whether this version supports dual AHB masters | 96 | * @dualmaster: whether this version supports dual AHB masters or not. |
98 | * or not. | ||
99 | */ | 97 | */ |
100 | struct vendor_data { | 98 | struct vendor_data { |
101 | u8 channels; | 99 | u8 channels; |
@@ -241,10 +239,8 @@ static void pl08x_start_txd(struct pl08x_dma_chan *plchan, | |||
241 | * | 239 | * |
242 | * Disabling individual channels could lose data. | 240 | * Disabling individual channels could lose data. |
243 | * | 241 | * |
244 | * Disable the peripheral DMA after disabling the DMAC | 242 | * Disable the peripheral DMA after disabling the DMAC in order to allow |
245 | * in order to allow the DMAC FIFO to drain, and | 243 | * the DMAC FIFO to drain, and hence allow the channel to show inactive |
246 | * hence allow the channel to show inactive | ||
247 | * | ||
248 | */ | 244 | */ |
249 | static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) | 245 | static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) |
250 | { | 246 | { |
@@ -367,6 +363,10 @@ static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan) | |||
367 | 363 | ||
368 | /* | 364 | /* |
369 | * Allocate a physical channel for a virtual channel | 365 | * Allocate a physical channel for a virtual channel |
366 | * | ||
367 | * Try to locate a physical channel to be used for this transfer. If all | ||
368 | * are taken return NULL and the requester will have to cope by using | ||
369 | * some fallback PIO mode or retrying later. | ||
370 | */ | 370 | */ |
371 | static struct pl08x_phy_chan * | 371 | static struct pl08x_phy_chan * |
372 | pl08x_get_phy_channel(struct pl08x_driver_data *pl08x, | 372 | pl08x_get_phy_channel(struct pl08x_driver_data *pl08x, |
@@ -376,12 +376,6 @@ pl08x_get_phy_channel(struct pl08x_driver_data *pl08x, | |||
376 | unsigned long flags; | 376 | unsigned long flags; |
377 | int i; | 377 | int i; |
378 | 378 | ||
379 | /* | ||
380 | * Try to locate a physical channel to be used for | ||
381 | * this transfer. If all are taken return NULL and | ||
382 | * the requester will have to cope by using some fallback | ||
383 | * PIO mode or retrying later. | ||
384 | */ | ||
385 | for (i = 0; i < pl08x->vd->channels; i++) { | 379 | for (i = 0; i < pl08x->vd->channels; i++) { |
386 | ch = &pl08x->phy_chans[i]; | 380 | ch = &pl08x->phy_chans[i]; |
387 | 381 | ||
@@ -495,9 +489,9 @@ struct pl08x_lli_build_data { | |||
495 | }; | 489 | }; |
496 | 490 | ||
497 | /* | 491 | /* |
498 | * Autoselect a master bus to use for the transfer | 492 | * Autoselect a master bus to use for the transfer this prefers the |
499 | * this prefers the destination bus if both available | 493 | * destination bus if both available if fixed address on one bus the |
500 | * if fixed address on one bus the other will be chosen | 494 | * other will be chosen |
501 | */ | 495 | */ |
502 | static void pl08x_choose_master_bus(struct pl08x_lli_build_data *bd, | 496 | static void pl08x_choose_master_bus(struct pl08x_lli_build_data *bd, |
503 | struct pl08x_bus_data **mbus, struct pl08x_bus_data **sbus, u32 cctl) | 497 | struct pl08x_bus_data **mbus, struct pl08x_bus_data **sbus, u32 cctl) |
@@ -530,8 +524,7 @@ static void pl08x_choose_master_bus(struct pl08x_lli_build_data *bd, | |||
530 | } | 524 | } |
531 | 525 | ||
532 | /* | 526 | /* |
533 | * Fills in one LLI for a certain transfer descriptor | 527 | * Fills in one LLI for a certain transfer descriptor and advance the counter |
534 | * and advance the counter | ||
535 | */ | 528 | */ |
536 | static void pl08x_fill_lli_for_desc(struct pl08x_lli_build_data *bd, | 529 | static void pl08x_fill_lli_for_desc(struct pl08x_lli_build_data *bd, |
537 | int num_llis, int len, u32 cctl) | 530 | int num_llis, int len, u32 cctl) |
@@ -640,15 +633,11 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, | |||
640 | * Choose bus to align to | 633 | * Choose bus to align to |
641 | * - prefers destination bus if both available | 634 | * - prefers destination bus if both available |
642 | * - if fixed address on one bus chooses other | 635 | * - if fixed address on one bus chooses other |
643 | * - modifies cctl to choose an appropriate master | ||
644 | */ | 636 | */ |
645 | pl08x_choose_master_bus(&bd, &mbus, &sbus, cctl); | 637 | pl08x_choose_master_bus(&bd, &mbus, &sbus, cctl); |
646 | 638 | ||
647 | if (txd->len < mbus->buswidth) { | 639 | if (txd->len < mbus->buswidth) { |
648 | /* | 640 | /* Less than a bus width available - send as single bytes */ |
649 | * Less than a bus width available | ||
650 | * - send as single bytes | ||
651 | */ | ||
652 | while (bd.remainder) { | 641 | while (bd.remainder) { |
653 | dev_vdbg(&pl08x->adev->dev, | 642 | dev_vdbg(&pl08x->adev->dev, |
654 | "%s single byte LLIs for a transfer of " | 643 | "%s single byte LLIs for a transfer of " |
@@ -659,10 +648,7 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, | |||
659 | total_bytes++; | 648 | total_bytes++; |
660 | } | 649 | } |
661 | } else { | 650 | } else { |
662 | /* | 651 | /* Make one byte LLIs until master bus is aligned */ |
663 | * Make one byte LLIs until master bus is aligned | ||
664 | * - slave will then be aligned also | ||
665 | */ | ||
666 | while ((mbus->addr) % (mbus->buswidth)) { | 652 | while ((mbus->addr) % (mbus->buswidth)) { |
667 | dev_vdbg(&pl08x->adev->dev, | 653 | dev_vdbg(&pl08x->adev->dev, |
668 | "%s adjustment lli for less than bus width " | 654 | "%s adjustment lli for less than bus width " |
@@ -674,7 +660,7 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, | |||
674 | } | 660 | } |
675 | 661 | ||
676 | /* | 662 | /* |
677 | * Master now aligned | 663 | * Master now aligned |
678 | * - if slave is not then we must set its width down | 664 | * - if slave is not then we must set its width down |
679 | */ | 665 | */ |
680 | if (sbus->addr % sbus->buswidth) { | 666 | if (sbus->addr % sbus->buswidth) { |
@@ -732,10 +718,8 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, | |||
732 | 718 | ||
733 | if (lli_len == target_len) { | 719 | if (lli_len == target_len) { |
734 | /* | 720 | /* |
735 | * Can send what we wanted | 721 | * Can send what we wanted. |
736 | */ | 722 | * Maintain alignment |
737 | /* | ||
738 | * Maintain alignment | ||
739 | */ | 723 | */ |
740 | lli_len = (lli_len/mbus->buswidth) * | 724 | lli_len = (lli_len/mbus->buswidth) * |
741 | mbus->buswidth; | 725 | mbus->buswidth; |
@@ -743,17 +727,14 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, | |||
743 | } else { | 727 | } else { |
744 | /* | 728 | /* |
745 | * So now we know how many bytes to transfer | 729 | * So now we know how many bytes to transfer |
746 | * to get to the nearest boundary | 730 | * to get to the nearest boundary. The next |
747 | * The next LLI will past the boundary | 731 | * LLI will past the boundary. However, we |
748 | * - however we may be working to a boundary | 732 | * may be working to a boundary on the slave |
749 | * on the slave bus | 733 | * bus. We need to ensure the master stays |
750 | * We need to ensure the master stays aligned | 734 | * aligned, and that we are working in |
735 | * multiples of the bus widths. | ||
751 | */ | 736 | */ |
752 | odd_bytes = lli_len % mbus->buswidth; | 737 | odd_bytes = lli_len % mbus->buswidth; |
753 | /* | ||
754 | * - and that we are working in multiples | ||
755 | * of the bus widths | ||
756 | */ | ||
757 | lli_len -= odd_bytes; | 738 | lli_len -= odd_bytes; |
758 | 739 | ||
759 | } | 740 | } |
@@ -793,8 +774,8 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, | |||
793 | 774 | ||
794 | if (odd_bytes) { | 775 | if (odd_bytes) { |
795 | /* | 776 | /* |
796 | * Creep past the boundary, | 777 | * Creep past the boundary, maintaining |
797 | * maintaining master alignment | 778 | * master alignment |
798 | */ | 779 | */ |
799 | int j; | 780 | int j; |
800 | for (j = 0; (j < mbus->buswidth) | 781 | for (j = 0; (j < mbus->buswidth) |
@@ -837,13 +818,9 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, | |||
837 | } | 818 | } |
838 | 819 | ||
839 | llis_va = txd->llis_va; | 820 | llis_va = txd->llis_va; |
840 | /* | 821 | /* The final LLI terminates the LLI. */ |
841 | * The final LLI terminates the LLI. | ||
842 | */ | ||
843 | llis_va[num_llis - 1].lli = 0; | 822 | llis_va[num_llis - 1].lli = 0; |
844 | /* | 823 | /* The final LLI element shall also fire an interrupt. */ |
845 | * The final LLI element shall also fire an interrupt | ||
846 | */ | ||
847 | llis_va[num_llis - 1].cctl |= PL080_CONTROL_TC_IRQ_EN; | 824 | llis_va[num_llis - 1].cctl |= PL080_CONTROL_TC_IRQ_EN; |
848 | 825 | ||
849 | #ifdef VERBOSE_DEBUG | 826 | #ifdef VERBOSE_DEBUG |
@@ -891,7 +868,6 @@ static void pl08x_free_txd_list(struct pl08x_driver_data *pl08x, | |||
891 | list_del(&txdi->node); | 868 | list_del(&txdi->node); |
892 | pl08x_free_txd(pl08x, txdi); | 869 | pl08x_free_txd(pl08x, txdi); |
893 | } | 870 | } |
894 | |||
895 | } | 871 | } |
896 | } | 872 | } |
897 | 873 | ||
@@ -1020,10 +996,9 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_interrupt( | |||
1020 | } | 996 | } |
1021 | 997 | ||
1022 | /* | 998 | /* |
1023 | * Code accessing dma_async_is_complete() in a tight loop | 999 | * Code accessing dma_async_is_complete() in a tight loop may give problems. |
1024 | * may give problems - could schedule where indicated. | 1000 | * If slaves are relying on interrupts to signal completion this function |
1025 | * If slaves are relying on interrupts to signal completion this | 1001 | * must not be called with interrupts disabled. |
1026 | * function must not be called with interrupts disabled | ||
1027 | */ | 1002 | */ |
1028 | static enum dma_status | 1003 | static enum dma_status |
1029 | pl08x_dma_tx_status(struct dma_chan *chan, | 1004 | pl08x_dma_tx_status(struct dma_chan *chan, |
@@ -1046,10 +1021,6 @@ pl08x_dma_tx_status(struct dma_chan *chan, | |||
1046 | } | 1021 | } |
1047 | 1022 | ||
1048 | /* | 1023 | /* |
1049 | * schedule(); could be inserted here | ||
1050 | */ | ||
1051 | |||
1052 | /* | ||
1053 | * This cookie not complete yet | 1024 | * This cookie not complete yet |
1054 | */ | 1025 | */ |
1055 | last_used = plchan->chan.cookie; | 1026 | last_used = plchan->chan.cookie; |
@@ -1273,11 +1244,10 @@ static int pl08x_prep_channel_resources(struct pl08x_dma_chan *plchan, | |||
1273 | } | 1244 | } |
1274 | } else | 1245 | } else |
1275 | /* | 1246 | /* |
1276 | * Else we're all set, paused and ready to roll, | 1247 | * Else we're all set, paused and ready to roll, status |
1277 | * status will switch to PL08X_CHAN_RUNNING when | 1248 | * will switch to PL08X_CHAN_RUNNING when we call |
1278 | * we call issue_pending(). If there is something | 1249 | * issue_pending(). If there is something running on the |
1279 | * running on the channel already we don't change | 1250 | * channel already we don't change its state. |
1280 | * its state. | ||
1281 | */ | 1251 | */ |
1282 | if (plchan->state == PL08X_CHAN_IDLE) | 1252 | if (plchan->state == PL08X_CHAN_IDLE) |
1283 | plchan->state = PL08X_CHAN_PAUSED; | 1253 | plchan->state = PL08X_CHAN_PAUSED; |
@@ -1528,10 +1498,9 @@ bool pl08x_filter_id(struct dma_chan *chan, void *chan_id) | |||
1528 | 1498 | ||
1529 | /* | 1499 | /* |
1530 | * Just check that the device is there and active | 1500 | * Just check that the device is there and active |
1531 | * TODO: turn this bit on/off depending on the number of | 1501 | * TODO: turn this bit on/off depending on the number of physical channels |
1532 | * physical channels actually used, if it is zero... well | 1502 | * actually used, if it is zero... well shut it off. That will save some |
1533 | * shut it off. That will save some power. Cut the clock | 1503 | * power. Cut the clock at the same time. |
1534 | * at the same time. | ||
1535 | */ | 1504 | */ |
1536 | static void pl08x_ensure_on(struct pl08x_driver_data *pl08x) | 1505 | static void pl08x_ensure_on(struct pl08x_driver_data *pl08x) |
1537 | { | 1506 | { |
@@ -1579,16 +1548,11 @@ static void pl08x_tasklet(unsigned long data) | |||
1579 | plchan->at = NULL; | 1548 | plchan->at = NULL; |
1580 | 1549 | ||
1581 | if (txd) { | 1550 | if (txd) { |
1582 | /* | 1551 | /* Update last completed */ |
1583 | * Update last completed | ||
1584 | */ | ||
1585 | plchan->lc = txd->tx.cookie; | 1552 | plchan->lc = txd->tx.cookie; |
1586 | } | 1553 | } |
1587 | 1554 | ||
1588 | /* | 1555 | /* If a new descriptor is queued, set it up plchan->at is NULL here */ |
1589 | * If a new descriptor is queued, set it up | ||
1590 | * plchan->at is NULL here | ||
1591 | */ | ||
1592 | if (!list_empty(&plchan->pend_list)) { | 1556 | if (!list_empty(&plchan->pend_list)) { |
1593 | struct pl08x_txd *next; | 1557 | struct pl08x_txd *next; |
1594 | 1558 | ||
@@ -1615,11 +1579,10 @@ static void pl08x_tasklet(unsigned long data) | |||
1615 | plchan->state = PL08X_CHAN_IDLE; | 1579 | plchan->state = PL08X_CHAN_IDLE; |
1616 | 1580 | ||
1617 | /* | 1581 | /* |
1618 | * And NOW before anyone else can grab that free:d | 1582 | * And NOW before anyone else can grab that free:d up |
1619 | * up physical channel, see if there is some memcpy | 1583 | * physical channel, see if there is some memcpy pending |
1620 | * pending that seriously needs to start because of | 1584 | * that seriously needs to start because of being stacked |
1621 | * being stacked up while we were choking the | 1585 | * up while we were choking the physical channels with data. |
1622 | * physical channels with data. | ||
1623 | */ | 1586 | */ |
1624 | list_for_each_entry(waiting, &pl08x->memcpy.channels, | 1587 | list_for_each_entry(waiting, &pl08x->memcpy.channels, |
1625 | chan.device_node) { | 1588 | chan.device_node) { |
@@ -1670,9 +1633,7 @@ static irqreturn_t pl08x_irq(int irq, void *dev) | |||
1670 | 1633 | ||
1671 | val = readl(pl08x->base + PL080_ERR_STATUS); | 1634 | val = readl(pl08x->base + PL080_ERR_STATUS); |
1672 | if (val) { | 1635 | if (val) { |
1673 | /* | 1636 | /* An error interrupt (on one or more channels) */ |
1674 | * An error interrupt (on one or more channels) | ||
1675 | */ | ||
1676 | dev_err(&pl08x->adev->dev, | 1637 | dev_err(&pl08x->adev->dev, |
1677 | "%s error interrupt, register value 0x%08x\n", | 1638 | "%s error interrupt, register value 0x%08x\n", |
1678 | __func__, val); | 1639 | __func__, val); |
@@ -1696,9 +1657,7 @@ static irqreturn_t pl08x_irq(int irq, void *dev) | |||
1696 | mask |= (1 << i); | 1657 | mask |= (1 << i); |
1697 | } | 1658 | } |
1698 | } | 1659 | } |
1699 | /* | 1660 | /* Clear only the terminal interrupts on channels we processed */ |
1700 | * Clear only the terminal interrupts on channels we processed | ||
1701 | */ | ||
1702 | writel(mask, pl08x->base + PL080_TC_CLEAR); | 1661 | writel(mask, pl08x->base + PL080_TC_CLEAR); |
1703 | 1662 | ||
1704 | return mask ? IRQ_HANDLED : IRQ_NONE; | 1663 | return mask ? IRQ_HANDLED : IRQ_NONE; |
@@ -1717,6 +1676,7 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x, | |||
1717 | int i; | 1676 | int i; |
1718 | 1677 | ||
1719 | INIT_LIST_HEAD(&dmadev->channels); | 1678 | INIT_LIST_HEAD(&dmadev->channels); |
1679 | |||
1720 | /* | 1680 | /* |
1721 | * Register as many many memcpy as we have physical channels, | 1681 | * Register as many many memcpy as we have physical channels, |
1722 | * we won't always be able to use all but the code will have | 1682 | * we won't always be able to use all but the code will have |
@@ -1950,9 +1910,7 @@ static int pl08x_probe(struct amba_device *adev, struct amba_id *id) | |||
1950 | /* Turn on the PL08x */ | 1910 | /* Turn on the PL08x */ |
1951 | pl08x_ensure_on(pl08x); | 1911 | pl08x_ensure_on(pl08x); |
1952 | 1912 | ||
1953 | /* | 1913 | /* Attach the interrupt handler */ |
1954 | * Attach the interrupt handler | ||
1955 | */ | ||
1956 | writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR); | 1914 | writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR); |
1957 | writel(0x000000FF, pl08x->base + PL080_TC_CLEAR); | 1915 | writel(0x000000FF, pl08x->base + PL080_TC_CLEAR); |
1958 | 1916 | ||
diff --git a/include/linux/amba/pl08x.h b/include/linux/amba/pl08x.h index 5b87b6aac3f8..3111385b8ca7 100644 --- a/include/linux/amba/pl08x.h +++ b/include/linux/amba/pl08x.h | |||
@@ -12,7 +12,6 @@ | |||
12 | * | 12 | * |
13 | * Please credit ARM.com | 13 | * Please credit ARM.com |
14 | * Documentation: ARM DDI 0196D | 14 | * Documentation: ARM DDI 0196D |
15 | * | ||
16 | */ | 15 | */ |
17 | 16 | ||
18 | #ifndef AMBA_PL08X_H | 17 | #ifndef AMBA_PL08X_H |
@@ -55,8 +54,8 @@ enum { | |||
55 | * @circular_buffer: whether the buffer passed in is circular and | 54 | * @circular_buffer: whether the buffer passed in is circular and |
56 | * shall simply be looped round round (like a record baby round | 55 | * shall simply be looped round round (like a record baby round |
57 | * round round round) | 56 | * round round round) |
58 | * @single: the device connected to this channel will request single | 57 | * @single: the device connected to this channel will request single DMA |
59 | * DMA transfers, not bursts. (Bursts are default.) | 58 | * transfers, not bursts. (Bursts are default.) |
60 | * @periph_buses: the device connected to this channel is accessible via | 59 | * @periph_buses: the device connected to this channel is accessible via |
61 | * these buses (use PL08X_AHB1 | PL08X_AHB2). | 60 | * these buses (use PL08X_AHB1 | PL08X_AHB2). |
62 | */ | 61 | */ |
@@ -78,8 +77,7 @@ struct pl08x_channel_data { | |||
78 | * @addr: current address | 77 | * @addr: current address |
79 | * @maxwidth: the maximum width of a transfer on this bus | 78 | * @maxwidth: the maximum width of a transfer on this bus |
80 | * @buswidth: the width of this bus in bytes: 1, 2 or 4 | 79 | * @buswidth: the width of this bus in bytes: 1, 2 or 4 |
81 | * @fill_bytes: bytes required to fill to the next bus memory | 80 | * @fill_bytes: bytes required to fill to the next bus memory boundary |
82 | * boundary | ||
83 | */ | 81 | */ |
84 | struct pl08x_bus_data { | 82 | struct pl08x_bus_data { |
85 | dma_addr_t addr; | 83 | dma_addr_t addr; |
@@ -92,10 +90,10 @@ struct pl08x_bus_data { | |||
92 | * struct pl08x_phy_chan - holder for the physical channels | 90 | * struct pl08x_phy_chan - holder for the physical channels |
93 | * @id: physical index to this channel | 91 | * @id: physical index to this channel |
94 | * @lock: a lock to use when altering an instance of this struct | 92 | * @lock: a lock to use when altering an instance of this struct |
95 | * @signal: the physical signal (aka channel) serving this | 93 | * @signal: the physical signal (aka channel) serving this physical channel |
96 | * physical channel right now | 94 | * right now |
97 | * @serving: the virtual channel currently being served by this | 95 | * @serving: the virtual channel currently being served by this physical |
98 | * physical channel | 96 | * channel |
99 | */ | 97 | */ |
100 | struct pl08x_phy_chan { | 98 | struct pl08x_phy_chan { |
101 | unsigned int id; | 99 | unsigned int id; |
@@ -119,7 +117,6 @@ struct pl08x_txd { | |||
119 | size_t len; | 117 | size_t len; |
120 | dma_addr_t llis_bus; | 118 | dma_addr_t llis_bus; |
121 | struct pl08x_lli *llis_va; | 119 | struct pl08x_lli *llis_va; |
122 | bool active; | ||
123 | /* Default cctl value for LLIs */ | 120 | /* Default cctl value for LLIs */ |
124 | u32 cctl; | 121 | u32 cctl; |
125 | /* | 122 | /* |
@@ -130,8 +127,8 @@ struct pl08x_txd { | |||
130 | }; | 127 | }; |
131 | 128 | ||
132 | /** | 129 | /** |
133 | * struct pl08x_dma_chan_state - holds the PL08x specific virtual | 130 | * struct pl08x_dma_chan_state - holds the PL08x specific virtual channel |
134 | * channel states | 131 | * states |
135 | * @PL08X_CHAN_IDLE: the channel is idle | 132 | * @PL08X_CHAN_IDLE: the channel is idle |
136 | * @PL08X_CHAN_RUNNING: the channel has allocated a physical transport | 133 | * @PL08X_CHAN_RUNNING: the channel has allocated a physical transport |
137 | * channel and is running a transfer on it | 134 | * channel and is running a transfer on it |
@@ -152,7 +149,7 @@ enum pl08x_dma_chan_state { | |||
152 | * @chan: wrappped abstract channel | 149 | * @chan: wrappped abstract channel |
153 | * @phychan: the physical channel utilized by this channel, if there is one | 150 | * @phychan: the physical channel utilized by this channel, if there is one |
154 | * @phychan_hold: if non-zero, hold on to the physical channel even if we | 151 | * @phychan_hold: if non-zero, hold on to the physical channel even if we |
155 | * have no pending entries | 152 | * have no pending entries |
156 | * @tasklet: tasklet scheduled by the IRQ to handle actual work etc | 153 | * @tasklet: tasklet scheduled by the IRQ to handle actual work etc |
157 | * @name: name of channel | 154 | * @name: name of channel |
158 | * @cd: channel platform data | 155 | * @cd: channel platform data |
@@ -166,8 +163,8 @@ enum pl08x_dma_chan_state { | |||
166 | * @host: a pointer to the host (internal use) | 163 | * @host: a pointer to the host (internal use) |
167 | * @state: whether the channel is idle, paused, running etc | 164 | * @state: whether the channel is idle, paused, running etc |
168 | * @slave: whether this channel is a device (slave) or for memcpy | 165 | * @slave: whether this channel is a device (slave) or for memcpy |
169 | * @waiting: a TX descriptor on this channel which is waiting for | 166 | * @waiting: a TX descriptor on this channel which is waiting for a physical |
170 | * a physical channel to become available | 167 | * channel to become available |
171 | */ | 168 | */ |
172 | struct pl08x_dma_chan { | 169 | struct pl08x_dma_chan { |
173 | struct dma_chan chan; | 170 | struct dma_chan chan; |
@@ -189,16 +186,16 @@ struct pl08x_dma_chan { | |||
189 | }; | 186 | }; |
190 | 187 | ||
191 | /** | 188 | /** |
192 | * struct pl08x_platform_data - the platform configuration for the | 189 | * struct pl08x_platform_data - the platform configuration for the PL08x |
193 | * PL08x PrimeCells. | 190 | * PrimeCells. |
194 | * @slave_channels: the channels defined for the different devices on the | 191 | * @slave_channels: the channels defined for the different devices on the |
195 | * platform, all inclusive, including multiplexed channels. The available | 192 | * platform, all inclusive, including multiplexed channels. The available |
196 | * physical channels will be multiplexed around these signals as they | 193 | * physical channels will be multiplexed around these signals as they are |
197 | * are requested, just enumerate all possible channels. | 194 | * requested, just enumerate all possible channels. |
198 | * @get_signal: request a physical signal to be used for a DMA | 195 | * @get_signal: request a physical signal to be used for a DMA transfer |
199 | * transfer immediately: if there is some multiplexing or similar blocking | 196 | * immediately: if there is some multiplexing or similar blocking the use |
200 | * the use of the channel the transfer can be denied by returning | 197 | * of the channel the transfer can be denied by returning less than zero, |
201 | * less than zero, else it returns the allocated signal number | 198 | * else it returns the allocated signal number |
202 | * @put_signal: indicate to the platform that this physical signal is not | 199 | * @put_signal: indicate to the platform that this physical signal is not |
203 | * running any DMA transfer and multiplexing can be recycled | 200 | * running any DMA transfer and multiplexing can be recycled |
204 | * @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2 | 201 | * @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2 |