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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 08:29:39 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 08:47:58 -0400
commit9323f26186403433293e87e717a7785f74f75d80 (patch)
tree612ef29f951838dc4bf53589bdfd5e1368951234
parent6845664a6a7d443f03883db59d10749d38d98b8e (diff)
arm: Reorder irq_set_ function calls
Reorder irq_set_chip() irq_set_chip_data() irq_set_handler() to irq_set_chip() irq_set_handler() irq_set_chip_data() so the next patch can combine irq_set_chip() and irq_set_handler() to irq_set_chip_and_handler(). Automated conversion with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--arch/arm/common/gic.c2
-rw-r--r--arch/arm/common/locomo.c2
-rw-r--r--arch/arm/common/sa1111.c4
-rw-r--r--arch/arm/common/vic.c2
-rw-r--r--arch/arm/mach-exynos4/irq-combiner.c2
-rw-r--r--arch/arm/mach-pxa/irq.c4
-rw-r--r--arch/arm/mach-s3c64xx/irq-eint.c2
-rw-r--r--arch/arm/plat-orion/irq.c2
-rw-r--r--arch/arm/plat-samsung/irq-uart.c2
9 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 50d5b20d5c93..630d46b5ab82 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -320,8 +320,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic,
320 */ 320 */
321 for (i = irq_start; i < irq_limit; i++) { 321 for (i = irq_start; i < irq_limit; i++) {
322 irq_set_chip(i, &gic_chip); 322 irq_set_chip(i, &gic_chip);
323 irq_set_chip_data(i, gic);
324 irq_set_handler(i, handle_level_irq); 323 irq_set_handler(i, handle_level_irq);
324 irq_set_chip_data(i, gic);
325 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 325 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
326 } 326 }
327 327
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index ea18b351f205..54d91f8607e7 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -204,8 +204,8 @@ static void locomo_setup_irq(struct locomo *lchip)
204 /* Install handlers for IRQ_LOCOMO_* */ 204 /* Install handlers for IRQ_LOCOMO_* */
205 for ( ; irq <= lchip->irq_base + 3; irq++) { 205 for ( ; irq <= lchip->irq_base + 3; irq++) {
206 irq_set_chip(irq, &locomo_chip); 206 irq_set_chip(irq, &locomo_chip);
207 irq_set_chip_data(irq, lchip);
208 irq_set_handler(irq, handle_level_irq); 207 irq_set_handler(irq, handle_level_irq);
208 irq_set_chip_data(irq, lchip);
209 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 209 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
210 } 210 }
211} 211}
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 11ab3c24103c..f098f5c9fa3e 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -473,15 +473,15 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
473 473
474 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { 474 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
475 irq_set_chip(irq, &sa1111_low_chip); 475 irq_set_chip(irq, &sa1111_low_chip);
476 irq_set_chip_data(irq, sachip);
477 irq_set_handler(irq, handle_edge_irq); 476 irq_set_handler(irq, handle_edge_irq);
477 irq_set_chip_data(irq, sachip);
478 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 478 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
479 } 479 }
480 480
481 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { 481 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
482 irq_set_chip(irq, &sa1111_high_chip); 482 irq_set_chip(irq, &sa1111_high_chip);
483 irq_set_chip_data(irq, sachip);
484 irq_set_handler(irq, handle_edge_irq); 483 irq_set_handler(irq, handle_edge_irq);
484 irq_set_chip_data(irq, sachip);
485 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 485 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
486 } 486 }
487 487
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 297078b4dd30..e282fd1a436a 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -306,8 +306,8 @@ static void __init vic_set_irq_sources(void __iomem *base,
306 unsigned int irq = irq_start + i; 306 unsigned int irq = irq_start + i;
307 307
308 irq_set_chip(irq, &vic_chip); 308 irq_set_chip(irq, &vic_chip);
309 irq_set_chip_data(irq, base);
310 irq_set_handler(irq, handle_level_irq); 309 irq_set_handler(irq, handle_level_irq);
310 irq_set_chip_data(irq, base);
311 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 311 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
312 } 312 }
313 } 313 }
diff --git a/arch/arm/mach-exynos4/irq-combiner.c b/arch/arm/mach-exynos4/irq-combiner.c
index 0c180800c8a7..3a217be718f8 100644
--- a/arch/arm/mach-exynos4/irq-combiner.c
+++ b/arch/arm/mach-exynos4/irq-combiner.c
@@ -120,8 +120,8 @@ void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
120 for (i = irq_start; i < combiner_data[combiner_nr].irq_offset 120 for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
121 + MAX_IRQ_IN_COMBINER; i++) { 121 + MAX_IRQ_IN_COMBINER; i++) {
122 irq_set_chip(i, &combiner_chip); 122 irq_set_chip(i, &combiner_chip);
123 irq_set_chip_data(i, &combiner_data[combiner_nr]);
124 irq_set_handler(i, handle_level_irq); 123 irq_set_handler(i, handle_level_irq);
124 irq_set_chip_data(i, &combiner_data[combiner_nr]);
125 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 125 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
126 } 126 }
127} 127}
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index cc7bfc3428c8..70344cc75743 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -138,8 +138,8 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
138 138
139 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { 139 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
140 irq_set_chip(irq, &pxa_low_gpio_chip); 140 irq_set_chip(irq, &pxa_low_gpio_chip);
141 irq_set_chip_data(irq, irq_base(0));
142 irq_set_handler(irq, handle_edge_irq); 141 irq_set_handler(irq, handle_edge_irq);
142 irq_set_chip_data(irq, irq_base(0));
143 set_irq_flags(irq, IRQF_VALID); 143 set_irq_flags(irq, IRQF_VALID);
144 } 144 }
145 145
@@ -166,8 +166,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
166 166
167 irq = PXA_IRQ(i); 167 irq = PXA_IRQ(i);
168 irq_set_chip(irq, &pxa_internal_irq_chip); 168 irq_set_chip(irq, &pxa_internal_irq_chip);
169 irq_set_chip_data(irq, base);
170 irq_set_handler(irq, handle_level_irq); 169 irq_set_handler(irq, handle_level_irq);
170 irq_set_chip_data(irq, base);
171 set_irq_flags(irq, IRQF_VALID); 171 set_irq_flags(irq, IRQF_VALID);
172 } 172 }
173 } 173 }
diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c
index 9a4c7aeab5c5..6d703487cb8c 100644
--- a/arch/arm/mach-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/irq-eint.c
@@ -198,8 +198,8 @@ static int __init s3c64xx_init_irq_eint(void)
198 198
199 for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) { 199 for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
200 irq_set_chip(irq, &s3c_irq_eint); 200 irq_set_chip(irq, &s3c_irq_eint);
201 irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
202 irq_set_handler(irq, handle_level_irq); 201 irq_set_handler(irq, handle_level_irq);
202 irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
203 set_irq_flags(irq, IRQF_VALID); 203 set_irq_flags(irq, IRQF_VALID);
204 } 204 }
205 205
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index aba3ffed9427..f533bdeaa72b 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -57,8 +57,8 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
57 unsigned int irq = irq_start + i; 57 unsigned int irq = irq_start + i;
58 58
59 irq_set_chip(irq, &orion_irq_chip); 59 irq_set_chip(irq, &orion_irq_chip);
60 irq_set_chip_data(irq, maskaddr);
61 irq_set_handler(irq, handle_level_irq); 60 irq_set_handler(irq, handle_level_irq);
61 irq_set_chip_data(irq, maskaddr);
62 irq_set_status_flags(irq, IRQ_LEVEL); 62 irq_set_status_flags(irq, IRQ_LEVEL);
63 set_irq_flags(irq, IRQF_VALID); 63 set_irq_flags(irq, IRQF_VALID);
64 } 64 }
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
index 3c064a0176b7..9dbad70bdd09 100644
--- a/arch/arm/plat-samsung/irq-uart.c
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -118,8 +118,8 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
118 irq = uirq->base_irq + offs; 118 irq = uirq->base_irq + offs;
119 119
120 irq_set_chip(irq, &s3c_irq_uart); 120 irq_set_chip(irq, &s3c_irq_uart);
121 irq_set_chip_data(irq, uirq);
122 irq_set_handler(irq, handle_level_irq); 121 irq_set_handler(irq, handle_level_irq);
122 irq_set_chip_data(irq, uirq);
123 set_irq_flags(irq, IRQF_VALID); 123 set_irq_flags(irq, IRQF_VALID);
124 } 124 }
125 125