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authorThomas Gleixner <tglx@linutronix.de>2011-02-06 15:45:52 -0500
committerJames Bottomley <James.Bottomley@suse.de>2011-02-10 11:22:14 -0500
commit4c4231ea2f794d73bbb50b8d84e00c66a012a607 (patch)
tree4c2470ea880a75c22f275402fe5a186902edd6d5
parent9804c9eaeacfe78651052c5ddff31099f60ef78c (diff)
[PARISC] Convert to new irq_chip functions
Convert all the parisc driver interrupt handlers (dino, eisa, gsc, iosapic and superio) as well as the cpu interrupts. Prepare show_interrupts for GENERIC_HARDIRQS_NO_DEPRECATED and finally selects that Kconfig option [jejb: compile and testing fixes] Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
-rw-r--r--arch/parisc/Kconfig1
-rw-r--r--arch/parisc/include/asm/irq.h13
-rw-r--r--arch/parisc/kernel/irq.c64
-rw-r--r--drivers/parisc/dino.c22
-rw-r--r--drivers/parisc/eisa.c12
-rw-r--r--drivers/parisc/gsc.c22
-rw-r--r--drivers/parisc/iosapic.c40
-rw-r--r--drivers/parisc/superio.c12
8 files changed, 98 insertions, 88 deletions
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index fed2946f7335..fafdf30bea9e 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -15,6 +15,7 @@ config PARISC
15 select HAVE_GENERIC_HARDIRQS 15 select HAVE_GENERIC_HARDIRQS
16 select GENERIC_IRQ_PROBE 16 select GENERIC_IRQ_PROBE
17 select IRQ_PER_CPU 17 select IRQ_PER_CPU
18 select GENERIC_HARDIRQS_NO_DEPRECATED
18 19
19 help 20 help
20 The PA-RISC microprocessor is designed by Hewlett-Packard and used 21 The PA-RISC microprocessor is designed by Hewlett-Packard and used
diff --git a/arch/parisc/include/asm/irq.h b/arch/parisc/include/asm/irq.h
index c67dccf2e31f..1073599a7be9 100644
--- a/arch/parisc/include/asm/irq.h
+++ b/arch/parisc/include/asm/irq.h
@@ -32,15 +32,10 @@ static __inline__ int irq_canonicalize(int irq)
32} 32}
33 33
34struct irq_chip; 34struct irq_chip;
35struct irq_data;
35 36
36/* 37void cpu_ack_irq(struct irq_data *d);
37 * Some useful "we don't have to do anything here" handlers. Should 38void cpu_eoi_irq(struct irq_data *d);
38 * probably be provided by the generic code.
39 */
40void no_ack_irq(unsigned int irq);
41void no_end_irq(unsigned int irq);
42void cpu_ack_irq(unsigned int irq);
43void cpu_eoi_irq(unsigned int irq);
44 39
45extern int txn_alloc_irq(unsigned int nbits); 40extern int txn_alloc_irq(unsigned int nbits);
46extern int txn_claim_irq(int); 41extern int txn_claim_irq(int);
@@ -49,7 +44,7 @@ extern unsigned long txn_alloc_addr(unsigned int);
49extern unsigned long txn_affinity_addr(unsigned int irq, int cpu); 44extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
50 45
51extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *); 46extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
52extern int cpu_check_affinity(unsigned int irq, const struct cpumask *dest); 47extern int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest);
53 48
54/* soft power switch support (power.c) */ 49/* soft power switch support (power.c) */
55extern struct tasklet_struct power_tasklet; 50extern struct tasklet_struct power_tasklet;
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 3948f1dd455a..cb450e1e79b3 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -52,9 +52,9 @@ static volatile unsigned long cpu_eiem = 0;
52*/ 52*/
53static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL; 53static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL;
54 54
55static void cpu_mask_irq(unsigned int irq) 55static void cpu_mask_irq(struct irq_data *d)
56{ 56{
57 unsigned long eirr_bit = EIEM_MASK(irq); 57 unsigned long eirr_bit = EIEM_MASK(d->irq);
58 58
59 cpu_eiem &= ~eirr_bit; 59 cpu_eiem &= ~eirr_bit;
60 /* Do nothing on the other CPUs. If they get this interrupt, 60 /* Do nothing on the other CPUs. If they get this interrupt,
@@ -63,7 +63,7 @@ static void cpu_mask_irq(unsigned int irq)
63 * then gets disabled */ 63 * then gets disabled */
64} 64}
65 65
66static void cpu_unmask_irq(unsigned int irq) 66static void __cpu_unmask_irq(unsigned int irq)
67{ 67{
68 unsigned long eirr_bit = EIEM_MASK(irq); 68 unsigned long eirr_bit = EIEM_MASK(irq);
69 69
@@ -75,9 +75,14 @@ static void cpu_unmask_irq(unsigned int irq)
75 smp_send_all_nop(); 75 smp_send_all_nop();
76} 76}
77 77
78void cpu_ack_irq(unsigned int irq) 78static void cpu_unmask_irq(struct irq_data *d)
79{
80 __cpu_unmask_irq(d->irq);
81}
82
83void cpu_ack_irq(struct irq_data *d)
79{ 84{
80 unsigned long mask = EIEM_MASK(irq); 85 unsigned long mask = EIEM_MASK(d->irq);
81 int cpu = smp_processor_id(); 86 int cpu = smp_processor_id();
82 87
83 /* Clear in EIEM so we can no longer process */ 88 /* Clear in EIEM so we can no longer process */
@@ -90,9 +95,9 @@ void cpu_ack_irq(unsigned int irq)
90 mtctl(mask, 23); 95 mtctl(mask, 23);
91} 96}
92 97
93void cpu_eoi_irq(unsigned int irq) 98void cpu_eoi_irq(struct irq_data *d)
94{ 99{
95 unsigned long mask = EIEM_MASK(irq); 100 unsigned long mask = EIEM_MASK(d->irq);
96 int cpu = smp_processor_id(); 101 int cpu = smp_processor_id();
97 102
98 /* set it in the eiems---it's no longer in process */ 103 /* set it in the eiems---it's no longer in process */
@@ -103,15 +108,16 @@ void cpu_eoi_irq(unsigned int irq)
103} 108}
104 109
105#ifdef CONFIG_SMP 110#ifdef CONFIG_SMP
106int cpu_check_affinity(unsigned int irq, const struct cpumask *dest) 111int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest)
107{ 112{
108 int cpu_dest; 113 int cpu_dest;
109 114
110 /* timer and ipi have to always be received on all CPUs */ 115 /* timer and ipi have to always be received on all CPUs */
111 if (CHECK_IRQ_PER_CPU(irq_to_desc(irq)->status)) { 116 if (CHECK_IRQ_PER_CPU(irq_to_desc(d->irq)->status)) {
112 /* Bad linux design decision. The mask has already 117 /* Bad linux design decision. The mask has already
113 * been set; we must reset it */ 118 * been set; we must reset it. Will fix - tglx
114 cpumask_setall(irq_desc[irq].affinity); 119 */
120 cpumask_setall(d->affinity);
115 return -EINVAL; 121 return -EINVAL;
116 } 122 }
117 123
@@ -121,33 +127,34 @@ int cpu_check_affinity(unsigned int irq, const struct cpumask *dest)
121 return cpu_dest; 127 return cpu_dest;
122} 128}
123 129
124static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest) 130static int cpu_set_affinity_irq(struct irq_data *d, const struct cpumask *dest,
131 bool force)
125{ 132{
126 int cpu_dest; 133 int cpu_dest;
127 134
128 cpu_dest = cpu_check_affinity(irq, dest); 135 cpu_dest = cpu_check_affinity(d, dest);
129 if (cpu_dest < 0) 136 if (cpu_dest < 0)
130 return -1; 137 return -1;
131 138
132 cpumask_copy(irq_desc[irq].affinity, dest); 139 cpumask_copy(d->affinity, dest);
133 140
134 return 0; 141 return 0;
135} 142}
136#endif 143#endif
137 144
138static struct irq_chip cpu_interrupt_type = { 145static struct irq_chip cpu_interrupt_type = {
139 .name = "CPU", 146 .name = "CPU",
140 .mask = cpu_mask_irq, 147 .irq_mask = cpu_mask_irq,
141 .unmask = cpu_unmask_irq, 148 .irq_unmask = cpu_unmask_irq,
142 .ack = cpu_ack_irq, 149 .irq_ack = cpu_ack_irq,
143 .eoi = cpu_eoi_irq, 150 .irq_eoi = cpu_eoi_irq,
144#ifdef CONFIG_SMP 151#ifdef CONFIG_SMP
145 .set_affinity = cpu_set_affinity_irq, 152 .irq_set_affinity = cpu_set_affinity_irq,
146#endif 153#endif
147 /* XXX: Needs to be written. We managed without it so far, but 154 /* XXX: Needs to be written. We managed without it so far, but
148 * we really ought to write it. 155 * we really ought to write it.
149 */ 156 */
150 .retrigger = NULL, 157 .irq_retrigger = NULL,
151}; 158};
152 159
153int show_interrupts(struct seq_file *p, void *v) 160int show_interrupts(struct seq_file *p, void *v)
@@ -181,7 +188,7 @@ int show_interrupts(struct seq_file *p, void *v)
181 seq_printf(p, "%10u ", kstat_irqs(i)); 188 seq_printf(p, "%10u ", kstat_irqs(i));
182#endif 189#endif
183 190
184 seq_printf(p, " %14s", irq_desc[i].chip->name); 191 seq_printf(p, " %14s", irq_desc[i].irq_data.chip->name);
185#ifndef PARISC_IRQ_CR16_COUNTS 192#ifndef PARISC_IRQ_CR16_COUNTS
186 seq_printf(p, " %s", action->name); 193 seq_printf(p, " %s", action->name);
187 194
@@ -233,14 +240,14 @@ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data)
233{ 240{
234 if (irq_desc[irq].action) 241 if (irq_desc[irq].action)
235 return -EBUSY; 242 return -EBUSY;
236 if (irq_desc[irq].chip != &cpu_interrupt_type) 243 if (get_irq_chip(irq) != &cpu_interrupt_type)
237 return -EBUSY; 244 return -EBUSY;
238 245
239 /* for iosapic interrupts */ 246 /* for iosapic interrupts */
240 if (type) { 247 if (type) {
241 set_irq_chip_and_handler(irq, type, handle_percpu_irq); 248 set_irq_chip_and_handler(irq, type, handle_percpu_irq);
242 set_irq_chip_data(irq, data); 249 set_irq_chip_data(irq, data);
243 cpu_unmask_irq(irq); 250 __cpu_unmask_irq(irq);
244 } 251 }
245 return 0; 252 return 0;
246} 253}
@@ -289,7 +296,8 @@ int txn_alloc_irq(unsigned int bits_wide)
289unsigned long txn_affinity_addr(unsigned int irq, int cpu) 296unsigned long txn_affinity_addr(unsigned int irq, int cpu)
290{ 297{
291#ifdef CONFIG_SMP 298#ifdef CONFIG_SMP
292 cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); 299 struct irq_data *d = irq_get_irq_data(irq);
300 cpumask_copy(d->affinity, cpumask_of(cpu));
293#endif 301#endif
294 302
295 return per_cpu(cpu_data, cpu).txn_addr; 303 return per_cpu(cpu_data, cpu).txn_addr;
@@ -333,6 +341,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
333 unsigned long eirr_val; 341 unsigned long eirr_val;
334 int irq, cpu = smp_processor_id(); 342 int irq, cpu = smp_processor_id();
335#ifdef CONFIG_SMP 343#ifdef CONFIG_SMP
344 struct irq_desc *desc;
336 cpumask_t dest; 345 cpumask_t dest;
337#endif 346#endif
338 347
@@ -346,8 +355,9 @@ void do_cpu_irq_mask(struct pt_regs *regs)
346 irq = eirr_to_irq(eirr_val); 355 irq = eirr_to_irq(eirr_val);
347 356
348#ifdef CONFIG_SMP 357#ifdef CONFIG_SMP
349 cpumask_copy(&dest, irq_desc[irq].affinity); 358 desc = irq_to_desc(irq);
350 if (CHECK_IRQ_PER_CPU(irq_desc[irq].status) && 359 cpumask_copy(&dest, desc->irq_data.affinity);
360 if (CHECK_IRQ_PER_CPU(desc->status) &&
351 !cpu_isset(smp_processor_id(), dest)) { 361 !cpu_isset(smp_processor_id(), dest)) {
352 int cpu = first_cpu(dest); 362 int cpu = first_cpu(dest);
353 363
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index 9383063d2b16..bcd5d54b7d4d 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -296,25 +296,25 @@ static struct pci_port_ops dino_port_ops = {
296 .outl = dino_out32 296 .outl = dino_out32
297}; 297};
298 298
299static void dino_mask_irq(unsigned int irq) 299static void dino_mask_irq(struct irq_data *d)
300{ 300{
301 struct dino_device *dino_dev = get_irq_chip_data(irq); 301 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
302 int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS); 302 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
303 303
304 DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, irq); 304 DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, d->irq);
305 305
306 /* Clear the matching bit in the IMR register */ 306 /* Clear the matching bit in the IMR register */
307 dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq)); 307 dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq));
308 __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); 308 __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
309} 309}
310 310
311static void dino_unmask_irq(unsigned int irq) 311static void dino_unmask_irq(struct irq_data *d)
312{ 312{
313 struct dino_device *dino_dev = get_irq_chip_data(irq); 313 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
314 int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS); 314 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
315 u32 tmp; 315 u32 tmp;
316 316
317 DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, irq); 317 DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, d->irq);
318 318
319 /* 319 /*
320 ** clear pending IRQ bits 320 ** clear pending IRQ bits
@@ -346,9 +346,9 @@ static void dino_unmask_irq(unsigned int irq)
346} 346}
347 347
348static struct irq_chip dino_interrupt_type = { 348static struct irq_chip dino_interrupt_type = {
349 .name = "GSC-PCI", 349 .name = "GSC-PCI",
350 .unmask = dino_unmask_irq, 350 .irq_unmask = dino_unmask_irq,
351 .mask = dino_mask_irq, 351 .irq_mask = dino_mask_irq,
352}; 352};
353 353
354 354
diff --git a/drivers/parisc/eisa.c b/drivers/parisc/eisa.c
index e860038b0b84..deeec32a5803 100644
--- a/drivers/parisc/eisa.c
+++ b/drivers/parisc/eisa.c
@@ -144,8 +144,9 @@ static unsigned int eisa_irq_level __read_mostly; /* default to edge triggered *
144 144
145 145
146/* called by free irq */ 146/* called by free irq */
147static void eisa_mask_irq(unsigned int irq) 147static void eisa_mask_irq(struct irq_data *d)
148{ 148{
149 unsigned int irq = d->irq;
149 unsigned long flags; 150 unsigned long flags;
150 151
151 EISA_DBG("disable irq %d\n", irq); 152 EISA_DBG("disable irq %d\n", irq);
@@ -164,8 +165,9 @@ static void eisa_mask_irq(unsigned int irq)
164} 165}
165 166
166/* called by request irq */ 167/* called by request irq */
167static void eisa_unmask_irq(unsigned int irq) 168static void eisa_unmask_irq(struct irq_data *d)
168{ 169{
170 unsigned int irq = d->irq;
169 unsigned long flags; 171 unsigned long flags;
170 EISA_DBG("enable irq %d\n", irq); 172 EISA_DBG("enable irq %d\n", irq);
171 173
@@ -183,9 +185,9 @@ static void eisa_unmask_irq(unsigned int irq)
183} 185}
184 186
185static struct irq_chip eisa_interrupt_type = { 187static struct irq_chip eisa_interrupt_type = {
186 .name = "EISA", 188 .name = "EISA",
187 .unmask = eisa_unmask_irq, 189 .irq_unmask = eisa_unmask_irq,
188 .mask = eisa_mask_irq, 190 .irq_mask = eisa_mask_irq,
189}; 191};
190 192
191static irqreturn_t eisa_irq(int wax_irq, void *intr_dev) 193static irqreturn_t eisa_irq(int wax_irq, void *intr_dev)
diff --git a/drivers/parisc/gsc.c b/drivers/parisc/gsc.c
index 772b1939ac21..ef31080cf591 100644
--- a/drivers/parisc/gsc.c
+++ b/drivers/parisc/gsc.c
@@ -105,13 +105,13 @@ int gsc_find_local_irq(unsigned int irq, int *global_irqs, int limit)
105 return NO_IRQ; 105 return NO_IRQ;
106} 106}
107 107
108static void gsc_asic_mask_irq(unsigned int irq) 108static void gsc_asic_mask_irq(struct irq_data *d)
109{ 109{
110 struct gsc_asic *irq_dev = get_irq_chip_data(irq); 110 struct gsc_asic *irq_dev = irq_data_get_irq_chip_data(d);
111 int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32); 111 int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32);
112 u32 imr; 112 u32 imr;
113 113
114 DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, irq, 114 DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq,
115 irq_dev->name, imr); 115 irq_dev->name, imr);
116 116
117 /* Disable the IRQ line by clearing the bit in the IMR */ 117 /* Disable the IRQ line by clearing the bit in the IMR */
@@ -120,13 +120,13 @@ static void gsc_asic_mask_irq(unsigned int irq)
120 gsc_writel(imr, irq_dev->hpa + OFFSET_IMR); 120 gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
121} 121}
122 122
123static void gsc_asic_unmask_irq(unsigned int irq) 123static void gsc_asic_unmask_irq(struct irq_data *d)
124{ 124{
125 struct gsc_asic *irq_dev = get_irq_chip_data(irq); 125 struct gsc_asic *irq_dev = irq_data_get_irq_chip_data(d);
126 int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32); 126 int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32);
127 u32 imr; 127 u32 imr;
128 128
129 DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, irq, 129 DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq,
130 irq_dev->name, imr); 130 irq_dev->name, imr);
131 131
132 /* Enable the IRQ line by setting the bit in the IMR */ 132 /* Enable the IRQ line by setting the bit in the IMR */
@@ -140,9 +140,9 @@ static void gsc_asic_unmask_irq(unsigned int irq)
140} 140}
141 141
142static struct irq_chip gsc_asic_interrupt_type = { 142static struct irq_chip gsc_asic_interrupt_type = {
143 .name = "GSC-ASIC", 143 .name = "GSC-ASIC",
144 .unmask = gsc_asic_unmask_irq, 144 .irq_unmask = gsc_asic_unmask_irq,
145 .mask = gsc_asic_mask_irq, 145 .irq_mask = gsc_asic_mask_irq,
146}; 146};
147 147
148int gsc_assign_irq(struct irq_chip *type, void *data) 148int gsc_assign_irq(struct irq_chip *type, void *data)
diff --git a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c
index 0327894bf235..95930d016235 100644
--- a/drivers/parisc/iosapic.c
+++ b/drivers/parisc/iosapic.c
@@ -615,10 +615,10 @@ iosapic_set_irt_data( struct vector_info *vi, u32 *dp0, u32 *dp1)
615} 615}
616 616
617 617
618static void iosapic_mask_irq(unsigned int irq) 618static void iosapic_mask_irq(struct irq_data *d)
619{ 619{
620 unsigned long flags; 620 unsigned long flags;
621 struct vector_info *vi = get_irq_chip_data(irq); 621 struct vector_info *vi = irq_data_get_irq_chip_data(d);
622 u32 d0, d1; 622 u32 d0, d1;
623 623
624 spin_lock_irqsave(&iosapic_lock, flags); 624 spin_lock_irqsave(&iosapic_lock, flags);
@@ -628,9 +628,9 @@ static void iosapic_mask_irq(unsigned int irq)
628 spin_unlock_irqrestore(&iosapic_lock, flags); 628 spin_unlock_irqrestore(&iosapic_lock, flags);
629} 629}
630 630
631static void iosapic_unmask_irq(unsigned int irq) 631static void iosapic_unmask_irq(struct irq_data *d)
632{ 632{
633 struct vector_info *vi = get_irq_chip_data(irq); 633 struct vector_info *vi = irq_data_get_irq_chip_data(d);
634 u32 d0, d1; 634 u32 d0, d1;
635 635
636 /* data is initialized by fixup_irq */ 636 /* data is initialized by fixup_irq */
@@ -666,34 +666,34 @@ printk("\n");
666 * enables their IRQ. It can lead to "interesting" race conditions 666 * enables their IRQ. It can lead to "interesting" race conditions
667 * in the driver initialization sequence. 667 * in the driver initialization sequence.
668 */ 668 */
669 DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", irq, 669 DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", d->irq,
670 vi->eoi_addr, vi->eoi_data); 670 vi->eoi_addr, vi->eoi_data);
671 iosapic_eoi(vi->eoi_addr, vi->eoi_data); 671 iosapic_eoi(vi->eoi_addr, vi->eoi_data);
672} 672}
673 673
674static void iosapic_eoi_irq(unsigned int irq) 674static void iosapic_eoi_irq(struct irq_data *d)
675{ 675{
676 struct vector_info *vi = get_irq_chip_data(irq); 676 struct vector_info *vi = irq_data_get_irq_chip_data(d);
677 677
678 iosapic_eoi(vi->eoi_addr, vi->eoi_data); 678 iosapic_eoi(vi->eoi_addr, vi->eoi_data);
679 cpu_eoi_irq(irq); 679 cpu_eoi_irq(d);
680} 680}
681 681
682#ifdef CONFIG_SMP 682#ifdef CONFIG_SMP
683static int iosapic_set_affinity_irq(unsigned int irq, 683static int iosapic_set_affinity_irq(struct irq_data *d,
684 const struct cpumask *dest) 684 const struct cpumask *dest, bool force)
685{ 685{
686 struct vector_info *vi = get_irq_chip_data(irq); 686 struct vector_info *vi = irq_data_get_irq_chip_data(d);
687 u32 d0, d1, dummy_d0; 687 u32 d0, d1, dummy_d0;
688 unsigned long flags; 688 unsigned long flags;
689 int dest_cpu; 689 int dest_cpu;
690 690
691 dest_cpu = cpu_check_affinity(irq, dest); 691 dest_cpu = cpu_check_affinity(d, dest);
692 if (dest_cpu < 0) 692 if (dest_cpu < 0)
693 return -1; 693 return -1;
694 694
695 cpumask_copy(irq_desc[irq].affinity, cpumask_of(dest_cpu)); 695 cpumask_copy(d->affinity, cpumask_of(dest_cpu));
696 vi->txn_addr = txn_affinity_addr(irq, dest_cpu); 696 vi->txn_addr = txn_affinity_addr(d->irq, dest_cpu);
697 697
698 spin_lock_irqsave(&iosapic_lock, flags); 698 spin_lock_irqsave(&iosapic_lock, flags);
699 /* d1 contains the destination CPU, so only want to set that 699 /* d1 contains the destination CPU, so only want to set that
@@ -708,13 +708,13 @@ static int iosapic_set_affinity_irq(unsigned int irq,
708#endif 708#endif
709 709
710static struct irq_chip iosapic_interrupt_type = { 710static struct irq_chip iosapic_interrupt_type = {
711 .name = "IO-SAPIC-level", 711 .name = "IO-SAPIC-level",
712 .unmask = iosapic_unmask_irq, 712 .irq_unmask = iosapic_unmask_irq,
713 .mask = iosapic_mask_irq, 713 .irq_mask = iosapic_mask_irq,
714 .ack = cpu_ack_irq, 714 .irq_ack = cpu_ack_irq,
715 .eoi = iosapic_eoi_irq, 715 .irq_eoi = iosapic_eoi_irq,
716#ifdef CONFIG_SMP 716#ifdef CONFIG_SMP
717 .set_affinity = iosapic_set_affinity_irq, 717 .irq_set_affinity = iosapic_set_affinity_irq,
718#endif 718#endif
719}; 719};
720 720
diff --git a/drivers/parisc/superio.c b/drivers/parisc/superio.c
index 28241532c0fd..a4d8ff66a639 100644
--- a/drivers/parisc/superio.c
+++ b/drivers/parisc/superio.c
@@ -286,8 +286,9 @@ superio_init(struct pci_dev *pcidev)
286} 286}
287DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init); 287DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
288 288
289static void superio_mask_irq(unsigned int irq) 289static void superio_mask_irq(struct irq_data *d)
290{ 290{
291 unsigned int irq = d->irq;
291 u8 r8; 292 u8 r8;
292 293
293 if ((irq < 1) || (irq == 2) || (irq > 7)) { 294 if ((irq < 1) || (irq == 2) || (irq > 7)) {
@@ -303,8 +304,9 @@ static void superio_mask_irq(unsigned int irq)
303 outb (r8,IC_PIC1+1); 304 outb (r8,IC_PIC1+1);
304} 305}
305 306
306static void superio_unmask_irq(unsigned int irq) 307static void superio_unmask_irq(struct irq_data *d)
307{ 308{
309 unsigned int irq = d->irq;
308 u8 r8; 310 u8 r8;
309 311
310 if ((irq < 1) || (irq == 2) || (irq > 7)) { 312 if ((irq < 1) || (irq == 2) || (irq > 7)) {
@@ -320,9 +322,9 @@ static void superio_unmask_irq(unsigned int irq)
320} 322}
321 323
322static struct irq_chip superio_interrupt_type = { 324static struct irq_chip superio_interrupt_type = {
323 .name = SUPERIO, 325 .name = SUPERIO,
324 .unmask = superio_unmask_irq, 326 .irq_unmask = superio_unmask_irq,
325 .mask = superio_mask_irq, 327 .irq_mask = superio_mask_irq,
326}; 328};
327 329
328#ifdef DEBUG_SUPERIO_INIT 330#ifdef DEBUG_SUPERIO_INIT