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authorMatthew Wilcox <matthew@wil.cx>2006-03-28 11:03:44 -0500
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-04-13 11:13:23 -0400
commitb6d105d7ee188040a6e5eb86101e7476d94b3076 (patch)
tree88a74366e7504c9d6046d243615e758a5b24a20e
parent1f61d82490a26dbcde903b33e24f6d11b758b64c (diff)
[SCSI] Use pcibios_resource_to_bus()
We had our own code (pci_get_base_address()) to get the bus address of a BAR. We can get this using pcibios_resource_to_bus() instead. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
-rw-r--r--drivers/scsi/sym53c8xx_2/sym_glue.c55
1 files changed, 13 insertions, 42 deletions
diff --git a/drivers/scsi/sym53c8xx_2/sym_glue.c b/drivers/scsi/sym53c8xx_2/sym_glue.c
index ec9d93aa160d..e6ff89a8524c 100644
--- a/drivers/scsi/sym53c8xx_2/sym_glue.c
+++ b/drivers/scsi/sym53c8xx_2/sym_glue.c
@@ -134,45 +134,6 @@ static void sym2_setup_params(void)
134 } 134 }
135} 135}
136 136
137/*
138 * We used to try to deal with 64-bit BARs here, but don't any more.
139 * There are many parts of this driver which would need to be modified
140 * to handle a 64-bit base address, including scripts. I'm uncomfortable
141 * with making those changes when I have no way of testing it, so I'm
142 * just going to disable it.
143 *
144 * Note that some machines (eg HP rx8620 and Superdome) have bus addresses
145 * below 4GB and physical addresses above 4GB. These will continue to work.
146 */
147static int __devinit
148pci_get_base_address(struct pci_dev *pdev, int index, unsigned long *basep)
149{
150 u32 tmp;
151 unsigned long base;
152#define PCI_BAR_OFFSET(index) (PCI_BASE_ADDRESS_0 + (index<<2))
153
154 pci_read_config_dword(pdev, PCI_BAR_OFFSET(index++), &tmp);
155 base = tmp;
156 if ((tmp & 0x7) == PCI_BASE_ADDRESS_MEM_TYPE_64) {
157 pci_read_config_dword(pdev, PCI_BAR_OFFSET(index++), &tmp);
158 if (tmp > 0) {
159 dev_err(&pdev->dev,
160 "BAR %d is 64-bit, disabling\n", index - 1);
161 base = 0;
162 }
163 }
164
165 if ((base & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
166 base &= PCI_BASE_ADDRESS_IO_MASK;
167 } else {
168 base &= PCI_BASE_ADDRESS_MEM_MASK;
169 }
170
171 *basep = base;
172 return index;
173#undef PCI_BAR_OFFSET
174}
175
176static struct scsi_transport_template *sym2_transport_template = NULL; 137static struct scsi_transport_template *sym2_transport_template = NULL;
177 138
178/* 139/*
@@ -1866,13 +1827,23 @@ static int __devinit sym_set_workarounds(struct sym_device *device)
1866static void __devinit 1827static void __devinit
1867sym_init_device(struct pci_dev *pdev, struct sym_device *device) 1828sym_init_device(struct pci_dev *pdev, struct sym_device *device)
1868{ 1829{
1869 int i; 1830 int i = 2;
1831 struct pci_bus_region bus_addr;
1870 1832
1871 device->host_id = SYM_SETUP_HOST_ID; 1833 device->host_id = SYM_SETUP_HOST_ID;
1872 device->pdev = pdev; 1834 device->pdev = pdev;
1873 1835
1874 i = pci_get_base_address(pdev, 1, &device->mmio_base); 1836 pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[1]);
1875 pci_get_base_address(pdev, i, &device->ram_base); 1837 device->mmio_base = bus_addr.start;
1838
1839 /*
1840 * If the BAR is 64-bit, resource 2 will be occupied by the
1841 * upper 32 bits
1842 */
1843 if (!pdev->resource[i].flags)
1844 i++;
1845 pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[i]);
1846 device->ram_base = bus_addr.start;
1876 1847
1877#ifdef CONFIG_SCSI_SYM53C8XX_MMIO 1848#ifdef CONFIG_SCSI_SYM53C8XX_MMIO
1878 if (device->mmio_base) 1849 if (device->mmio_base)