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authorRalf Baechle <ralf@linux-mips.org>2006-05-28 19:02:12 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-06-05 19:15:18 -0400
commitaa32374aaa2e516a9b0719477efae0782a62a79e (patch)
tree94189adc9e155c26c96099a1f2962dea6750e892
parent7155262e180d3b50fdea0f58f3329d9ae81ef80b (diff)
[MIPS] SB1: Only pass1 FPUs are broken beyond recovery.
The wrong revision number in the check was forcing a fallback to FPU emulation for all SB1 cores in 2.6. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/kernel/cpu-probe.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index bef3e2dc7c52..8c2c359a05f4 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -655,7 +655,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
655 case PRID_IMP_SB1: 655 case PRID_IMP_SB1:
656 c->cputype = CPU_SB1; 656 c->cputype = CPU_SB1;
657 /* FPU in pass1 is known to have issues. */ 657 /* FPU in pass1 is known to have issues. */
658 if ((c->processor_id & 0xff) < 0x20) 658 if ((c->processor_id & 0xff) < 0x02)
659 c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); 659 c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
660 break; 660 break;
661 case PRID_IMP_SB1A: 661 case PRID_IMP_SB1A: